Abstract: In accordance with the teachings of the present disclosure, a method of performing application-specific assessment of hosting suitability of multiple clouds is disclosed. The method may include defining, in a synthetic application definition, a plurality of resource consumptions, wherein the plurality of resource consumptions are equivalent to consumptions by a candidate application. The method may further include consuming a first plurality of quantities of resources of a plurality of nodes of a first computing system and consuming a second plurality of quantities of resources of a plurality of nodes of a second computing system. The method may also include recording a performance of the first and second synthetic application, and comparing the first computing system and the second computing system based upon the first performance and the second performance. The present disclosure additionally includes associated systems and apparatuses.

Abstract: A health care enterprise management system and method of management are disclosed. The system and method include a routing layer, a plurality of applications in an application layer, wherein the application layer communicates external to the enterprise manager via communicative contact through the routing layer, a business rules layer of a plurality of health care provision business rules, and a core layer.

Abstract: A touch assembly is provided including a touch surface for receiving a touch force. At least one haptic feedback device is coupled to the touch surface for selectively vibrating the touch surface. At least one switch is operably coupled with the touch surface and is adjustable between an activated configuration and a deactivated configuration. At least one microprocessor is in electrical communication with the at least one haptic feedback device and the at least one switch for actuating the at least one haptic feedback device in response to the at least one switch adjusting from the activated configuration to the deactivated configuration.

Abstract: Various embodiments are generally directed to techniques to provide software support for a hardware component incorporated into a computing device with a variety of processor components supporting different instruction sets and with a variety of operating systems. An apparatus may include a main processor component of a computing device; a network device simulator coupled to a hardware component of the computing device, and to provide a simulated network device; and a bus network interface controller (NIC) simulator to provide a simulated bus NIC, the bus NIC simulator and the network device simulator to present the hardware component to the main processor component as the simulated network device accessible to the main processor component through at least the simulated bus NIC and a simulated network that couples the simulated bus NIC to the simulated network device. Other embodiments are described and claimed.

Abstract: Embodiments manage user authorization to access multiple grouped software applications, via a catalog mechanism. Functionality of related software is divided into semantically meaningful catalogs, representing tasks or sub-processes within a business scenario. These catalogs represent a unit of functionality utilized to structure work and authorization. Functionality and authorizations are associated to system entry points, and assigned to catalogs bundling applications and services. Responsibilities may be defined statically or dynamically in terms of rule-based access restrictions to data structure (e.g., business object) instances. Catalogs may be assigned to business roles, and business roles assigned to users. Based on such assignments, corresponding authorizations are generated and linked to users at compile or deployment time. At run time, access decision and enforcement is granted based on these authorizations and restrictions.

Abstract: In one or more embodiments, a system can configure a physical mobile device via configuring a configuration for an emulator of the physical mobile device. For example, a user (e.g., a customer) can request a physical mobile device, and a system can provide the user with an emulation of the physical mobile device, where the user can configure the emulation of the physical mobile device. In one or more embodiments, the user can be provided with the configuration via at least one of a network and a physical delivery of the physical mobile device, configured with the configuration. In one example, the user can execute an emulation of the physical mobile device configured with the configuration, received via the network. In another example, the physical mobile device can be configured with the configuration, and subsequently, the physical mobile device can be physically delivered to the user.

Abstract: Novel techniques are provided to determine concurrent hardware resource usage as expressed in activity performed by hardware processors. A cloud computing consumer can verify the level of the quality of service provided by the physical infrastructure of a cloud, thereby allowing the consumer the ability to request a transfer of the hosting physical infrastructure to a less burdened physical machine.

Abstract: Body tissue ablation is carried out by inserting a probe into a body of a living subject, urging the probe into contact with a tissue in the body, generating energy at a power output level, and transmitting the generated energy into the tissue via the probe. While transmitting the generated energy the ablation is further carried out by determining a measured temperature of the tissue and a measured power level of the transmitted energy, and controlling the power output level responsively to a function of the measured temperature and the measured power level. Related apparatus for carrying out the ablation is also described.

Abstract: Provided are a system design method, a system design system, and a system design reform assistance program. A system design apparatus includes a unit for receiving an analysis model which represents a system failure restoration sequence, a unit for identifying, from the received analysis model, a minimum combination of component failure which does not satisfy either a restoration time requisite or a necessary cost requisite and a unit for outputting the identified minimum combination of component failure. The unit for identifying the minimum combination of component failure further includes a unit for estimating the restoration time of a system, and a unit for estimating the cost required for restoration of the system.

Abstract: Methods and systems for intrusion attack recovery include monitoring two or more hosts in a network to generate audit logs of system events. One or more dependency graphs (DGraphs) is generated based on the audit logs. A relevancy score for each edge of the DGraphs is determined. Irrelevant events from the DGraphs are pruned to generate a condensed backtracking graph. An origin is located by backtracking from an attack detection point in the condensed backtracking graph.

Abstract: A system executes efficient computational methods for high quality image reconstructions from a relatively small number of noisy (or degraded) sensor imaging measurements or scans. The system includes a processing device and instructions. The processing device executes the instructions to employ transform learning as a regularizer for solving inverse problems when reconstructing an image from the imaging measurements, the instructions executable to: adapt a transform model to a first set of image patches of a first set of images containing at least a first image, to model the first set of image patches as sparse in a transform domain while allowing deviation from perfect sparsity; reconstruct a second image by minimizing an optimization objective comprising a transform-based regularizer that employs the transform model, and a data fidelity term formed using the imaging measurements; and store the second image in the computer-readable medium, the second image displayable on a display device.

Abstract: A topology metadata file is identified that describes a topology of a system on chip (SoC) to be created, where the topology includes a plurality of computing blocks to be interconnected by a fabric. A corresponding computing block metadata file is identified for each of the plurality of computing blocks, where each of the computing block metadata files is to describe attributes of the corresponding computing block. The topology metadata file and the computing block metadata files are parsed to identify configuration attributes of the SoC. An intermediate representation of the SoC is generated based on the configuration attributes.

Abstract: A digital-to-analog converter (DAC) may include a conversion block providing a first analog value. The DAC may also include an amplification block for receiving the first analog value and providing a second analog value amplified by an amplification factor. The amplification block may include a first input terminal for receiving the first analog value, a second input terminal, and an output terminal for providing the second analog value. The amplification block may also include a first capacitive element and a second capacitive element. The first and second capacitive elements may determine the amplification factor. The amplification block may further include a control unit for recovering a charge at a first terminal of the second capacitive element, and based thereon, the second analog value.

Abstract: Composite virtual service models can be defined to model various business transactions. A request of a particular component in a first transaction is identified and a composite virtual service model can be identified that corresponds to the particular component. The composite virtual service model models a plurality of transactions comprising the first transaction between the particular component and a first component and a second transaction between the particular component and a second component. The composite virtual service model defines a correlation between the first transaction and the second transaction. A first synthetic response is generated from the composite virtual service model based at least in part on the request, the first synthetic response simulating a response of the first component. A second synthetic response is generated from the composite virtual service model based at least in part on the correlation to simulate a response of the second component.

Abstract: The present invention provides a network coverage planning method and apparatus of an evolution communication system, wherein the method includes: obtaining the theoretical coverage parameter of a single base station of the evolution communication system by link budget; obtaining the theoretical coverage parameter of an entire network of the evolution communication system by network stimulation; calculating a reception level value of the evolution communication system under the wireless environment of a current network communication system in the same planning area to estimate a simulative measured coverage parameter of the evolution communication system; and planning the coverage parameter of the entire network of the evolution communication system according to the theoretical coverage parameter of the single base station, the theoretical coverage parameter of the entire network and the simulative measured coverage parameter.

Abstract: A distributed computing application is described that provides a highly elastic and multi-tenant platform for Hadoop applications and other workloads running in a virtualized environment. Multiple instances of a distributed computing framework, such as Hadoop, may be executed concurrently. A centralized manager detects when contention for computing resources, such as memory and CPU, causes tasks to run slower on VMs executing on a given host, and scales up or scales down a cluster based on the detected resource contention.

Abstract: In one aspect, mobile access point devices may provide client devices access to an internet service provider. The mobile access point may communicate with the internet service provider via a cellular connection or a Wi-Fi connection. As the Wi-Fi connection may cause data service access failures due to, for example, firewalls, protocol limitations, or application layer gateways, allowing the mobile access point device to dynamically determine which mode of communication will reach the internet service provider can ensure more efficient service provisioning to the client devices. Packet filters may be maintained at the mobile access point device which identify which connections should be established via cellular and which should be established via Wi-Fi.

Abstract: Using verification IP (VIP), the related design IP (DIP) can be integrated into a system on a chip (SOC) without requiring the IP component. Using a normalized framework, a software module can be integrated into the VIP software stack enabling the customized management of the VIP beyond the standard specification defined behaviors. Then, the modified software stack can be used to manage both behaviors defined by the specification and the design specific behaviors. The VIP can then be used in place of the DIP for SOC development.

Abstract: Secure associate ordering and transaction methods and systems. An order for an alternative device different from a baseline device is received at an order processing platform. The alternative device is available for purchase by the associate at a cost differential between the alternative and baseline devices. The cost differential is based on a predetermined enterprise discount. A message including a secure link associated with the order is sent to the associate. Payment information associated with the cost differential is received by a secure payment (SP) platform from the associate via a secure website using the secure link. The payment information is submitted to a payment institution. The order processing platform receives a transaction confirmation from the SP platform when the payment information is accepted and adds at least features of the alternative device associated with the baseline device to a service account of the enterprise customer for the service provider.

Abstract: Scalable architectures, systems, and services are provided herein for creating manifest-based snapshots in distributed computing environments. In some embodiments, responsive to receiving a request to create a snapshot of a data object, a master node identifies multiple slave nodes on which a data object is stored in the cloud-computing platform and creates a snapshot manifest representing the snapshot of the data object. The snapshot manifest comprises a file including a listing of multiple file names in the snapshot manifest and reference information for locating the multiple files in the distributed database system. The snapshot can be created without disrupting I/O operations, e.g., in an online mode by various region servers as directed by the master node. Additionally, a log roll approach to creating the snapshot is also disclosed in which log files are marked. The replaying of log entries can reduce the probability of causal consistency in the snapshot.

Abstract: A list of input registers and output registers for a circuit design are provided. The circuit design is modified by traversing output connections paths for each input register and replacing any register in the output connection paths with a wire unless the register is a listed output register. An initial total cycle time value for the modified circuit design is determined. A gate level description for the modified circuit design is obtained by a macro synthesis with the initial total cycle time value. The total cycle time value for the modified circuit design is then varied in order to determine the theoretical limit of the modified circuit design. This theoretical limit is realized when negative slacks are present in a macro synthesis of the modified circuit design for a given total cycle time value. Based on this theoretical limit, the minimum pipeline depth of the circuit design is determined.

Abstract: Identifying state inconsistency in edge-based software defined networks is disclosed. A verification server may receive controller network configuration data from a controller of an edge-based software defined network (SDN) and end-host network configuration data from at least one end-host of the SDN. The verification server may parse the controller network configuration data into a network state representation and the end-host network configuration data into the network state representation. The network state representation of the controller network configuration data and the end-host network configuration data may be compared to identify state inconsistency in the SDN. Responsive to identifying the state inconsistency, an alert and/or a report may be generated and transmitted to an administrator user interface.

Abstract: A device test architecture and interface is provided to enable efficient testing embedded cores within devices. The test architecture interfaces to standard IEEE 1500 core test wrappers and provides high test data bandwidth to the wrappers from an external tester. The test architecture includes compare circuits that allow for comparison of test response data to be performed within the device. The test architecture further includes a memory for storing the results of the test response comparisons. The test architecture includes a programmable test controller to allow for various test control operations by simply inputting an instruction to the programmable test controller from the external tester. The test architecture includes a selector circuit for selecting a core for testing. Additional features and embodiments of the device test architectures are also disclosed.

Abstract: Systems and methods for optimized testing of partially symmetric quantum-logic circuits. A test system receives information that describes the architecture of a quantum-logic circuit to be tested. The system uses this information to organize the circuit's inputs into two or more mutually exclusive blocks of inputs. The system computes a wreath product of a set of groups associated with the blocks in order to generate an invariance group that contains one or more invariant permutations of the circuit's inputs. These invariant permutations can be used to reduce the number of tests required to fully verify the circuit for all possible input vectors. Once one specific input vector has been verified, there is no need to test other vectors that can be generated by performing any one of the invariant permutations upon the previously verified vector.

Abstract: Computer-implemented method, computerized apparatus and computer program product for extracting test model from a textual test suite. The method comprises obtaining a test suite comprising test descriptions. The test descriptions are analyzed to extract attributes and values of a test model modeling a test space. Using the extracted attributes and values, the test model may be created. In some cases, the test model may be partial test model that a user can use as a starting point for manually modeling the textual test suite.

Abstract: Methods, systems, and apparatus include computer programs encoded on a computer-readable storage medium for testing set-top boxes. A method includes: receiving an application for testing in a set-top box environment; identifying a set-top box for testing the application; executing the application on the set-top box, including commanding the set-top box to display a plurality of interfaces and initiating commands to transition the set-top box from a first presentation state to a second presentation state; capturing video output associated with the first presentation state; capturing video output associated with the set-top box after the transition to the second presentation state; monitoring and recording network traffic output by the set-top box; and providing an output associated with the monitoring and the captured video output to enable correlation between commands executed as part of the application execution, on screen output and network traffic of the set-top box.

Abstract: Methods, systems, and processor-readable media for remotely providing a device status alert. In an example embodiment, data indicative of the status of one or more devices can be subject to an HMM (Hidden Markov Model) and a dynamic programming algorithm to determine the latent state of the device (or devices). A status alert model can be trained based on such data and can be expanded with respect to a wide range of devices including utilizing semi-supervised learning. The alert status model can then be integrated into a device management application that provides a status alert regarding one or more of such devices based on the status alert model.

Abstract: A method for testing a system-on-a-chip (SoC) is described. The method includes parsing a file to determine functions to be performed components of the SoC. The method further includes receiving a desired output of the SoC and generating a test scenario model based on the desired output of the SoC. The test scenario model includes a plurality of module representations of the functions and includes one or more connections between two of the module representations. The desired output acts as a performance constraint for the test scenario model. The test scenario model further includes an input of the SoC that is generated based on the desired output, the module representations, and the one or more connections. The test scenario model includes a path from the input via the module representations and the connections to the desired output.

Abstract: Methods of calibrating an OPC model using converged results of CD measurements from at least two locations along a substrate profile of a 1D, 2D, or critical area structure are provided. Embodiments include calibrating an OPC model for a structure to be formed in a substrate; simulating a CD of the structure at at least two locations along a substrate profile of the structure using the OPC model; comparing the simulated CD of the structure at each location against a corresponding measured CD; recalibrating the OPC model based on the comparing of each simulated CD against the corresponding measured CD; repeating the steps of simulating, comparing, and recalibrating until comparing at a first of the at least two locations converges to a first criteria and comparing at each other of the at least two locations converges to a corresponding criteria; and forming the structure using the recalibrated OPC model.

Abstract: A method and apparatus for monitoring a data center infrastructure are described. In one embodiment, the method comprises collecting traffic data from the network, collecting storage I/O performance information, collecting central processing unit (CPU) and memory usage information, determining a virtual infrastructure of the network, compute and storage comprising virtual entities; and grouping the traffic data based at least on the virtual entities.

Abstract: Systems and methods for creating and presenting sensory stimulating content in a cyber reality environment. One aspect of the disclosure allows a composer to associate audio content with one or more virtual triggers, and to define behavior characteristics which control the functioning of each virtual trigger. Another aspect of the disclosure provides a variety of user interfaces through which a performer can cause content to be presented to an audience.

Abstract: The configuration of a cache is adjusted within a computer system that includes at least one entity that submits a stream of references, each reference corresponding to a location identifier corresponding to data storage locations in a storage system. The reference stream is spatially sampled using reference hashing. Cache utility values are determined for each of a plurality of caching simulations and an optimal configuration is selected based on the results of the simulations.

Abstract: A system, method and computer program product for implementing a quiescent current leakage specific model into semiconductor device design and circuit design flows. The leakage model covers all device geometries with wide temperature and voltage ranges and, without the need for stacking factor calculations nor spread sheet based IDDQ calculations. The leakage model for IDDQ calculation incorporates further parasitic and proximity effects. The leakage model implements leakage calculations at different levels of testing, e.g., from a single device to a full chip design, and are integrated within one single model. The leakage model implements leakage calculations at different levels of testing with the leverage of a single switch setting. The implementation is via a hardware definition language code or object oriented code that can be compiled and operated using a netlist of interest, e.g., for conducting a performance analysis.

Abstract: In one or more embodiments, a system can configure a physical mobile device via configuring a configuration for an emulator of the physical mobile device. For example, a user (e.g., a customer) can request a physical mobile device, and a system can provide the user with an emulation of the physical mobile device, where the user can configure the emulation of the physical mobile device. In one or more embodiments, the user can be provided with the configuration via at least one of a network and a physical delivery of the physical mobile device, configured with the configuration. In one example, the user can execute an emulation of the physical mobile device configured with the configuration, received via the network. In another example, the physical mobile device can be configured with the configuration, and subsequently, the physical mobile device can be physically delivered to the user.

Abstract: A digital-to-analog converter (DAC) may include a conversion block providing a first analog value. The DAC may also include an amplification block for receiving the first analog value and providing a second analog value amplified by an amplification factor. The amplification block may include a first input terminal for receiving the first analog value, a second input terminal, and an output terminal for providing the second analog value. The amplification block may also include a first capacitive element and a second capacitive element. The first and second capacitive elements may determine the amplification factor. The amplification block may further include a control unit for recovering a charge at a first terminal of the second capacitive element, and based thereon, the second analog value.

Abstract: An integrated modeling and analysis system (IMAS) receives documents containing information relating to an overall operations system from a number of integrated product teams (IPTs). The IMAS creates a model architecture of the overall system the information received from the participating IPTs. The IMAS automatically imports the information without any interaction from support personnel. A discrete event modeling (DES) application in communication with the IMAS creates a DES model based on the model architecture in the IMAS. The DES application runs a simulation on the model generating statistical data relating to the overall system for analysis. The statistical data generates output reports in a format compatible with the analysis tools of the user. The IMAS includes a customizable user interface which allows a stakeholder to link and control the modeling information received from all other participating IPTs. Prior simulations and results can be archived for later reference.

Abstract: A cellular communication device has one or more access modes which allow reading and writing of data, for example to change its settings, for example passwords and even the entire operating system and also permitting access to personal information such as the user's telephone book. To prevent cloning and like illegal access activity, the device is configured by restricting access to such data access modes using a device unique security setting. The setting may be a password, preferably a one-time password, or it may be a unique or dynamic or one time configuration of the codes for the read and write instructions of the data mode. There is also disclosed a server, which manages the security settings such that data mode operates during an active connection between the device and the server, and a secure communication protocol for communicating between the server and the cellular device.

Abstract: Aspects of the present invention disclose a system, method and program for automatic generation of source code under test case. In an example, a computer determines whether references to source code under test can be located from a test case. The computer automatically generates boiler plate code required for the creation of source code under test, wherein each section of the source code under test is associated with each section of the test case that caused its generation. The computer analyzes one or more test case syntax clues to provide additional information to form the boiler plate source code under test for the test case. The computer generates source code under test based on the type of boiler plate required for the creation of source code under test and the provided syntax clues in the test case.

Abstract: Embodiments relate to pre-silicon device testing using a persistent command table. An aspect includes receiving a value for a persistent command parameter from a user. Another aspect includes determining whether the value of the persistent command parameter is greater than zero. Another aspect includes based on determining whether the value of the persistent command parameter is greater than zero, selecting a number of commands equal to the value of the persistent command parameter from a regular command table of a driver of a device under test. Another aspect includes adding the selected commands to the persistent command table of the driver. Another aspect includes performing testing of the device under test via the driver using only commands that are in the persistent command table of the driver.

Abstract: Systems and methods disclosed herein provide for generating extra variables for an ATPG system utilizing compressed test patterns in the event an ATPG process is presented with faults requiring a higher number of care-bits than can be supported efficiently by the current hardware. The systems and methods provide for a multi-stage decompressor network system with an embedded serializer-deserializer. The systems and methods use a XOR decompressor in a first stage and a serializer-deserializer in conjunction with a second XOR decompressor in a second stage.

Abstract: A MOS device includes an active area having first and second contacts. First and second gates are disposed between the first and second contacts. The first gate is disposed adjacent to the first contact and has a third contact. The second gate is disposed adjacent to the second contact and has a fourth contact coupled to the third contact. A transistor defined by the active area and the first gate has a first threshold voltage, and a transistor defined by the active area and the second gate has a second threshold voltage.

Abstract: Provided is a virtual-machine managing device including: a model acquiring unit that acquires, for each server device, a performance model indicative of plural correspondent relationships between a workload amount and performance information on a workload; a performance-information acquiring unit that acquires the performance information on a virtual machine to be moved running on a current server device; a conversion unit that converts the performance information on the virtual machine to be moved into a combination of the workload amount and the workload characteristic value concerning the virtual machine to be moved, by using the performance model of the current server device; and an estimating unit that estimates performance information on the virtual machine to be moved on a destination server device serving as a candidate for a destination of movement of the virtual machine to be moved, by applying the combination converted by the conversion unit to the performance model of the destination server device

Abstract: A computer-readable memory device may include instructions to store data describing a state machine model including source states and destination states. The device may also include instructions to store, for each of the source states, a condition field identifying a condition upon which, when satisfied, the state machine model transitions from the source state to one of the destination states. The device may also include instructions to store, for each of source states, a destination field identifying the one of the destination states. Each of at least two of the source states may identify an identical destination state in the corresponding destination field. Each of at least two of the source states may identify an identical condition in the corresponding condition field.

Abstract: Various embodiments scalable statistical library characterization for electronic designs by identifying an electronic design, performing circuit simulations on strongly connected components on a component-by-component basis, performing the logic cone analysis on the entire electronic design, and performing combinations of influences on the electronic design caused by variations of parameters. Some embodiments perform simulations on one or more stronger parameters or the strongest parameter of a circuit component and use the simulation results to calibrate the predicted behaviors of one or more remaining circuit components of the electronic design. Various statistical or mathematical techniques may be used for performing the combinations of influences on the electronic design caused by variations of parameters. The techniques described are scalable with the increase in complexities and sizes of electronic designs while reducing or minimizing the impact on sensitivity accuracy.

Abstract: The invention relates to a method and system for discovering and documenting the business knowledge contained in the functions of each program of existing software applications as expressed in the source code of each program using a novel method of dynamic business rule extraction that overcomes the inherent limitations of previous methods. The novelty of the method results from the deterministic relationship between program functions and the program code executed to perform each function as revealed by empirical analysis of the actual code execution, hence “dynamic” business rule extraction. This compares to previous methods which utilized a manual process, a fully automated process, and/or a process of analysis against the non-executing source code of each programs in which the analyst must infer the execution path, hence “static” business rule extraction. Furthermore, dynamic business rule extraction can deliver results without errors or omissions and document forensically that it has done so.

Abstract: A computer implemented method and system for exclusion of entities from a metric driven verification analysis score. The method includes using a processor, and performing the following steps: parsing a source code simulating a device under test and modeling the source code into a model that includes entities of one or a plurality of metric driven entity types; identifying in the source code entities of the same metric driven entity type of said one or a plurality of metric driven entity types that are logically linked and saving information on the identified entities that are logically linked; receiving from a user a selection of an entity to be excluded from the metric driven verification analysis score; and excluding all instances of the selected entity and all instances of the identified entities that are logically linked to the selected entity from a calculation of the metric driven verification score.

Abstract: A system and method are disclosed for rationalizing configurations associated with one or more products. The system includes a database associated with one or more customers. The system further includes an order analysis system coupled with the database. The order analysis system is capable of rationalizing the differences between configurations of various combinations of options that are stored in the database.

Abstract: One aspect is a method that includes analyzing, by a processor of an analysis system, an instruction set architecture of a targeted processor to generate an instruction set profile for each instruction of the instruction set architecture. A combination of instruction sequences for the targeted processor is determined from the instruction set profile that corresponds to a desired stressmark type. The desired stressmark type defines a metric representative of functionality of interest of the targeted processor. Performance of the targeted processor is monitored with respect to the desired stressmark type while executing each of the instruction sequences. One of the instruction sequences is identified as most closely aligning with the desired stressmark type based on performance results of execution of the instruction sequences with respect to the desired stressmark type.

Abstract: One aspect is a method that includes analyzing, by a processor of an analysis system, an instruction set architecture of a targeted processor to generate an instruction set profile for each instruction of the instruction set architecture. A combination of instruction sequences for the targeted processor is determined from the instruction set profile that corresponds to a desired stressmark type. The desired stressmark type defines a metric representative of functionality of interest of the targeted processor. Performance of the targeted processor is monitored with respect to the desired stressmark type while executing each of the instruction sequences. One of the instruction sequences is identified as most closely aligning with the desired stressmark type based on performance results of execution of the instruction sequences with respect to the desired stressmark type.

Abstract: A method, system, and computer program product include electronic design automation (EDA) tools used with standard CMOS processes to design and produce radiation-hardened (rad-hard) integrated circuits (ICs) having a predictable level of radiation hardness while maintaining a desired level of performance and tracking circuit area. The tools include rad-hard design rule checking (DRC) decks, rad-hard SPICE models, and rad-hard cell libraries. A rad-hard parasitic components extraction process makes use of rad-hard DRC rules to locate occurrences of parasitic devices, calculate their effects on circuit performance, and return this information to layout and circuit simulation tools. Changes to the layout are suggested and implemented with varying degrees of automation. Some of these tools can be provided as components of a rad-hard process design kit (PDK). They can be used in conjunction with commercial EDA tools to facilitate the incorporation of rad-hard features into new or existing IC designs.