Transform Patents (Class 708/400)
  • Publication number: 20090150125
    Abstract: Computer method, apparatus and system chains model-to-model transformations. In a series of model transformations, there are respective bridges before and after each model transformation. For each pair of consecutive model transformations in the series, the respective bridge (i) receives a model output from a first model transformation of the pair, the received model being in the respective output model format of the first model transformation of the pair, (ii) prepares the received model as input to a second model transformation of the pair, including preparing the received model to be in the respective input model format of the second model transformation of the pair, and (iii) inputs the prepared model to the second model transformation of the pair. The series of model transformations and respective bridges provide chaining of the model-to-model transformations. Each model transformation in the series is able to be separately configured.
    Type: Application
    Filed: December 5, 2007
    Publication date: June 11, 2009
    Applicant: International Business Machines Corporation
    Inventor: Maged E. Elaasar
  • Patent number: 7542531
    Abstract: A method and system of canceling radio frequency interference (RFI) sourced from a narrow-band radio frequency transmitter to interfere with the operation of a multi-carrier modulation system. The spectral components of the RFI can be represented as a Taylor series of 1/(m-½) where m is an integer and (m-½) is a normalized approximate distance between the frequency of interest and the center frequency of the RFI. The coefficients of the Taylor series are obtained by solving a set of linear equations using the Fourier output at several properly chosen frequencies where the REI components dominate. The coefficients for the Taylor series are formulated as linear combinations of the FFT output at the chosen frequencies and are computed and stored beforehand. Simple multiplications and additions are needed for obtaining the Taylor series coefficients from the FFT output at the chosen frequencies.
    Type: Grant
    Filed: August 4, 2005
    Date of Patent: June 2, 2009
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chia-Liang Lin, Pei-Chieh Hsiao
  • Publication number: 20090122979
    Abstract: Provided is a data protection technique that converts original data into a secure form so that even if data registered to a system or database is leaked, information relating to original data cannot be exposed from the leaked data. Accordingly, a method of generating a template for protecting data is provided, wherein the method includes: generating a positive numbered (n) registration feature vector g (g=[g1, g2, . . . , gn]T); generating a positive number m (m<n) low-dimensional coordinates from the registration feature vector; generating at least one chaff coordinates on the m-dimensional coordinate axis with respect to the generated low-dimensional coordinates; and generating a registered template including the low-dimensional coordinates and the chaff coordinates.
    Type: Application
    Filed: October 30, 2008
    Publication date: May 14, 2009
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yongjin LEE, Yun Su CHUNG, Ki Young MOON
  • Publication number: 20090112958
    Abstract: Apparatus, systems and techniques based on an integer transform for encoding and decoding video or image signals, including apparatus, systems and techniques for deriving an order-16 integer transform from an order-8 integer transform in image and video coding. In some implementations, eight additions and eight subtractions are used to assign the data elements to be transformed to an intermediate matrix; and then two fast algorithms for the computation of the order-8 transform may be applied to the first 8 vectors of the intermediate matrix, and the last 8 vectors of the intermediate matrix, respectively. The derived order-16 integer transform tends to produce small magnitude and high frequency transformed coefficients, and thus achieve high compressibility.
    Type: Application
    Filed: April 9, 2008
    Publication date: April 30, 2009
    Applicant: THE CHINESE UNIVERSITY OF HONG KONG
    Inventors: Wai Kuen Cham, Chi Keung Fong
  • Publication number: 20090094578
    Abstract: Computer-implemented systems and methods that provide an efficient technique for performing a large class of permutations on data vectors of length 2n, n>1, implemented with streaming width 2k (where 1?k?n?1). The technique applies to any permutation Q on 2n datawords that can be specified as a linear transform, i.e., as an n×n bit matrix (a matrix containing only 1s and 0s) P on the bit level. The relationship between Q and P is as follows: If Q maps (dataword) i to (dataword) j, then the bit representation of j is the bit-matrix-vector product of P with the bit representation of i. Given such a permutation specified by the matrix P and given the streaming width (k), an architectural framework (or datapath) is calculated to implement the permutation.
    Type: Application
    Filed: October 2, 2008
    Publication date: April 9, 2009
    Applicant: Carnegie Mellon University
    Inventors: Markus Pueschel, Peter A. Milder, James C. Hoe
  • Publication number: 20090060266
    Abstract: Systems and methods for analyzing ratiometric data, e.g., ratiometric image data such as fluorescent image data.
    Type: Application
    Filed: August 28, 2008
    Publication date: March 5, 2009
    Applicant: University of Georgia Research Foundation, Inc.
    Inventors: Andrew T. Sornborger, James D. Lauderdale, Charles H. Keith, Josef M. Broder, Jeremy L. Praissman
  • Publication number: 20090063603
    Abstract: The present invention provides a system and method for time-series with compression accuracy as a function of time. Briefly described, in architecture, one embodiment of the system, among others, can be implemented as follows. The system includes a computer with a processor. The system performs a method receiving a data set on the computer, utilizing a plurality of filter banks to transform the data set into a plurality coefficients, wherein each coefficient is associated with a basis function, and quantizing the plurality of coefficients, wherein the quantization maps the plurality of coefficients into certain value ranges. Then, system further performs determining a threshold based upon each coefficient effect on a time domain, disregarding the coefficient that fall below the threshold, and storing any remaining coefficients as compressed data for the data set.
    Type: Application
    Filed: August 29, 2007
    Publication date: March 5, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Patrick Droz, Paul T. Hurley, Andreas Kind
  • Publication number: 20090055458
    Abstract: A multiple-input multiple-output s-box receives a contiguously numbered input bits (101, 102, 103, 104, 105) I1, I2 to Ia, where a is at least 4, and outputs b contiguously numbered output bits (131, 132, 133, 134, 135) O1, O2, to Ob. The s-box comprises c primitive s-boxes (121, 122, 123) sb1 sb2 to sbc. Each primitive s-box (121, 122, 123) has a multiple-input single-output Boolean function ƒ1, ƒ2, to ƒo defining the relationship between the multiple inputs and the single output. Each primitive s-box (121, 122, 123) receives a set of input bits s1, s2, to sc, respectively, each such set is chosen from the a input bits (101, 102, 103, 104, 105) to the s-box and containing sl1, sl2, to slc bits respectively. Each of the numbers sl1, sl2, to slc, is in the range of 3 to (a?1), and the sum of the numbers sl1, sl2, to slc is larger than a. The b output bits of the s-box (131, 132, 133, 134, 135) are the outputs of the c Boolean functions.
    Type: Application
    Filed: September 20, 2005
    Publication date: February 26, 2009
    Inventor: Sean O'Neil
  • Patent number: 7487193
    Abstract: A fast implementation of the 8-point transform is realized using a sequence of butterfly operations and matrix multiplies. A fast implementation of the inverse transform is realized by applying inverses of the butterfly operations with the matrix multiplies in reverse flow. These fast implementations permit scaling to be incorporated into the transform stages either at the end of both dimensions of filtering, or separately at each stage. These fast implementations of the transform can be used in encoders and decoders based on this transform in image compression and other signal processing systems.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: February 3, 2009
    Assignee: Microsoft Corporation
    Inventors: Sridhar Srinivasan, Jie Liang
  • Patent number: 7474805
    Abstract: Methods and systems for efficient scaling in the transform domain are provided when transform coefficient data is provided as an input to a data processing system, comprising generating a first matrix from transform coefficient data; zeroing out a row or column of, or inserting a row or column of zeros into, the first matrix; generating a second matrix by applying a one-dimensional inverse transform to the first matrix with the zeroed-out at least one row, the at least one column, the inserted at least one row of zeros or the at least one column of zeros; generating a third matrix by regrouping the second matrix; generating a combined matrix by applying a forward transform to the third matrix; and the data processing system scaling the data represented by the transform coefficient data by applying the combined matrix to the transform coefficient data.
    Type: Grant
    Filed: August 27, 2007
    Date of Patent: January 6, 2009
    Assignee: International Business Machines Corporation
    Inventors: Tomasz J. Nowicki, Marco Martens, Jennifer Q. Trelewicz, Timothy J. Trenary, Joan L. Mitchell, Michael T. Brady
  • Publication number: 20090006516
    Abstract: Methods and systems of processing and displaying data that include obtaining and processing time-time data to obtain an in-phase sum of the time-time data, and of providing and utilizing the in-phase sum of the time-time data to generate a graphical display of the Radon sum of the time-time data. The in-phase sum of the time-time data may be provided for display, for example, by outputting a data signal suitable for generating a graphical representation of the in-phase sum of the time-time data, and the output data signal may be utilized to generate a graphical representation of the in-phase sum of the time-time data.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Inventor: Stephen T. Ha
  • Publication number: 20090006441
    Abstract: Mapping fault processing may be provided. First, user selectable elements may be received defining a process comprising a plurality of activities. Next, code may be produced, based on the received user selectable element, configured to implement the process. Then the code may be executed and an exception may be detected during the code execution. The exception may be scheduled in a queue and one of the following may be performed: handling the exception and compensating for the exception. Handing the exception may comprise undoing one of the plurality of activities that was partially completed and unsuccessful. Compensating for fie exception may comprise undoing one of the plurality of activities that was completed.
    Type: Application
    Filed: June 26, 2007
    Publication date: January 1, 2009
    Applicant: Microsoft Corporation
    Inventors: Andrey Tolskyakov, Mohammed Fadel Shatnawi
  • Publication number: 20080310538
    Abstract: The present invention provides a versatile system for selectively spreading carrier data across multiple carrier paths within an Orthogonal Frequency Division Multiplexing (OFDM) system (200), particularly an ultra-wideband (UWB) system. The present invention provides a data input (202), which passes data to a randomizer (204). The data then passes to a convolutional code function (206), the output of which is punctured by puncturing function (208). An interleaver function (210) receives the punctured code data, and cooperatively operates with a mapper element (218) to prepare the coded data for pre-transmission conversion by an IFFT (220). The mapper element (218) comprises a dual carrier modulation function (216), which associates and transforms two punctured code data elements into a format for transmission on two separate signal tones.
    Type: Application
    Filed: August 26, 2008
    Publication date: December 18, 2008
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Srinath Hosur, Jaiganesh Balakrishnan, Anuj Batra
  • Publication number: 20080307025
    Abstract: A network system and a method of determining a location of a transmitter are described. The method includes reading a signal strength of a signal transmitted by the transmitter by each of a plurality of receivers, at each frequency in a plurality of frequencies, extracting phase information using an amplitude of the signal at each of the plurality of frequencies, and applying a transform (such as a Fourier Transform) to the signal in the frequency domain to obtain a representation of the signal in the time-domain. The method further includes applying a time window to the signal in the time-domain to eliminate reflected multipath signals that arrive to the respective receivers later than a line-of-sight signal to obtain a windowed signal in the time domain, and calculating a location of the transceiver using the windowed time domain signal.
    Type: Application
    Filed: June 11, 2007
    Publication date: December 11, 2008
    Applicant: ZYLAYA CORPORATION
    Inventor: Stanislav Licul
  • Publication number: 20080301212
    Abstract: A method and system makes date-time conversions and complex date-time calculations between dates of different calendaring systems. The conversion method herein allows embedded, real-time conversion in computer applications and systems between multiple calendaring systems. A date of a first date-time format is converted to any date of a second date-time format after a transformation to a temporal reference or epoch date. The conversion method can be embedded into any code space to enable full date-time conversion abilities. The real-time conversion of the conversion method requires no conversion tables and no post-processing manipulation thus eliminating the need for individual programmers to re-create the same date cross reference tables, or post processing algorithms. The conversion method supports conversion between any two date-time formats including the various existing Gregorian conventions.
    Type: Application
    Filed: May 30, 2008
    Publication date: December 4, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nia W. Fong, Jeffrey G. Komatsu, Jason S. Lee, Manivannan Thavasi
  • Publication number: 20080294708
    Abstract: A fast correlator transform (FCT) algorithm and methods and systems for implementing same, correlate an encoded data word (X0-XM-1) with encoding coefficients (C0-CM-1), wherein each of (X0-XM-1) is represented by one or more bits and each said coefficient is represented by one or more bits, wherein each coefficient has k possible states, and wherein M is greater than 1. Substantially the same hardware can be utilized for processing in-phase and quadrature phase components of the data word (X0-XM-1). The coefficients (C0-CM-1) can represent real numbers and/or complex numbers. The coefficients (C0-CM-1) can be represented with a single bit or with multiple bits (e.g., magnitude). The coefficients (C0-CM-1) represent, for example, a cyclic code keying (“CCK”) code set substantially in accordance with IEEE 802.11 WLAN standard.
    Type: Application
    Filed: January 24, 2008
    Publication date: November 27, 2008
    Applicant: ParkerVision, Inc.
    Inventors: Gregory S. Rawlins, Ray Kassel
  • Patent number: 7454452
    Abstract: A data processing apparatus having data cache performs an N-point radix-R Fast Fourier Transform. If the data set is smaller than the data cache, the data processing apparatus performs the Fast Fourier Transform in logRN stages on all the data set in one pass. If the data set is larger than the data cache but smaller than R times the data cache, the data processing apparatus performs a first stage radix-R butterfly computation on all the input data producing R independent intermediate data sets. The data processing apparatus then successively performs second and all subsequent stage butterfly computations on each independent intermediate data set in turn producing corresponding output data. During the first stage radix-R butterfly computations, each of R continuous sets are separated in memory by memory locations equal to the size of a cache line.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: November 18, 2008
    Assignee: Texas Instruments Incorporated
    Inventor: Oliver P. Sohm
  • Publication number: 20080273808
    Abstract: Fast transforms that use early aborts and precision refinements are disclosed. When to perform a corrective action is detected based upon testing the incremental calculations of transform coefficients. Corrective action is then performed. The corrective action includes refining the incremental calculations to obtain additional precision and/or aborting the incremental calculations when the resulting numbers are sufficient.
    Type: Application
    Filed: July 18, 2008
    Publication date: November 6, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joan LaVerne MITCHELL, Jennifer Quirin TRELEWICZ, Michael Thomas BRADY
  • Publication number: 20080270504
    Abstract: A system processes discrete digital data according to a function, the discrete digital data including data values and time stamps, the time stamps being at non-uniform time intervals according to a time scale. The system comprises a processor having program instructions for implementing the function in terms of state space equations, using system design and data flow language software; inputting the discrete data into the implementation of the function; and outputting the result as an output discrete data stream of new data values and time stamps.
    Type: Application
    Filed: April 30, 2007
    Publication date: October 30, 2008
    Inventor: Lee A. Barford
  • Patent number: 7433909
    Abstract: A computational unit, or node, in a adaptable computing system is described. A preferred embodiment of the node allows the node to be adapted for use for any of ten types of functionality by using a combination of execution units with a configurable interconnection scheme. Functionality types include the following: Asymmetric Finite Impulse Response (FIR) Filter, Symmetric FIR Filter, Complex Multiply/FIR Filter, Sum-of-absolute-differences, Bi-linear Interpolation, Biquad Infinite Impulse Response (IIR) Filter, Radix-2 Fast Fourier Transform (FFT)/Inverse Fast Fourier Transform (IFFT), Radix-2 Discrete Cosign Transform (DCT)/Inverse Discrete Cosign Transform (IDCT), Golay Correlator, Local Oscillator/Mixer.
    Type: Grant
    Filed: May 21, 2003
    Date of Patent: October 7, 2008
    Assignee: NVIDIA Corporation
    Inventor: W. James Scheuermann
  • Publication number: 20080243977
    Abstract: A pseudorandom number generator reduced in size while maintaining high security is disclosed. The generator has a state storage unit of 2 blocks (n bits per block) and a buffer of plurality of blocks, and mixes their contents to obtain a random number sequence. The mixing is done by a nonlinear transformation unit for inputting the stored content of the buffer to output data of the same size as the input data, a first linear transformation unit for inputting the content of the state storage unit and the output of the nonlinear transformation unit to store an output into the state storage unit, and a second linear transformation unit for inputting the stored content of the buffer and the stored content of the state storage unit to store an output into the buffer. The mixed content of the state storage unit is output as a random number sequence.
    Type: Application
    Filed: November 30, 2007
    Publication date: October 2, 2008
    Inventors: Dai Watanabe, Hirotaka Yoshida
  • Publication number: 20080235312
    Abstract: The present invention relates to a method and an arrangement for suppressing noise in digital signal sequences, and to a corresponding computer program and a corresponding computer-readable storage medium, which can be used in particular to smooth and/or improve the signal-to-noise ratio in digital signal processing and in digital image processing. To this end, there is proposed a method for suppressing noise in digital signal sequences, wherein data values W0 of the signal sequence are transformed by evaluating data values Wi from an area around data values W0 to be transformed, characterized in that the number of data values Wi to be evaluated for the transformation of a data value W0 is determined individually for at least some of the data values W0 to be transformed.
    Type: Application
    Filed: August 7, 2006
    Publication date: September 25, 2008
    Applicant: NXP B.V.
    Inventor: Rainer Mintzlaff
  • Publication number: 20080235313
    Abstract: A signal processing method includes a first step of calculating a value indicating a value obtained by multiplying a ratio of the number of times of inputting the input signal having any one of values from p to m, where m is a maximum value of values of input signal which are subject to said signal processing and p is a value smaller than m and not a minimum value of the input signal, within a predetermined period to the number of times of inputting the input signal within the predetermined period, by the variable range of the converted value; and a second step of subtracting the calculated value from a maximum value within the variable range of the converted value or a value near the maximum value, wherein the input signal is converted according to the conversion characteristic specified based on a value obtained by subtraction.
    Type: Application
    Filed: June 2, 2008
    Publication date: September 25, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Izumi Kanai
  • Publication number: 20080215653
    Abstract: A data processing device includes at least one first and one second component which are coupled to one another. The first component is operable in a first endian mode, while the second component is operable in a second endian mode, which is different from the first endian mode.
    Type: Application
    Filed: December 21, 2007
    Publication date: September 4, 2008
    Inventors: Gunther Fenzl, Carsten Sydow
  • Publication number: 20080215652
    Abstract: A device of dynamic communication of information allows, on the average, non-integer bits per symbol transmission, using a compact code set or a partial response decoding receiver. A stream of selectable predetermined integer bits, e.g., k or k+1 data bits, is grouped into a selectable integer number of bit vectors which then are mapped onto corresponding signal constellations forming transmission symbols. Two or more symbols can be grouped and further encoded, so that a symbol is spread across the two or more symbols being communicated. Sequence estimation using, for example, maximum likelihood techniques, as informed by noise estimates relative to the received signal. Each branch metric in computing the path metric of a considered sequence at the receiver is weighted by the inverse of the noise power. It is desirable that the constellation selection, sequence estimation and noise estimation be performed continuously and dynamically.
    Type: Application
    Filed: August 7, 2007
    Publication date: September 4, 2008
    Applicant: Broadcom Corporation
    Inventors: Thuji Simon LIN, Steven Jaffe, Robindra Joshi
  • Publication number: 20080208942
    Abstract: An extension to current multiple memory bank video processing architecture is presented. A more powerful memory controller is incorporated, allowing computation of multiple memory addresses at both the input and the output data paths making possible new combinations of reads and writes at the input and output ports. Matrix transposition computations required by the algorithms used in image and video processing are implemented in MAC modules and memory banks. The technique described here can be applied to other parallel processors including future VLIW DSP processors.
    Type: Application
    Filed: February 23, 2007
    Publication date: August 28, 2008
    Inventors: Nara Won, Ching-Yu Hung
  • Publication number: 20080208943
    Abstract: When sample data is played back, audio guide data G1 and G2 and subsequent frame data are played back based on usage license information L1 contained in the sample data. When high-quality data is generated, the audio guide data G1 and G2 and the usage license information L1 are overwritten based on usage license information L2 contained in additional data. When the high-quality data is played back, audio guide data G1? and G2? and subsequent frame data are played back based on usage license information L3. A user is then able to identify the playback status of the sample data or high-quality data by listening to an audio guide.
    Type: Application
    Filed: December 21, 2007
    Publication date: August 28, 2008
    Inventors: Naoya Haneda, Kyoya Tsutsui
  • Publication number: 20080201085
    Abstract: Various methods for visualization of output from a liquid-liquid chromatographic instrument are provided. One or more analytes detected by a liquid-liquid chromatographic instrument are visualized by providing a data set comprising a plurality of data points corresponding to one or more analytes detected by the instrument, wherein the data points comprise at least one parameter related to a K-value or a parameter from which a K-value can be determined. A K-value is calculated for at least a portion of the data set, and at least a portion of those K-values transformed by a reciprocal transformation to generate output data having a transformed K-value, wherein the transformed K-value is a real number for all K undergoing the transformation, thereby ensuring that all analytes detected by the instrument are plotted in a single chromatogram. The output data is provided to a user.
    Type: Application
    Filed: December 20, 2007
    Publication date: August 21, 2008
    Inventors: Guido F. Pauli, J. Brent Friesen
  • Patent number: 7406212
    Abstract: In a parallel computation of a Hough transform of an array of input data values, the transform space of the Hough transform is partitioned dynamically or statically into a number of sub-spaces. Each sub-space of the transform is stored in a sub-space of memory locations. Data values from the array of input data values are passed to a plurality of processors, each processor associated dynamically or statically with a sub-space of memory locations. Each processor, acting in parallel with the other processors, updates constituent elements of the Hough transform stored in the associated sub-space memory locations dependent upon the input data value.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: July 29, 2008
    Assignee: Motorola, Inc.
    Inventors: Magdi A. Mohamed, Irfan Nasir
  • Publication number: 20080147763
    Abstract: Given a time series of possibly multicomponent input data, the method and apparatus includes a device that finds a time series of “source” components, which are possibly nonlinear combinations of the input data components and which can be partitioned into groups that are statistically independent of one another. These groups of source components are statistically independent in the sense that the phase space density function of the source time series is approximately equal to the product of density functions, each of which is a function of the components (and their time derivatives) in one of the groups. In a specific embodiment, an unknown mixture of data from multiple independent source systems (e.g., a transmitter of interest and noise producing system) is processed to extract information about at least one source system (e.g., the transmitter of interest).
    Type: Application
    Filed: December 7, 2007
    Publication date: June 19, 2008
    Inventor: David Levin
  • Patent number: 7386729
    Abstract: For the purpose of designing watermark to be robust against image modification such as geometric modification (rotating, cutting, enlarging/shrinking, etc.), compression, and blurring, the watermark is embedded in frequency domain after formed as 2 dimensional shape, for example radial or concentric shape. In detecting watermark, it is possible to effectively detect the watermark, by using relation to a generated watermark in case where the peak is detected.
    Type: Grant
    Filed: April 22, 2002
    Date of Patent: June 10, 2008
    Assignee: Markany, Inc.
    Inventors: Jung-Soo Lee, Jong-Uk Choi, Han-Ho Lee
  • Publication number: 20080086519
    Abstract: Briefly, in accordance with one embodiment, a method of designing a basis selection for matching pursuits is described
    Type: Application
    Filed: October 5, 2006
    Publication date: April 10, 2008
    Inventor: Donald Martin Monro
  • Patent number: 7346640
    Abstract: An image processing apparatus supporting both discrete wavelet transform and discrete cosine transform with reduced hardware resources. The image processing apparatus is composed of an input unit receiving a plurality of pixel data, a controlling unit selecting a desired transform from among discrete wavelet transform and discrete cosine transform, and providing a plurality of coefficients depending on the desired transform, and a processing unit which processes the pixel data using the plurality of coefficients to achieve the desired transform.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: March 18, 2008
    Assignee: NEC Electronics Corporation
    Inventor: Yoichi Katayama
  • Publication number: 20080052335
    Abstract: A method for time domain to frequency domain conversion is described. Time-domain input data is obtained. The input data is converted from the time domain to the frequency domain to provide frequency-domain data. Frequency-shifted time-domain data is produced. The frequency shifted time-domain data is converted from the time domain to the frequency domain to provide frequency-shifted frequency-domain data. The frequency-domain data is combined with the frequency-shifted frequency-domain data to produce combined frequency-domain data. The frequency-domain data is provided for further processing by a test and measurement system.
    Type: Application
    Filed: August 1, 2006
    Publication date: February 28, 2008
    Inventor: Edward C. Gee
  • Patent number: 7337204
    Abstract: Linear transformations are carried out on a matrix that represents information such as an image or a communication. In an aspect, the matrix is processed to remove duplicate information. The duplicate information can be duplicate rows, or zero rows. This matrix is then transformed into a modified matrix, indicating duplicate information is removed to produce a modified matrix.
    Type: Grant
    Filed: April 5, 2005
    Date of Patent: February 26, 2008
    Assignee: Intel Corporation
    Inventors: Avner Dor, Doron Rainish, Daniel Yellin
  • Publication number: 20080016137
    Abstract: A computer readable medium configured to approximate the integral of the product of a plurality of functions includes logic configured to factor the plurality of functions into a set of fixed functions and one varying function, logic configured to determine a first vector that represents the product of the fixed functions in the wavelet domain, logic configured to determine a second vector that represents the one varying function in the wavelet domain, and logic configured to determine an inner product of the first vector and the second vector.
    Type: Application
    Filed: March 1, 2007
    Publication date: January 17, 2008
    Applicant: University of Central Florida Research Foundation, Inc.
    Inventors: Weifeng Sun, Amar Mukherjee
  • Patent number: 7319659
    Abstract: A method of mode detection for OFDM signals. The method comprises the steps of delaying the OFDM signal for a first and second number of samples, multiplying the two delayed signals by coefficient signals, and deriving a sum of the two products, deriving an error signal by subtracting the sum of the two products from the OFDM signal, extracting amplitudes of the coefficient signals, and accordingly deriving step size signals, updating the coefficient signals according to the error signal and step size signals, detecting edges of the amplitudes of the coefficient signals, and determining the guard interval length and transmission mode according to the detected edges.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: January 15, 2008
    Assignee: Silicon Integrated System Corp.
    Inventor: Yih-Ming Tsuie
  • Publication number: 20070288541
    Abstract: The invention provides an apparatus and a method for performing a calculation operation with at least one input signal consisting of signal sections, wherein each signal section of said input signal has a constant amplitude. The apparatus comprises a signal transformation unit for transforming at least one input signal into a first intermediary signal having a virtual amplitude with respect to at least one carrier signal. The calculation unit is provided for performing the calculation operation on said first intermediary signal to generate a second intermediary signal. A signal re-transformation unit re-transforms the second intermediary signal into an output signal consisting of signal sections, wherein each signal section of said output signal has a constant amplitude.
    Type: Application
    Filed: May 19, 2006
    Publication date: December 13, 2007
    Applicant: CAMCO Produktions-und Vertriebs GmbH Fur Beschallungs-und Beleuchtungsanlagen
    Inventors: Thomas Schulze, Carsten Wegner
  • Patent number: 7296045
    Abstract: The present invention relates to a novel matrix-valued transform framework to process digital signals. According to one aspect of the invention, matrix-valued methods and apparatus are described to transform a vector-valued discrete-time data sequence from time-domain into frequency-domain. In another aspect, matrix-valued methods and apparatus are described to transform a vector-valued data sequence from frequency-domain into time-domain. Furthermore, the new framework disclosed in this invention also provides a plurality of methods and apparatus for basic signal processing functions and operations of a matrix-valued communication system. These functions and operations include but are not limited to matrix-valued fast Fourier transformation, matrix-valued linear and circular convolution, matrix-valued correlation, matrix-valued multiplexing and de-multiplexing, and matrix-valued data coding and decoding.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: November 13, 2007
    Inventor: Hasan Sehitoglu
  • Patent number: 7284026
    Abstract: Input signals are transformed with an Hadamard transformation matrix in each of the four four-point Hadamard transformation units, wherein a rounding unit rounds up the least significant bit of each of the odd number of coefficients and discards the least significant bit of each of the remaining odd number of coefficients among the four transformed coefficients output from each of the four-point Hadamard transformation units to produce four sets of four integer coefficients, and one integer coefficient is selected from each set, and four selected integer coefficients including odd number of rounded up are input to an Hadamard transformation unit and are Hadamard transformed, and the Hadamard transformed coefficients are rounded up to produce integer.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: October 16, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tadayoshi Nakayama
  • Patent number: 7263543
    Abstract: A method for transposing data in a plurality of processing elements is comprised of a plurality of shifting operations and a plurality of storing operations. The shifting and storing operations are coordinated to enable data to be stored along a diagonal of processing elements from a first direction or first pair of directions and to be output from the diagonal in a second direction or a second pair of directions perpendicular to the first pair of directions, respectively. The plurality of storing operations are responsive to the processing elements' positions. The first and second pairs of directions are selected from among the dimensions of the array, e.g., the +x/?x, +z/?z and +y/?y pairs of directions.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: August 28, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Mark Beaumont
  • Publication number: 20070180011
    Abstract: An implement method of a FFT processor comprises the following steps. First, a 21 point FFT processor, which has an output and an input receiving a 2n+1 point data, is provided. A 2n-point FFT processor having an input and an output is provided. Sequentially, a multiplexer, which has a first input coupled to the output of the 21 point FFT processor, a second input receiving a 2n point data and an output coupled to the input of the 2n point FFT processor, is provided. When an input data is a 2n point data, the second input of multiplexer is coupled to the output thereof, and when an input data is a 2n+1 point data, the first input of multiplexer is coupled to the output thereof.
    Type: Application
    Filed: December 11, 2006
    Publication date: August 2, 2007
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Hua-Han Lee, I-Hung Lin
  • Patent number: 7249153
    Abstract: The present invention is a method, system, and computer program product for implementation of a capable, general purpose compression algorithm that can be engaged “on the fly”. This invention has particular practical application with time-series data, and more particularly, time-series data obtained form a spacecraft, or similar situations where cost, size and/or power limitations are prevalent, although it is not limited to such applications. It is also particularly applicable to the compression of serial data streams and works in one, two, or three dimensions. The original input data is approximated by Chebyshev polynomials, achieving very high compression ratios on serial data streams with minimal loss of scientific information.
    Type: Grant
    Filed: August 1, 2003
    Date of Patent: July 24, 2007
    Assignee: The Johns Hopkins University
    Inventors: Andrew F. Cheng, S. Edward Hawkins, III, Lillian Nguyen, Christopher A. Monaco, Gordon G. Seagrave
  • Patent number: 7218789
    Abstract: A method for generating a first plurality of output data values and the matrix factors used to generate an approximation to an image processing transform is disclosed. The first plurality of output data values are generated by transforming a plurality of input data values using a computer and applying a modified transform stored in a modified transformation matrix to the plurality of input data values. The plurality of input data values are stored in a generated matrix, and at least one data value in this matrix is rearranged using a permutation operation and modified by applying a linear combination of the unmodified values to the at least one data value. The modified transform is an approximation to a known transform stored in a transformation matrix that is used to generate a second plurality of output data values, the first plurality of output values approximating the second plurality of output data values.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: May 15, 2007
    Assignee: LizardTech, Inc.
    Inventors: Vance Faber, Randall L. Dougherty
  • Patent number: 7200629
    Abstract: A Fast Hadamard Transform generator serially performs a Fast Hadamard Transform of a sampled signal from a first channel. The Fast Hadamard Transform generator comprises a series of stages. Each stage includes a shift register for serially receiving samples of the signal. Each stage further includes a two's complement generator for producing a two's complement of a first sample of the signal and a first multiplexer for selecting between a first sample of the signal and the two's complement of the first sample. A first adder then generates a sum of a second sample of the signal and the first sample and a difference of the second sample and the first sample and supplies the sum and the difference to the shift register of the next stage. In one embodiment the shift registers are implemented in random access memory.
    Type: Grant
    Filed: January 6, 2003
    Date of Patent: April 3, 2007
    Assignee: Infineon Technologies AG
    Inventor: Joel D. Medlock
  • Patent number: 7188132
    Abstract: The present invention provides a method and apparatus that transforms input signals X0, X1, X2, X3 using a 4-point Hadamard transform matrix, and of the resulting transformation data, rounds up the LSB of the first transformed data and rounds down the LSB of the remaining odd-numbered data. When restoring the data to its original state the rounding is executed after a Hadamard inverse transformation is performed, thereby restoring the data to its original state X0, X1, X2, X3.
    Type: Grant
    Filed: December 19, 2002
    Date of Patent: March 6, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tadayoshi Nakayama
  • Patent number: 7185037
    Abstract: Integer transforms of 4×4 blocks of the type used in proposed H.26L but adapted to 16-bit arithmetic by shifts after matrix multiplications and integer approximation matrices absorbing scaling factors.
    Type: Grant
    Filed: August 22, 2002
    Date of Patent: February 27, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Minhua Zhou
  • Patent number: 7099909
    Abstract: Fast Fourier Transforms in a radix-2 block transform method enables true split and merge transform processing of equal sized data halves in the Fourier transform domain for enabling recursive merges and splits in Fourier transform domain without data degradation. Input data in the time domain or spatial domain during either the split and merge radix-2 forward transform processing is firstly transform processed followed by combinational processing. Whole transformed data is split using combinational processing into transformed data halves in the transform domain as a true split. Transform halves are merged using combinational processing into whole merged transformed data in the transform domain. Time or spatial domain input data can be transformed into the transform domain in the form of split halves or merged whole. The split halves can be merged by the merge process combinational processing and the merged whole are split by the split process combinational processing.
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: August 29, 2006
    Assignee: The Aerospace Corporation
    Inventor: Hsieh S. Hou
  • Patent number: 7099908
    Abstract: A generalized radix-2 block transform method enables true split and merge transform processing of equal sized data halves in the transform domain enabling recursive merges and splits in transform domain data degradation. Input data in the time domain or spatial domain during either the split and merge radix-2 forward transform processing is firstly transform processed followed by combinational processing. Whole transformed data is split using combinational processing into transformed data halves in the transform domain as a true split. The transformed halves are merged using combinational processing into whole merged transformed data in the transform domain. Time or spatial domain input data can be transformed into the transform domain in the form of split halves or merged whole. The split halves can be merged by the merge process combinational processing and the merged whole can be split by the split process combinational processing.
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: August 29, 2006
    Assignee: The Aerospace Corporation
    Inventor: Hsieh S. Hou
  • Patent number: 7076515
    Abstract: A flipping algorithm for the hardware realization of Lifting-based DWT, relates a flipping algorithm and hardware architecture for the hardware realization of Lifting-based DWT, by using lifting architecture as starting point, by multiplying the edge of the cutset which is through the multiplier and the basic computing unit by the reciprocal of multiplier coefficient in order to cut off the accumulation effect of timing delay. And separating the computing node of said basic computing units into 2 adders then applying flipping architecture to shorten the critical path, therefore not only can keep the merits of Lifting Scheme in hardware requirement but also can shorten the critical path to achieve the optimized hardware architecture.
    Type: Grant
    Filed: August 16, 2002
    Date of Patent: July 11, 2006
    Assignee: National Taiwan University
    Inventors: Liang-Gee Chen, Chao-Tsung Huang, Po-Chih Tseng