Compiling Code Patents (Class 717/140)
  • Patent number: 8745406
    Abstract: The invention provides for a method of encrypting and executing an executable image, comprising; flagging sections of the executable image to be encrypted using commands in source files and compiling said executable images so as to generate object files, linking one or more of said executable images using a linker to produce a final executable image, passing said linked executable images to a post-linker encryption engine to encrypt a relocation fix-up patch table and sections of executable images flagged for encryption, and at load time decrypting relocating and executing the executable images.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: June 3, 2014
    Assignee: Nytell Software LLC
    Inventor: Colin King
  • Patent number: 8745603
    Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: June 3, 2014
    Assignee: Google Inc.
    Inventors: Morgan S. McGuire, Christopher G. Demetriou, Brian K. Grant, Matthew N. Papakipos
  • Patent number: 8745604
    Abstract: An integrated circuit includes a plurality of tiles. Each tile includes a processor, a switch including switching circuitry to forward data over data paths from other tiles to the processor and to switches of other tiles, and a switch memory that stores instruction streams that are able to operate independently for respective output ports of the switch.
    Type: Grant
    Filed: February 25, 2008
    Date of Patent: June 3, 2014
    Assignee: Massachusetts Institute of Technology
    Inventor: Anant Agarwal
  • Patent number: 8745748
    Abstract: The embodiments described herein generally relate to methods and systems for enabling a client to request a server to cancel the digital signing of a form file associated with a form. Successful cancellation of the digital signing process results in a return of the form file to its initial state, in which data are not lost, and the form can be resubmitted and/or the application of the digital signature can be retried. Request and response messages, communicated between a protocol client and a protocol server, cause the performance of protocol functions for applying a digital signature to a form file and for cancelling the signature thereof where errors in the signing process are detected. A versioning mechanism enabling the detection of version differences and resulting upgrades to the digital signature control allows for robust communications between a client and a server operating under different product versions.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: June 3, 2014
    Assignee: Microsoft Corporation
    Inventors: Silviu Ifrim, Paramita Das, Christopher A. Brotsos, Paul Michael Schofield
  • Patent number: 8745580
    Abstract: Described is a technology in a programming (development and/or runtime) environment by which data type mismatches between the output and input of computer program software components (e.g., APIs) are detected, with the output transparently converted such that the converted input may be understood by the inputting component. When components are interconnected in a programming environment, metadata associated with those components is evaluated to determine a type mismatch, e.g., between objects and arrays. If mismatched, an output object is converted to a single-element array for input, or alternatively, an output array is converted to a series of objects, each object sent within a loop for input. The transparent conversion may be performed by the programming environment during runtime, or by inserting conversion code prior to compilation.
    Type: Grant
    Filed: May 16, 2008
    Date of Patent: June 3, 2014
    Assignee: Microsoft Corporation
    Inventors: Adam D. Nathan, Andrew R. Sterland, Timothy S. Rice, Michael J. Leonard, John I. Montgomery
  • Patent number: 8745602
    Abstract: A project system is automatically configured from project capabilities determined from an instance of a build system by a project capabilities analyzer. A flexible configuration based build system defines the consuming project system. Results of an evaluated project file are used to define the overall capabilities of the build system. The capabilities are used to dynamically load and assemble the project system code. Changes in the project capabilities due to a reevaluation of a result of a build can then redefine and reassemble the project system code. Hence project system configuration is data-driven rather than user-defined and utilizes a flexible, configuration based build system to define the consuming project system.
    Type: Grant
    Filed: May 4, 2009
    Date of Patent: June 3, 2014
    Assignee: Microsoft Corporation
    Inventors: Brian Mead Tyler, Kieran Paul Mockford
  • Publication number: 20140149969
    Abstract: An example method includes obtaining annotated source code and based at least in part on a first annotation, separating the source code into first and second source code portions. The method also includes generating from the first source code portion a first source code stream to be supplied for compilation by a first compiler, the first source code stream augmented, based on the first annotation, to include additional coordination code not present in the obtained source code, and the first compiler specific to the first-type subset of the target CPUs. The method further includes generating from the second source code portion a second source code stream to be supplied for compilation by a second compiler, the second compiler specific to a second-type subset of the target CPUs. The target CPUs of the first- and second-type subsets have one or more different functionalities.
    Type: Application
    Filed: November 12, 2013
    Publication date: May 29, 2014
    Applicant: Signalogic
    Inventors: Jeffrey H. Brower, Christopher K. Johnson
  • Patent number: 8739137
    Abstract: The disclosed system provides a transformation-based implementation of forward-mode and reverse-mode automatic differentiation as a built-in, first-class function in a functional programming language. Each of these constructs imposes only a small constant factor of the computational burden (time) of the function itself, and the forward construct has the same properties in terms of space. The functions can be applied to any function, including those involving derivatives and nested closures.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: May 27, 2014
    Assignee: Purdue Research Foundation
    Inventors: Jeffrey Mark Siskind, Barak Avrum Pearlmutter
  • Patent number: 8739065
    Abstract: In a method for managing software menus using a computing device, a template file from a storage system is loaded. A name of an array, names of a plurality of software menus of the array, names of a plurality of buttons of the software menus and separators between the buttons, and parameters comprising an identifier (ID) and an image path of each of the buttons are obtained by parsing each line of instructions in the template file. A toolbar container for storing the obtained data having a predetermined memory frame is created. The software menus are established at a predetermined location in a preset window and the buttons of each of the software menus are added for each of the established software menus by reading data in the toolbar container. The window with the established software menus is displayed on a display screen.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: May 27, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Chih-Kuang Chang, Xin-Yuan Wu, Fei Wang, Heng Zhang
  • Patent number: 8739140
    Abstract: A method, a system and computer program product for resolving conflicts in applications are disclosed, A first set of instructions configured to use a second set of instructions is identified during execution of a program having the first set of instructions. A third set of instructions couples the first set of instructions to the second set of instructions. I Incompatibility between the first set of instructions and the second set of instructions is identified, in response to compiling the first set of instructions and compiling the second set of instructions. A mechanism is provided for the third set of instructions to modify the second set of instructions, which result in a modified second set of instructions compatible with the first set of instructions.
    Type: Grant
    Filed: April 28, 2013
    Date of Patent: May 27, 2014
    Assignee: International Business Machines Corporation
    Inventor: Madhusudhan R. Ramidi
  • Patent number: 8739138
    Abstract: A method, a system and computer program product for resolving conflicts in applications are disclosed, A first set of instructions configured to use a second set of instructions is identified during execution of a program having the first set of instructions. A third set of instructions couples the first set of instructions to the second set of instructions. I Incompatibility between the first set of instructions and the second set of instructions is identified, in response to compiling the first set of instructions and compiling the second set of instructions. A mechanism is provided for the third set of instructions to modify the second set of instructions, which result in a modified second set of instructions compatible with the first set of instructions.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: May 27, 2014
    Assignee: International Business Machines Corporation
    Inventor: Madhusudhan R Ramidi
  • Patent number: 8739139
    Abstract: Provided is a computer-readable, non-transitory medium storing an algorithm selection program for selecting one of algorithm among of a plurality of algorithms included in an extension program for executing a predetermined function when a call-out source program calls out the extension program, the algorithm selection program causing an information processing device including a storage device to execute:acquiring, from the storage device, selection information in which a command for calling out the extension program in the call-out source program and the one of algorithm are correlated; and selecting an algorithm for executing the predetermined function based on the acquired selection information.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: May 27, 2014
    Assignee: Fujitsu Limited
    Inventor: Ikuo Miyoshi
  • Patent number: 8738793
    Abstract: A priority selection mechanism for driving outputs from control logic which can be automatically translated to controllers of various protocols. The priority selection mechanism may assign a priority to the outputs and select the output having the highest priority as the output of the control logic. There may be an abstract representation of the priority logic which may permit a protocol mechanism to be used in the logic without the designer or user needing to know the details of the mechanism.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: May 27, 2014
    Assignee: Honeywell International Inc.
    Inventors: Stalin Gutha, Janaki Krishnaswamy, Lavanya Bhadriraju, Ankur Jhawar, Kevin B. Moore, Subramanya Nagaraj
  • Patent number: 8738887
    Abstract: A method is described for preserving the flexibility associated with relative memory addressing in programs designed to be stored in read-only memory.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: May 27, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Balakrishnan Thoppaswamy, Chang-Hwa Lee, Eddie Howard, Eric Lee, Feng Ding, Simon Lian, Vinod Jani, Yevgen Goryachok
  • Patent number: 8732680
    Abstract: Techniques for representing a program are provided. The techniques include creating one or more sub-variables for each of one or more variables in the program, and maintaining a single size of each of the one or more variables throughout a life-span of each of the one or more variables. Additionally, techniques for performing register allocation are also provided. The techniques include representing bit-width information of each of one or more variables in a powers-of-two representation, wherein the one or more variables comprise one or more variables in a program, coalescing the one or more variables, packing the one or more coalesced variables, and using the one or more packed variables to perform register allocation.
    Type: Grant
    Filed: February 19, 2009
    Date of Patent: May 20, 2014
    Assignee: International Business Machines Corporation
    Inventors: Rajkishore Barik, Krishna Nandivada Venkata
  • Patent number: 8732681
    Abstract: A debug tool that generates a call stack listing by analyzing the crash memory dump data without relying on register data values. The tool uses information gathered by the compiler and linker when the program was compiled and linked, including the stack's size and location in memory. By examining the stack location in the crash memory dump image in conjunction with the debugging data generated by the compiler and the linker and any existing trace data, the last valid frame may be reconstructed indicating the location of the crash.
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: May 20, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Darian Robert Peter Sale, Brian Cruickshank
  • Patent number: 8732674
    Abstract: A target program is instrumented during execution by using statements in high-level programming languages, without restarting the target and without modifying the compiled binary of the target on disk. The target and the analysis program modifying it may each include managed code. The target program is presented by an instrumentation API as a queryable database, rather than a mere sequence of processor-level instructions. An instrumentation context for the target program's execution image is obtained, with identifications of functions, individual instructions, and other instrumentable items that satisfy criteria specified in a query. Functions and low-level instructions may be identified as satisfying the query regardless of whether they have executed yet. High-level statements transform query-satisfying items in the target's execution image, by appending code, injecting a fault, replacing an individual instruction, or replacing an individual operand.
    Type: Grant
    Filed: November 14, 2012
    Date of Patent: May 20, 2014
    Assignee: Microsoft Corporation
    Inventor: Karim Agha
  • Patent number: 8732682
    Abstract: The system and methods described herein may be used to detect and tolerate atomicity violations between concurrent code blocks and/or to generate code that is executable to detect and tolerate such violations. A compiler may transform program code in which the potential for atomicity violations exists into alternate code that tolerates these potential violations. For example, the compiler may inflate critical sections, transform non-critical sections into critical sections, or coalesce multiple critical sections into a single critical section. The techniques described herein may utilize an auxiliary lock state for locks on critical sections to enable detection of atomicity violations in program code by enabling the system to distinguish between program points at which lock acquisition and release operations appeared in the original program, and the points at which these operations actually occur when executing the transformed program code.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: May 20, 2014
    Assignee: Amazon Technologies, Inc.
    Inventors: Virendra J. Marathe, David Dice
  • Publication number: 20140137087
    Abstract: Methods and apparatus for target typing of overloaded method and constructor arguments are described. A method comprises determining whether source code of a program includes, as an argument to an overloaded operation invocation, an expression whose type is context-dependent. The method further comprises, if the source code includes such an argument, providing the expression as an input to an overload resolver, and determining at the overload resolver whether (a) each argument of the invocation is compatible with types of corresponding parameters in one or more declarations and (b) whether a particular declaration among such a set of declarations can be identified as the most specific. If both conditions are met, the method comprises generating executable instructions for the invocation.
    Type: Application
    Filed: November 14, 2012
    Publication date: May 15, 2014
    Applicant: ORACLE INTERNATIONAL CORPORATION
    Inventors: Maurizio Cimadamore, Daniel Lee Smith, Brian Goetz
  • Patent number: 8726255
    Abstract: Executable code may be recompiled so that generic portions of code may be replaced with specific portions of code. The recompilation may customize executable code for a specific use or configuration, making the code lightweight and executing faster. The replacement mechanism may replace variable names with fixed values, replace conditional branches with only those branches which are known to be executed, and may eliminate executable code portions that are not executed. The replacement mechanism may comprise identifying known values defined in the executable code for variables, and replacing those variables with the constant value. Once the constants are substituted, the code may be analyzed to identify branches that may be evaluated using the constant values. Those branches may be reformed using the constant value and the rest of the conditional code that may not be accessed may be removed.
    Type: Grant
    Filed: May 1, 2012
    Date of Patent: May 13, 2014
    Assignee: Concurix Corporation
    Inventors: Alexander G. Gounares, Charles D. Garrett
  • Patent number: 8726229
    Abstract: A plurality of domain-specific service adaptation languages can be supported by a back-end service adaptation system to provide runtime access to a runtime instance of a data object comprising data stored in a repository. By defining a language-specific data access service and parser for each domain-specific service adaptation language, a single, service adaptation language-independent compiler and interpreter can prepare and execute a runtime load that includes an execution plan for retrieving and converting data from the repository for delivery in a data object according to a query request from a consumer runtime environment. A consumer using the consumer runtime environment can define the service adaptation language to be used and provide a parser and source code to enable access to business object data using the back-end service adaptation system.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: May 13, 2014
    Assignee: SAP AG
    Inventors: Frank Brunswig, Thomas Fiedler, Oswald Gschnitzer, Martin Hartig, Frank Jentsch, Wolfgang Koch, Markus Viol, Jens Weiler, Gerhard Wenzel
  • Patent number: 8726250
    Abstract: Programming of modules which can be reprogrammed during operation is described. Partitioning of code sequences is also described.
    Type: Grant
    Filed: March 10, 2010
    Date of Patent: May 13, 2014
    Assignee: Pact XPP Technologies AG
    Inventors: Martin Vorbach, Armin Nückel
  • Patent number: 8726251
    Abstract: Embodiments of the invention provide systems and methods for automatically parallelizing loops with non-speculative pipelined execution of chunks of iterations with pre-computation of selected values. Non-DOALL loops are identified and divided the loops into chunks. The chunks are assigned to separate logical threads, which may be further assigned to hardware threads. As a thread performs its runtime computations, subsequent threads attempt to pre-compute their respective chunks of the loop. These pre-computations may result in a set of assumed initial values and pre-computed final variable values associated with each chunk. As subsequent pre-computed chunks are reached at runtime, those assumed initial values can be verified to determine whether to proceed with runtime computation of the chunk or to avoid runtime execution and instead use the pre-computed final variable values.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: May 13, 2014
    Assignee: Oracle International Corporation
    Inventors: Spiros Kalogeropulos, Partha Pal Tirumalai
  • Patent number: 8726252
    Abstract: A compiler of a single instruction multiple data (SIMD) information handling system (IHS) identifies “if-then-else” statements that offer opportunity for conditional branch conversion. The SIMD IHS employs a processor or processors to execute the executable program. During execution, the processor generates and updates SIMD lane mask information to track and manage the conditional branch loops of the executing program. The processor saves branch addresses and employs SIMD lane masks to identify conditional branch loops with different branch conditions than previous conditional branch loops. The processor may reduce SIMD IHS processing time during processing of compiled code of the original “if-then-else” statements. The processor continues processing next statements inline after all SIMD lanes are complete, while providing speculative and parallel processing capability for multiple data operations of the executable program.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: May 13, 2014
    Assignee: International Business Machines Corporation
    Inventors: Alexandre E. Eichenberger, Brian Flachs, Dorit Nuzman, Ira Rosen, Ulrich Weigand, Ayal Zaks
  • Patent number: 8726257
    Abstract: The object file format and linker are enhanced to provide file attributes to allow flexible selection and placement of objects.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: May 13, 2014
    Assignee: Analog Devices, Inc
    Inventors: Stephen M. Kilbane, Alexander Raikman
  • Publication number: 20140130023
    Abstract: According to one embodiment of the present invention, a computer system is provided where the computer system includes a main processor, first and second active memory device. The computer system is configured to perform a method including receiving an executable module generated by a compiler, wherein the executable module includes a code section identified as executable by a first processing element in the first active memory device and a second processing element in the second active memory device. The method includes copying the code section to memory in the first device based on the code section being executable on the first device, copying the code section from the first active memory device to an instruction buffer of the first processing element and copying the code section from the first device to the second device based on the code section being executable on the second device.
    Type: Application
    Filed: November 20, 2012
    Publication date: May 8, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tong Chen, John K. O'Brien, Zehra Sura
  • Publication number: 20140130022
    Abstract: According to one embodiment of the present invention, a method for operation of a computer system including a main processor, a first and a second active memory device includes receiving an executable module generated by a compiler, wherein the executable module includes a code section identified as executable by a first processing element in the first active memory device and a second processing element in the second active memory device. The method further includes copying the code section to memory in the first device based on the code section being executable on the first device, copying the code section from the memory in the first active memory device to an instruction buffer of the first processing element and copying the code section from the memory in the first device to the second device based on the code section being executable on the second device.
    Type: Application
    Filed: November 5, 2012
    Publication date: May 8, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tong Chen, John K. O'Brien, Zehra Sura
  • Publication number: 20140130025
    Abstract: An embodiment is directed to determining, by a compiler, that a call to a named barrier is matched across all of a plurality of threads, and based at least in part on determining that the call to the named barrier is matched across all of the plurality of threads, replacing, by the compiler, the named barrier with an unnamed barrier.
    Type: Application
    Filed: November 7, 2012
    Publication date: May 8, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: International Business Machines Corporation
  • Patent number: 8719803
    Abstract: A parallelism policy object provides a control parallelism interface whose implementation evaluates parallelism conditions that are left unspecified in the interface. User-defined and other parallelism policy procedures can make recommendations to a worker program for transitioning between sequential program execution and parallel execution. Parallelizing assistance values obtained at runtime can be used in the parallelism conditions on which the recommendations are based. A consistent parallelization policy can be employed across a range of parallel constructs, and inside recursive procedures.
    Type: Grant
    Filed: June 4, 2008
    Date of Patent: May 6, 2014
    Assignee: Microsoft Corporation
    Inventors: Stephen Toub, Igor Ostrovsky, Joe Duffy, Vance Morrison, Huseyin Yildiz
  • Patent number: 8719839
    Abstract: A computer system may comprise a computer platform and input-output devices. The computer platform may include a plurality of heterogeneous processors comprising a central processing unit (CPU) and a graphics processing unit) GPU, for example. The GPU may be coupled to a GPU compiler and a GPU linker/loader and the CPU may be coupled to a CPU compiler and a CPU linker/loader. The user may create a shared object in an object oriented language and the shared object may include virtual functions. The shared object may be fine grain partitioned between the heterogeneous processors. The GPU compiler may allocate the shared object to the CPU and may create a first and a second enabling path to allow the GPU to invoke virtual functions of the shared object. Thus, the shared object that may include virtual functions may be shared seamlessly between the CPU and the GPU.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: May 6, 2014
    Assignee: Intel Corporation
    Inventors: Shoumeng Yan, Xiaocheng Zhou, Ying Gao, Mohan Rajagopalan, Rajiv Deodhar, David Putzolu, Clark Nelson, Milind Girkar, Robert Geva, Tiger Chen, Sai Luo, Stephen Junkins, Bratin Saha, Ravi Narayanaswamy, Patrick Xi
  • Patent number: 8719804
    Abstract: Instances of a same application execute on different respective hosts in a cloud computing environment. Instances of a monitor application are distributed to concurrently execute with each application instance on a host in the cloud environment, which provides user access to the application instances. The monitor application may be generated from a specification, which may define properties of the application/cloud to monitor and rules based on the properties. Each rule may have one or more conditions. Each monitor instance running on a host, monitors execution of the corresponding application instance on that host by obtaining from the host information regarding values of properties on the host per the application instance. Each monitor instance may evaluate the local host information or aggregate information collected from hosts running other instances of the monitor application, to repeatedly determine whether a rule condition has been violated. On violation, a user-specified handler is triggered.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: May 6, 2014
    Assignee: Microsoft Corporation
    Inventor: Navendu Jain
  • Patent number: 8719813
    Abstract: A preparsers tool is provided for converting Software Communications Architecture (SCA) Extensible Markup Language (XML) files into Common Object Request Broker Architect (CORBA) structures usable by a Software Communications Architect (SCA) Core Framework (CF). The preparsers tool retrieves a set of target environment implementation definitions (TEID) that define at least one characteristic of a target environment to which a CORBA Common Data Representation (CDR) file is provided. For each component in the target environment, one or more dependencies are merged into an implementation device dependencies list that comprises visible device dependencies and external device dependencies. The parsed set of XML files is converted into a CORBA structure type, the conversion based at least in part on the TEID, such that the conversion of the parsed set of XML files results in a CORBA structure having a type and precedence order that is correct for the target environment.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: May 6, 2014
    Assignee: Raytheon Company
    Inventors: Gerald L. Bickle, Susan J. Silver
  • Publication number: 20140123118
    Abstract: In accordance with various embodiments, systems and methods are provided which facilitate inferring immutability of variables. A compiler analyzes local variables within source code to determine whether they are immutable. In particular embodiments the compiler examines locations where each variable is assigned to determine whether the variable was definitely unassigned before the assignment. Because the compiler can infer whether a local variable is immutable, it is possible for the programmer to avoid using a keyword to expressly declare the local variable as immutable. Inferring immutability of variables, thus, maintains correctness of the compiled code while reducing the burden on the programmer.
    Type: Application
    Filed: November 14, 2012
    Publication date: May 1, 2014
    Applicant: ORACLE INTERNATIONAL CORPORATION
    Inventors: Brian Goetz, Alexander Buckley, Daniel Smith, Maurizio Cimadamore
  • Publication number: 20140123101
    Abstract: Provided are a tool for supporting open computing language (OpenCL) application software development for an embedded system and a supporting method thereof. The tool in conjunction with a target system includes a project management unit configured to separate and store OpenCL application software constituted of a host program and a kernel program into a host source code corresponding to the host program and a kernel source code corresponding to the kernel program, and manage a tool-chain corresponding to an OpenCL platform of the target system, and a builder configured to determine a compile type of the kernel source code and determine whether the kernel source code is built in response to the compile type. Accordingly, it is possible to rapidly provide a tool for supporting OpenCL application software development that can develop OpenCL application software for an embedded system.
    Type: Application
    Filed: August 13, 2013
    Publication date: May 1, 2014
    Applicant: Electronics and Telecommunications Research Institute
    Inventor: Jeong Si KIM
  • Patent number: 8713543
    Abstract: A method and software system allowing the ability to use an existing Excel model and extract the business intelligence, relationships, computations and model into pure mathematical relationships and codes such that the business intelligence in the original model is completely protected and the model can be run at extremely high speed and advanced simulations of hundreds of thousands to millions of trials can be run.
    Type: Grant
    Filed: February 11, 2009
    Date of Patent: April 29, 2014
    Inventor: Johnathan C. Mun
  • Patent number: 8713539
    Abstract: An electronic device is provided that, in an embodiment, saves a plurality of values for a variable specified by a condition after a respective plurality of encounters of a breakpoint by a program that modifies the variable. One of the plurality of values is selected based on a condition. A determination is made whether to stop execution of the program at the breakpoint based on the one of the plurality of the values. Execution of the program is stopped at the breakpoint if the determining is true. The program is allowed to continue to execute if the determining is false.
    Type: Grant
    Filed: January 26, 2012
    Date of Patent: April 29, 2014
    Assignee: International Business Machines Corporation
    Inventors: Cary Lee Bates, Paul W. Buenger, Steven Gene Halverson
  • Patent number: 8713530
    Abstract: Disclosed herein are techniques for compiling a procedure for testing a page. In some implementations, a component definition for a component instance referred to in computer programming language instructions defining a test procedure for testing a page may be received. The page may be defined by a page description implemented in a markup language. The page description may include a reference to a first portion of a component instance. Compiled wrapper code operable to simulate the presence of the component instance may be generated. The compiled wrapper code may represent the first portion of the component instance referenced in the page description. A compiled test procedure may be generated based on the computer programming language instructions. The compiled test procedure may include the compiled wrapper code. The compiled test procedure may be capable of being executed to perform the test procedure.
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: April 29, 2014
    Assignee: salesforce.com, inc.
    Inventors: Andrew Waite, Alan Ballard, K. Sagar Wanaselja, Richard Unger
  • Patent number: 8707277
    Abstract: A preparser tool is provided for converting Software Communications Architecture (SCA) Extensible Markup Language (XML) files into Common Object Request Broker Architecture (CORBA) structures usable by an SCA Core Framework (CF) and comprises a CF_PreParsers interface definition language (IDL) and a first preparser. The CF_IDL is configured to be in operable communication with an XML parser and with at least a first type of preparser. The first type of preparser is in operable communication with the CF_PreParsers IDL, is associated with a first type of descriptor for the CF, and is configured to call the XML parser to request parsing of a first set of first XML files, convert the first parsed set of first XML files into a first CORBA structure type, encode the first CORBA structure type into a first CORBA Common Data Representation (CDR) file; and write the first CORBA CDR file as a first octet sequence.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: April 22, 2014
    Assignee: Raytheon Company
    Inventors: Gerald L. Bickle, Susan J. Silver
  • Patent number: 8707286
    Abstract: Unique context-based code enhancement of the core functionality of standard source code objects is performed at any position in the code. Desired insertion/replacement position(s) input by a user trigger the generation of a unique context for an enhancement. The unique context is based on characteristics of the code in the standard source code objects, such as the statements proximate to the insertion/replacement position(s). The unique context is associated with one or more extension source code objects that, when integrated into the existing source code at the insertion/replacement position(s), will provide the enhancement. At compile-time, the unique context used to unambiguously locate the insertion/replacement position(s). The extension source code objects can include industry or customer extensions, add-ons, plug-ins, and the like.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: April 22, 2014
    Assignee: SAP AG
    Inventor: Michael Schneider
  • Patent number: 8701104
    Abstract: A system and method for executing a user agent in an electronic device. Upon each startup of the user agent, the electronic device loads binary code of a base version of the user agent into memory, and determines whether a binary patch has previously been downloaded. If the patch has been downloaded, it is applied to the base version and the updated base version is executed. The binary patch may be downloaded from a server, which compiles the binary patch on the basis of stored source code of the base version and stored source code of one or more enhancements selected by the electronic device.
    Type: Grant
    Filed: December 14, 2009
    Date of Patent: April 15, 2014
    Assignee: Opera Software ASA
    Inventor: Torbjörn Söderstedt
  • Patent number: 8701097
    Abstract: A compiler and method of optimizing code by partial inlining of a subset of blocks of called blocks of code into calling blocks of code. A restart of the called blocks of code is provided for the case where non-inlined blocks of code are reached at run time. Blocks selected for partial inlining may include global side effects depending on the computer program environment. Global side effects in the selected blocks of code leading to a restart are sanitized in order to defer changes to the global state of the computer program.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: April 15, 2014
    Assignee: International Business Machines Corporation
    Inventors: Patrick R. Doyle, James I. A. Gartley, Derek B. Inglis, Vijay Sundaresan
  • Patent number: 8698818
    Abstract: Systems, methods, and computer-readable media for optimizing emulated fixed-function and programmable graphics operations are provided. Data comprising fixed function and programmable states for an image or scenario to be rendered is received. The data for the image is translated into operations. One or more optimizations are applied to the operations. The optimized operations are implemented to render the scenario.
    Type: Grant
    Filed: May 15, 2008
    Date of Patent: April 15, 2014
    Assignee: Microsoft Corporation
    Inventors: Blake Pelton, Andy Glaister, Mikhail Lyapunov, Steve Kihslinger, David Tuft
  • Publication number: 20140101642
    Abstract: An approach is provided in which a set of common instructions are each executed by at least two processor cores. Each of the processor cores queues values resulting from at least one of the common instructions (a critical section). The queued values are compared by a queued comparator. An exception is issued in response to the comparison revealing unequal values having been queued by the processor cores.
    Type: Application
    Filed: October 10, 2012
    Publication date: April 10, 2014
    Inventors: Gary R. Morrison, Brian C. Kahne, Anthony M. Reipold
  • Patent number: 8695018
    Abstract: A computing device programmed with an extensible framework that accepts one or more mark-up language parsers and/or generators, each implemented as plug-ins to the framework, with different plug-ins enabling different kinds of mark up languages to be handled by the device. In this way, the client is no longer tied to a single kind of parser or generator; it can operate with any different kind of parser compatible with the intermediary layer, yet it remains far simpler that prior art clients that are hard-coded to operate directly with several different kinds of parsers and generators.
    Type: Grant
    Filed: October 7, 2004
    Date of Patent: April 8, 2014
    Assignee: Nokia Corporation
    Inventor: David Kren
  • Patent number: 8694975
    Abstract: A first compiler generates one or more object codes from a program code for a first processor included in an arithmetic processing system to which a plurality of processors are mutually connected. A first linker links the generated one or more object codes to generate an execution file for the first processor. A parameter information generation unit generates, based on the information acquired from the first linker, parameter information used in a second processor included in the arithmetic processing system. A second compiler refers to a program code and the parameter information for the second processor to generate one or more object codes. A second linker links the generated one or more object codes to generate an execution file for the second processor.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: April 8, 2014
    Assignee: NEC Corporation
    Inventor: Tomoyoshi Kobori
  • Patent number: 8694974
    Abstract: A compiled program has an advanced-load instruction and a load-checking atomic section. The load-checking atomic section follows the advanced-load instruction in the compiled program. The advanced-load instruction, when executed, loads a value from a shared memory address. The load-checking atomic section includes a check instruction for checking the validity of the shared memory address.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: April 8, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Arvind Krishnaswamy
  • Patent number: 8694682
    Abstract: A virtual execution system that is configured to be used in a resource-constrained device. The resource-constrained device includes an operating system and an application program that includes instructions. The virtual execution system includes an execution engine that is configured to execute the application program, and to facilitate the compatibility of the application program with the operating system. Non-functional aspects characterize the instructions and the operating system. The execution engine has access to the non-functional aspects, and implements improvements during the execution of the application program based on the non-functional aspects.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: April 8, 2014
    Assignee: Microsoft Corporation
    Inventors: Frank Siegemund, Robert Sugar, Wolfgang Manousek
  • Patent number: 8694760
    Abstract: A branch prediction mechanism within an information processing device comprises a call stack where function arguments are stacked when function calls are performed. The call stack stores arguments relating to branch instructions within the function. The branch prediction mechanism stores the branch instruction address, the leading value of the call stack, and the branch destination address at branch instruction execution time, which are in correspondence, in a branch result buffer. A branch prediction unit obtains the branch instruction address and leading value of the call stack when notified of branch instruction execution, searches the branch result buffer for a branch destination corresponding to the address and leading value, and predicts the search result as the branch destination of the executed branch instruction. An instruction fetch unit fetches instructions from the branch destination predicted by the branch prediction unit.
    Type: Grant
    Filed: May 19, 2010
    Date of Patent: April 8, 2014
    Assignee: Panasonic Corporation
    Inventor: Katsushige Amano
  • Patent number: 8694978
    Abstract: Methods, systems, computer-readable media, and apparatus for determining function side effects of a program function are disclosed. Source code of one or more prototype functions that is configured to simulate the function side-effect behaviors of a program function can be provided, and the compiler can determine the functional side effects of the program function in various specific program contexts based on the source code of the prototype functions rather than the source code of the program function. Optimization procedures can be performed based on the function side effects of the program function derived from the prototype functions and the program contexts.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: April 8, 2014
    Assignee: Google Inc.
    Inventors: Silvius V. Rus, Xinliang David Li
  • Publication number: 20140096115
    Abstract: Providing change information includes obtaining information of a change track that changes software source code, wherein the change track includes a change item, identifying at least one preliminary candidate change item from the change item, wherein the preliminary candidate change item is a change item causing execution of the source code to change, and inserting an instrument in the source code at a location corresponding to the at least one preliminary candidate change item so information of at least one candidate change item is outputted in testing the source code using a test case. The at least one candidate change item is a change item related to the test case from the at least one preliminary candidate change item. The information of a change track is combined with the information of a candidate change item. The change-related information is provided based on the result of the combination.
    Type: Application
    Filed: September 24, 2013
    Publication date: April 3, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Xiao Feng Guan, Jian Jiang, Cao Lei