Abstract: Provided is a compiling method and apparatus for scheduling a block in a pipeline. The compiling method for scheduling a block in a pipeline may include profiling, using a processor, an access count of a block in a control flow of a program code, determining that the block is an important block, in response to an edge count of an edge entering the block being greater than or equal to a predetermined value, the edge count being included in the access count of the block, and scheduling the important block based on the access count to prevent a register writeback conflict.

Abstract: A data processing apparatus that generates an object code from a source code, includes a unit that sets, for an access to a property of an object included in the source code, an offset of a one-dimensional array that stores a value in correspondence with a property in an offset table of hidden type data provided to correspond to the object, and accesses the property via the offset table.

Abstract: An electronic device comprising at least a motherboard (102) with a digital control unit (101), a plurality of resources (105, 106, 107, 108, 109), and at least one memory support (104) containing a firmware and able to hold an executable program. The firmware is able to carry out a virtualization of the resources of the electronic device, assigning virtual addresses to these resources. The executable program exchanges information or instructions with the electronic device by using these virtual addresses.

Abstract: A protocol independent programming tool for constructing control logic. The control logic may be constructed without dealing in the details of an underlying protocol. The protocol details may be abstracted and exposed and generic points used in constructing the logic. The tool may automatically map or translate the points used in the logic to protocol specific entities.

Abstract: Processes in a message passing system may be launched when messages having data patterns match a function on a receiving process. The function may be identified by an execution pointer within the process. When the match occurs, the process may be added to a runnable queue, and in some embodiments, may be raised to the top of a runnable queue. When a match does not occur, the process may remain in a blocked or non-executing state. In some embodiments, a blocked process may be placed in an idle queue and may not be executed until a process scheduler determines that a message has been received that fulfills a function waiting for input. When the message fulfills the function, the process may be moved to a runnable queue.

Abstract: A communication stack for software-hardware co-execution on heterogeneous computing systems with processors and reconfigurable logic, in one aspect, may comprise a crossbar operable to connect hardware user code and functioning as a platform independent communication layer. A physical interface interfaces to the reconfigurable logic. A physical interface bridge is connected to the cross and the physical interface. The physical interface bridge connects the crossbar and the physical interface via a platform specific translation layer specific to the reconfigurable logic. The crossbar, the physical interface, and the physical interface bridge may be instantiated in response to the hardware user code being generated, the crossbar instantiated with associated parameters comprising one or more routes and associated data widths. The hardware user code is assigned a unique virtual route in the crossbar.

Abstract: A communication stack for software-hardware co-execution on heterogeneous computing systems with processors and reconfigurable logic, in one aspect, may comprise a crossbar operable to connect hardware user code and functioning as a platform independent communication layer. A physical interface interfaces to the reconfigurable logic. A physical interface bridge is connected to the cross and the physical interface. The physical interface bridge connects the crossbar and the physical interface via a platform specific translation layer specific to the reconfigurable logic. The crossbar, the physical interface, and the physical interface bridge may be instantiated in response to the hardware user code being generated, the crossbar instantiated with associated parameters comprising one or more routes and associated data widths. The hardware user code is assigned a unique virtual route in the crossbar.

Abstract: The present invention discloses a method and apparatus for function calling that eliminates or reduces errors caused by calling convention mismatch by preparing a number of candidate code modules during program compiling and inserting them in a compiled program. A library of compiled candidate code modules is thus included in the complied program, which allows the user to call a function by specifying a function to be called and a library where it belongs in the source program, without need to know the calling convention thereof or to focus on the call execution process. This ensures the matching of calling convention between the caller and callee of the function while being transparent to users, so as to avoid problems caused by calling convention inconsistency.

Abstract: A technique for compiling and running high-level program on heterogeneous computers may include partitioning a program code into two or more logical units, and compiling each of the logical units into one or more executable entities. At least some of the logical units are compiled into two or more executable entities, the two or more executable entities being different compilations of the same logical unit. The two or more executable entities are compatible to run on respective two or more platforms that have different architecture.

Abstract: Files supporting a development activity in an IDE are previewed and are not added to a collection of files in a working set for the development activity. A previewed file is represented by a single preview tab displayed on the user interface. The content of a previewed file can be displayed in a preview display portion of a user interface. The preview tab can be stylistically distinct from a durable tab and can identify the current previewed file. A previewed file can be promoted to a durable file. A promoted previewed file is added to the working set for the development activity.

Abstract: A server computer system comprising: means for permitting a first and a second version of a component or application to run on the server computer system simultaneously; means for identifying one of the versions as currently applicable and the other as not currently applicable; and means for connecting a requesting client to the currently applicable version in response to a request by the client to access the component or application.

Abstract: Presently described is a decompilation method of operation and system for parsing executable code, identifying and recursively modeling data flows, identifying and recursively modeling control flow, and iteratively refining these models to provide a complete model at the nanocode level. The nanocode decompiler may be used to determine if flaws, security vulnerabilities, or general quality issues exist in the code. The nanocode decompiler outputs in a standardized, human-readable intermediate representation (IR) designed for automated or scripted analysis and reporting. Reports may take the form of a computer annotated and/or partially human annotated nanocode listing in the above-described IR. Annotations may include plain English statements regarding flaws and pointers to badly constructed data structures, unchecked buffers, malicious embedded code or “trap doors,” and the like. Annotations may be generated through a scripted analysis process or by means of an expert-enhanced, quasi-autonomous system.

Abstract: A mechanism is provided for path-sensitive analysis for reducing rollback overheads. The mechanism receives, in a compiler, program code to be compiled to form compiled code. The mechanism divides the code into basic blocks. The mechanism then determines a restore register set for each of the one or more basic blocks to form one or more restore register sets. The mechanism then stores the one or more register sets such that responsive to a rollback during execution of the compiled code. A rollback routine identifies a restore register set from the one or more restore register sets and restores registers identified in the identified restore register set.

Abstract: A method is provided for allowing programmers to specify program execution control semantics using standard programming language syntax even when the standard language does not provide a language construct for specifying execution control. In a similar manner, the approach provides programmers the ability to extend the expressiveness of a language by introducing statements expressed in the syntax of a target programming language. A program written in a first programming language may be translated into statements of a second programming language, where the target programming language is more expressive than the first. This language-based approach preserves the standard syntax of the first programming language, allowing a program written with semantic extensions to be compiled and run according to the standard on any standards-compliant system.

Abstract: A system processes a reified generic. The system includes a memory device to store programming code in a first language, the programming code including a definition and an invocation of an interface method. The system also includes a processor to translate the programming code from the first language to a second language, generate a definition of a general dispatch method, generate definitions of special dispatch methods, each of the special dispatch methods corresponding to each primitive return type of the interface method, and generate an invocation of either the general dispatch method or one of the special dispatch methods based on a return type of the interface method.

Abstract: A build system and method, including receiving attribute rules and new rules, wherein the attribute rules correspond to one or more predefined default actions of the build system, wherein the new rules specify new actions that are to be added to the build system. A graph is generated to include files specified as attributes in the attributes rules and the one or more predefined default actions that correspond to the attributes rules. A request to enable at least one of the new rules is received. Action listener rules are received, wherein the action listener rules indicate default actions and corresponding new rules of the one or more new rules. The graph is checked for default actions that are indicated in the action listener rules. Additional actions are added to the graph for new rules based on the default actions indicated in the action listener rules.

Abstract: Systems and methods are provided for writing code to access data arrays. One aspect provides a method of accessing a memory array. Data is provided within a one-dimensional array of allocated memory. A dimensional dynamic overlay is declared from within a block of statements, and the declaration initializes various attributes within an array attribute storage object. The data is accessed from within the block of statements as a dimensional indexed array using the array attribute storage object. Another aspect provides a method of creating and accessing a dimensional dynamic array. A dimensional dynamic array is declared from within a block of statements, and memory storage for the array is dynamically allocated. A dynamic overlay storage object is also provided and its attributes are initialized from the dynamic array declaration. The data is accessed as a dimensional indexed array from within the block of statements using the array attribute storage object.

Abstract: A language extension that advances safety in system programming by specifying a lifetime of a reference that represents a resource. In accordance with the language extension, the lifetime references a particular scope in a manner that the compiler generates computer-executable instructions that enforce the lifetime of the reference to be a function of (e.g., no longer than) the lifetime of the particular scope. Accordingly, the resource lifetime may be specified in advance to have a particular scope. This helps in performing resource management as typical managed language programs can allow resources to exist indefinitely. Furthermore, because the resources have a defined finite lifetime, they might be more conveniently allocated on a stack, instead of on a heap, for much more efficient processing.

Abstract: Reducing coherency problems in a data processing system is provided. Source code that is to be compiled is received and analyzed to identify at least one of a plurality of loops that contain a memory reference. A determination is made as to whether the memory reference is an access to a global memory that should be handled by a direct buffer. Responsive to an indication that the memory reference is an access to the global memory that should be handled by the direct buffer, the memory reference is marked for direct buffer transformation. The direct buffer transformation is then applied to the memory reference.

Abstract: A cloud computing interface includes a high-level compiler uses a modified flow language referred-to as “Resilient Optimizing Flow Language” (ROFL) that converts inputs relating to source program and data definitions to generate bytecode objects that can be used by an execution engine to allocate input data to “processes” created by the execution engine based on available resources, so as to evaluate or perform particular tasks on the input data.

Abstract: A method and system are provided for automatically creating an implicit literal value in a user defined enumerated data type by inserting an additional literal value, scanning the HDL design files for broken interdependencies or potential incompatibilities with the implicitly defined literal value, and modifying the HDL design files to be in accordance with the implicitly defined literal value while maintaining the semantics of the VHDL language reference model.

Abstract: A system and method for facilitating development of a computer program that interfaces with a data store. A system queries the data store to retrieve interface information, including schema information corresponding to a portion of data in the data store relevant to a user application. The system uses the retrieved information to provide an integrated development environment (IDE) to a user. The IDE may include one or more features such as completion lists, tool tips, and quick info. The schema information may be used to create synthetic types for use in the target program. The interface information may be used to create synthetic elements to be inserted into a target program. The synthetic types may be used to perform static type checking during an editing session or a program compilation, or to provide the IDE services. During a build, the synthetic elements may be removed and replaced with data store access code, which is subsequently used during program runtime to access the store.

Abstract: Systems and methods that add specifications to procedures in a garbage collector for indicating what each procedure does. Such annotations can be added in the source code, to indicate what the source code is to do when it runs—hence enabling an automatic verification of the garbage collector by a verification component. The specification can be presented as a logical formula that can be readily processed by a theorem prover, which is associated with the verification component. Such logical formulas can further employ regions to specify correctness of the garbage collector.

Abstract: Concepts and technologies are described herein for extending the behavior of a software development tool. An extension can be accessed and consumed by a software development tool to configure the software development tool to perform an operation in an extended mode. In one example, an extension can extend a compiler based on the input source code. In one configuration, the compiler extension can provide a compiler with one or more runtime semantics of various source code elements for a particular programming language. The compiler can access an extensions list to determine if the compiler is to perform a compilation operation on a particular source code element or logical unit in an extended mode.

Abstract: A stream processing platform that provides fast execution of stream processing applications within a safe runtime environment. The platform includes a stream compiler that converts a representation of a stream processing application into executable program modules for a safe environment. The platform allows users to specify aspects of the program that contribute to generation of modules that execute as intended. A user may specify aspects to control a type of implementation for loops, order of execution for parallel paths, whether multiple instances of an operation can be performed in parallel or whether certain operations should be executed in separate threads. In addition, the stream compiler may generate executable modules in a way that cause a safe runtime environment to allocate memory or otherwise operate efficiently.

Abstract: A device receives program code, and receives size/type information associated with inputs to the program code. The device determines, prior to execution of the program code and based on the input size/type information, a portion of the program code that is executable by a graphical processing unit (GPU), and determines, prior to execution of the program code and based on the input size/type information, a portion of the program code that is executable by a central processing unit (CPU). The device compiles the GPU-executable portion of the program code to create a compiled GPU-executable portion of the program code, and compiles the CPU-executable portion of the program code to create a compiled CPU-executable portion of the program code. The device provides, to the GPU for execution, the compiled GPU-executable portion of the program code, and provides, to the CPU for execution, the compiled CPU-executable portion of the program code.

Abstract: A hardware Java™ accelerator is comprised of a decode stage and a microcode stage. Separating into the decode and microcode stage allows the decode stage to implement instruction level parallelism while the microcode stage allows the conversion of a single Java™ bytecode into multiple native instructions. A reissue buffer is provided which stores the converted instructions and reissues them when the system returns from an interrupt. In this manner, the hardware accelerator need not be flushed upon an interrupt. A native PC monitor is also used. While the native PC is within a specific range, the hardware accelerator is enabled to convert the Java™ bytecodes into native instructions. When the native PC is outside the range, the hardware accelerator is disabled and the CPU operates on native instructions obtained from the memory.

Abstract: One or more embodiments provide a load balancing solution for improving the runtime performance of parallel HDL simulators. During compilation each process is analyzed to determine a simulation cost based on complexity of the HDL processes. During simulation, processes to be executed in the same simulation cycle are scheduled using the simulation costs computed at compile-time in order to reduce the delay incurred during simulation.

Abstract: A method and system for building an application are provided. The method includes generating a user model relating to a new application to be built. The user model may include at least one role with one or more associated tasks. A task list is compiled for the tasks in the user model, including removing any duplications of tasks. A task to application component mapping is accessed. The application components to which the tasks are mapped may be spread over one or more existing applications. The application components mapped to by the tasks are retrieved and compiled in the new application.

Abstract: A dynamic race detection system is provided that detects race conditions in code that executes concurrently in a computer system. The dynamic race detection system uses a modified software transactional memory (STM) system to detect race conditions. A compiler converts portions of the code that are not configured to operate with the STM system into pseudo STM code that operates with the STM system. The dynamic race detection system detects race conditions in response to either a pseudo STM transaction in the pseudo STM code failing to validate when executed or an actual STM transaction failing to validate when executed because of conflict with a concurrent pseudo STM transaction.

Abstract: A common symbol table is generated, which includes symbols of a plurality of independent applications. The symbols included in the common symbol table are common symbols of the applications. The bulky information associated with the common symbols are stored in the common symbol table, and stubs used to locate the common symbols are stored in local tables of the applications.

Abstract: A method, system, and article of manufacture are disclosed for transforming a definition of a process for delivering a service on a specified computing device. This service process definition is comprised of computer readable code. The method comprises the steps of expressing a given set of assumptions in a computer readable code; and transforming the definition by using a processing unit to apply the assumptions to the definition of the process to change the way in which the process operates. The definition of the process may be transformed by using factors relating to the specific context in or for which the definition is executed. Also, the definition may be transformed by identifying, in a flow diagram for the process, flows to which the assumptions apply, and applying program rewriting techniques to those identified flows.

Abstract: Methods and apparatus for preserving precise exceptions in code reordering by using control speculation are disclosed. A disclosed system uses a control speculation module to reorder instructions within an application program and preserve precise exceptions. Instructions, excepting and non-excepting, can be reordered by the control speculation module if the instructions meet certain conditions. When an excepting instruction is reordered, a check instruction is inserted into the program execution path and a recovery block is generated. The check instruction determines if the reordered excepting instruction actually needs to generate an exception. The recovery block contains instructions to revert the effects of code reordering. If the check instruction detects the need for an exception, the recovery block is executed to restore the architectural state of the processor and the exception is handled.

Abstract: A method and an apparatus that instructs a compiler server to build or otherwise obtain a compiled code corresponding to a compilation request received from an application are described. The compiler server may be configured to compile source codes for a plurality of independent applications, each running in a separate process, using a plurality of independent compilers, each running in a separate compiler process. A search may be performed in a cache for a compiled code that satisfies a compilation request received from an application. A reply message including the compiled code can be provided for the application, wherein the compiled code is compiled in direct response to the request, or is obtained from the cache if the search identities in the cache the compiled code that satisfies the compilation request.

Abstract: Immutable structures are employed to effect immutable parsing. In particular, an immutable parsing configuration, comprising a stack and lookahead buffer, is utilized by a parser to perform lexical and syntactical analysis of an input stream and optionally output an immutable parse tree or the like. Performance with respect to the immutable structures can be optimized utilizing sharing and lazy computation. In turn, immutability benefits are afforded with respect to parsing including safe sharing amongst services and/or across multiple threads as well as history preservation, among other things.

Abstract: Methods and apparatuses are provided for facilitating execution of kernels requiring runtime compilation. A method may include implementing a driver for a framework for handling kernels requiring runtime compilation. The method may further include receiving, by the driver, code for a kernel requiring at least partial runtime compilation for execution using the framework. The method may additionally include obtaining, by the driver, a compiled executable version of the kernel. The obtained compiled executable version of the kernel may not have been locally compiled. The method may also include causing, by the driver, the compiled executable version of the kernel to be provided for execution. Corresponding apparatuses are also provided.

Abstract: A data processing system comprising: an operating system providing an application programming interface; an application supported by the operating system and operable to make calls to the application programming interface; an intercept library configured to intercept calls of a predetermined set of call types made by the application to the application programming interface; and a configuration data structure defining at least one action to be performed for each of a plurality of sequences of one or more calls having predefined characteristics, the one or more calls being of the predetermined set of call types; wherein the intercept library is configured to, on intercepting a sequence of one or more calls defined in the configuration data structure, perform the corresponding action(s) defined by the configuration data structure.

Abstract: Compiled computer code comprising computer code instructions organized in a plurality of basic blocks is obfuscated by replacing a jump instruction in a first basic block with a function call with at least one parameter, wherein the function call when executed determines the address of the next function to execute in dependence on the parameter; inserting into the compiled computer code an instruction that allocates a value to the parameter, the value being such that the address determined by the function call corresponds to the address of the replace jump instruction. The allocation function is inserted into the computer code in a second basic block, different from the first basic block, preferably using information from a control flow graph. This can ensure that the obfuscated code cannot be disassembled without information from the CFG, while the CFG cannot be generated from the obfuscated code. Also provided is a device for code obfuscation.

Abstract: Prefetching irregular memory references into a software controlled cache is provided. A compiler analyzes source code to identify at least one of a plurality of loops that contain an irregular memory reference. The compiler determines if the irregular memory reference within the at least one loop is a candidate for optimization. Responsive to an indication that the irregular memory reference may be optimized, the compiler determines if the irregular memory reference is valid for prefetching. Responsive to an indication that the irregular memory reference is valid for prefetching, a store statement for an address of the irregular memory reference is inserted into the at least one loop. A runtime library call is inserted into a prefetch runtime library for the irregular memory reference. Data associated with the irregular memory reference is prefetched into the software controlled cache when the runtime library call is invoked.

Abstract: A program installation apparatus may install a program in an immediately executable form using a snapshot image. The snapshot image may store a partially executed result of the program. A snapshot point at which the snapshot image is created may be decided by analyzing dependency on a system execution environment of the program. The program installation apparatus may, in advance, execute a part of the program having no dependency on the system execution environment to create a snapshot image and then execute the remaining part of the program based on the snapshot image, reducing a start-up time of the program.

Abstract: The disclosed embodiments provide a system that facilitates the development and execution of a software program. During runtime of the software program, the system delays type inference on a generic type parameter of an implementation of an overloaded function, wherein the generic type parameter is associated with a type interval containing an unbounded lower limit and one or more self-typed constraints. Upon detecting a type query for a dynamic type of the generic type parameter, the system compares a queried type from the type query with a set of inference choices for the generic type parameter. If the queried type matches an inference choice from the set of inference choices, the system uses the inference choice to perform type inference on the generic type parameter.

Abstract: A compile environment is provided in a computer system that allows programmers to program both CPUs and data parallel devices (e.g., GPUs) using a high level general purpose programming language that has data parallel (DP) extensions. A compilation process translates modular DP code written in the general purpose language into DP device source code in a high level DP device programming language using a set of binding descriptors for the DP device source code. A binder generates a single, self-contained DP device source code unit from the set of binding descriptors. A DP device compiler generates a DP device executable for execution on one or more data parallel devices from the DP device source code unit.

Abstract: A JIT (Just-In-Time) compiler performs dual-mode code generation by determining whether an application has opted-in to SIMD (Single Instruction Multiple Data) code generation both at JIT-time and at runtime. The application may select the code generation mode by identifying whether it has opted-in to SIMD code generation. As a result, the underlying implementation guarantees application compatibility by allowing the application to select the code generation mode. Additionally, applications have the ability to select into different code generation modes during concurrent execution.

Abstract: A method for instrumenting a computer program, the method including identifying a program slice within a computer program, and instrumenting the program slice within the program.

Abstract: A compiling method and a processor using the same are provided. The compiling method includes simulating a first program code which includes at least one first operation command to generate a first operation result, compiling the first program code to generate a second program code which includes at least one second operation command, simulating the second program code to generate a second operation result, and comparing the first operation result with the second operation result to verify whether the second program code is valid.

Abstract: A method for generating a domain-specific software solution may include receiving a request for a solution model to accomplish one or more tasks. A domain model may be selected in response to the request for the solution model. The solution model may be configured based on the selected domain model. The solution model may be configured by selecting a set of candidate technical assets for each task of the solution model. The solution model may also be configured by determining for each candidate technical asset if the one or more requirements of the task of the solution model are satisfiable by the candidate technical asset. The solution model may be further configured by selecting a technical asset for each task to be included in a solution implementation.

Abstract: When a wait statement is encountered in an HDL simulation, the simulation kernel executes functions corresponding to other processes while waiting for the wait to mature. However, the preservation of variables and states of each process and procedure in the call chain can be complex and inefficient. An embodiment of the present invention provides a method to suspend procedures in simulation of an HDL circuit design such that processes that call procedures containing wait statements are executed on a secondary runtime stack and can be suspended by saving the state of simulation and switching simulation execution to the primary runtime stack.

Abstract: A system includes determination of first coordinates in a repository coordinate system associated with a seed component corresponding to a target build result of a first code building system, the seed component comprising a projection method between the repository coordinate system and a variant coordinate system of the first code building system, determination of second coordinates in the variant coordinate system, the second coordinates associated with an execution environment of the target build result, determination of third coordinates in the repository coordinate system based on the first coordinates, the second coordinates and the projection method, and association of the target build result with the third coordinates.

Abstract: A system, computer-readable storage medium storing at least one program, and a computer-implemented method are discussed herein. For example, an embodiment may access a game engine that defines game play logic specifying an execution of a turn in an asynchronous game. The game play logic may be independent of a client device platform. The embodiment may then select a native platform library that includes functions to coordinate game activities within the asynchronous game. The functions may be dependent on the client device platform. The embodiment may then generate an executable game based on compiling the selected native platform library with the game engine.

Abstract: Embodiments of the invention provide a platform-independent application development framework for programming an application. The framework comprises a content interface configured to provide an Application Programming Interface (API) to program the application comprising a programming code to be executed on one or more platforms. The API provided by the framework is independent of the one or more platforms. The framework further comprises an application environment configured to provide an infrastructure that is independent of the one or more platforms and one or more plug-in interfaces configured to provide an interface between the application environment and the one or more platforms.