With Decomposition Of A Precursor (except Impurity Or Dopant Precursor) Composed Of Diverse Atoms (e.g., Cvd) Patents (Class 117/88)
  • Publication number: 20100006024
    Abstract: Methods for depositing epitaxial films such as epitaxial Ge and SiGe films. During cooling from high temperature processing to lower deposition temperatures for Ge-containing layers, Si or Ge compounds are provided to the substrate. Smooth, thin, relatively defect-free Ge or SiGe layers result. Retrograded relaxed SiGe is also provided between a relaxed, high Ge-content seed layer and an overlying strained layer.
    Type: Application
    Filed: September 9, 2009
    Publication date: January 14, 2010
    Applicant: ASM AMERICA, INC.
    Inventors: Paul D. Brabant, Joseph P. Italiano, Chantal J. Arena, Pierre Tomasini, Ivo Raaijmakers, Matthias Bauer
  • Publication number: 20100006836
    Abstract: It is provided a hetero epitaxial growth method, a hetero epitaxial crystal structure, a hetero epitaxial growth apparatus and a semiconductor device, the method includes forming a buffer layer formed with the orienting film of an oxide, or the orienting film of nitride on a heterogeneous substrate; and performing crystal growth of a zinc oxide based semiconductor layer on the buffer layer using a halogenated group II metal and an oxygen material. It is provided a homo epitaxial growth method, a homo epitaxial crystal structure, a homo epitaxial growth apparatus and a semiconductor device, the homo epitaxial growth method includes introducing reactant gas mixing zinc containing gas and oxygen containing gas on a zinc oxide substrate; and performing crystal growth of a zinc oxide based semiconductor layer on the zinc oxide substrate.
    Type: Application
    Filed: June 29, 2009
    Publication date: January 14, 2010
    Applicants: Natinal University Corporation Tokyo University of Agriculture and Technology, ROHM CO., LTD., TOKYO ELECTRON LIMITED
    Inventors: Akinori Koukitu, Yoshinao Kumagai, Tetsuo Fujii, Naoki Yoshii
  • Patent number: 7645340
    Abstract: A method for growing a crystal of an Al-containing III-V group compound semiconductor by the conventional HVPE method, characterized in that it comprises a step of reacting Al with hydrogen halide at a temperature of 700° C. or lower to form a halide of Al. The method has allowed the suppression of the formation of aluminum chloride (AlCl) or aluminum bromide (AlBr) reacting violently with quartz, which is the material of a reaction vessel for the growth, resulting in the achievement of the vapor phase growth of an Al-containing III-V group compound semiconductor at a rate of 100 microns/hr or more, which has lead to the mass-production of a substrate and a semiconductor element having satisfactory resistance to adverse environment.
    Type: Grant
    Filed: April 7, 2003
    Date of Patent: January 12, 2010
    Assignee: Tokyo University Agriculture and Technology TLO Co., Ltd.
    Inventors: Akinori Koukitu, Yoshinao Kumagai, Tomohiro Marui
  • Patent number: 7638170
    Abstract: Thermal atomic layer deposition processes are provided for growing low resistivity metal carbonitride thin films. Certain embodiments include methods for forming tantalum carbonitride (TaCN) thin films. In preferred embodiments, TaCN thin films with a resistivity of less than about 1000 ??·cm are grown from tantalum halide precursors and precursors that contribute both carbon and nitrogen to the growing film. Such precursors include, for example, hexamethyldisilazane (HMDS), tetramethyldisilazane (TMDS), bisdiethylaminosilane (BDEAS) and hexakis(ethylamino)disilane (HEADS).
    Type: Grant
    Filed: June 21, 2007
    Date of Patent: December 29, 2009
    Assignee: ASM International N.V.
    Inventor: Wei-Min Li
  • Patent number: 7638346
    Abstract: Semiconductor structures and devices based thereon include an aluminum nitride single-crystal substrate and at least one layer epitaxially grown thereover. The epitaxial layer may comprise at least one of AlN, GaN, InN, or any binary or tertiary alloy combination thereof, and have an average dislocation density within the semiconductor heterostructure is less than about 106 cm?2.
    Type: Grant
    Filed: August 14, 2006
    Date of Patent: December 29, 2009
    Assignee: Crystal IS, Inc.
    Inventors: Leo J. Schowalter, Joseph A. Smart, Shiwen Liu, Kenneth E. Morgan, Robert T. Bondokov, Timothy J. Bettles, Glen A. Slack
  • Patent number: 7632351
    Abstract: This invention is directed to processes for the formation of ruthenium-containing films on surfaces in atomic layer deposition (ALD) processes. The ALD process includes depositing a surface-activating group on the surface; exposing the deposit of the surface-activating complex to a ruthenium precursor to form a deposited ruthenium complex on the surface; and reacting the deposited ruthenium complex with a reducing agent to form a ruthenium-containing film on the surface. This invention is also directed to ruthenium complexes, RuL2L*, that can be used as ruthenium precursors in these processes.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: December 15, 2009
    Assignee: E. I. du Pont de Nemours and Company
    Inventor: Jeffery Scott Thompson
  • Publication number: 20090301389
    Abstract: The present invention relates to epitaxial growth of nanowires on a substrate. In particular the invention relates to growth of nanowires on an Si-substrate without using Au as a catalyst. In the method according to the invention an oxide template is provided on a passivated surface of the substrate. The oxide template defines a plurality of nucleation onset positions for subsequent nanowire growth. According to one embodiment a thin organic film is used to form the oxide template.
    Type: Application
    Filed: March 7, 2007
    Publication date: December 10, 2009
    Inventors: Lars Samuelson, Thomas Mårtensson, Werner Seifert, Anders Mikkelsen, Bernhard Mandl
  • Publication number: 20090294775
    Abstract: A method of obtaining a hexagonal würtzite type epitaxial layer with a low impurity concentration of alkali-metal by using a hexagonal würtzite substrate possessing a higher impurity concentration of alkali-metal, wherein a surface of the substrate upon which the epitaxial layer is grown has a crystal plane which is different from the c-plane.
    Type: Application
    Filed: May 28, 2009
    Publication date: December 3, 2009
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Makoto Saito, Shin-Ichiro Kawabata, Derrick S. Kamber, Steven P. DenBaars, James S. Speck, Shuji Nakamura
  • Patent number: 7625447
    Abstract: SiC is a very stable substance, and it is difficult to control the condition of a SiC surface to be suitable for crystal growth in conventional Group III nitride crystal growing apparatuses. This problem is solved as follows. The surface of a SiC substrate 1 is rendered into a step-terrace structure by performing a heating process in an atmosphere of HCl gas. The surface of the SiC substrate 1 is then treated sequentially with aqua regia, hydrochloric acid, and hydrofluoric acid. A small amount of silicon oxide film formed on the surface of the SiC substrate 1 is etched so as to form a clean SiC surface 3 on the substrate surface. The SiC substrate 1 is then installed in a high-vacuum apparatus and the pressure inside is maintained at ultrahigh vacuum (such as 10?6 to 10?8 Pa). In the ultrahigh vacuum state, a process of irradiating the surface with a Ga atomic beam 5 at time t1 at temperature of 800° C. or lower and performing a heating treatment at 800° C. or higher is repeated at least once.
    Type: Grant
    Filed: March 18, 2004
    Date of Patent: December 1, 2009
    Assignee: Japan Science and Technology Agency
    Inventors: Jun Suda, Hiroyuki Matsunami, Norio Onojima
  • Patent number: 7625609
    Abstract: A method of forming a silicon nitride film which can form a silicon nitride film having a high film stress at a low process temperature is described herein. The method includes the steps of (a) supplying dichlorosilane into a reaction chamber containing a process object, thereby allowing chemical species originated from dichlorosilane as a precursor to be adsorbed on the process object; (b) hydrogenating chlorine contained in the chemical species, thereby removing the chlorine from the chemical species; and (c) supplying ammonia radicals into the reaction chamber, thereby nitriding the chemical species, from which the chlorine has been removed, by the ammonia radicals to, deposit resultant silicon nitride on the process object, wherein the steps (a), (b) and (c) are performed repeatedly for plural times in that order, thereby a silicon nitride film of a desired thickness is formed on a semiconductor wafer.
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: December 1, 2009
    Assignee: Tokyo Electron Limited
    Inventor: Hiroyuki Matsuura
  • Patent number: 7621998
    Abstract: The present invention relates to a freestanding, thick, single crystalline gallium nitride (GaN) film having significantly reduced bending deformation. The inventive GaN film having a crystal tilt angle of C-axis to the <0001> direction per surface distance of 0.0022°/mm exhibits little bending deformation even at a thickness of 1 mm or more, and therefore, is beneficially used as a substrate for a luminescent device.
    Type: Grant
    Filed: November 23, 2005
    Date of Patent: November 24, 2009
    Assignee: Samsung Corning Co., Ltd.
    Inventors: Changho Lee, Hyun Min Shin, Sun-Hwan Kong, Hae Yong Lee
  • Publication number: 20090277376
    Abstract: Epitaxially coated semiconductor wafers are prepared by a process in which a semiconductor wafer polished at least on its front side is placed on a susceptor in a single-wafer epitaxy reactor and epitaxially coated on its polished front side at temperatures of 1000-1200° C., wherein, after coating, the semiconductor wafer is cooled in the temperature range from 1200° C. to 900° C. at a rate of less than 5° C. per second. In a second method for producing an epitaxially coated wafer, the wafer is placed on a susceptor in the epitaxy reactor and epitaxially coated on its polished front side at a deposition temperature of 1000-1200° C., and after coating, and while still at the deposition temperature, the wafer is raised for 1-60 seconds to break connections between susceptor and wafer produced by deposited semiconductor material before the wafer is cooled.
    Type: Application
    Filed: April 15, 2009
    Publication date: November 12, 2009
    Applicant: Siltronic AG
    Inventors: Reinhard Schauer, Christian Hager
  • Patent number: 7615203
    Abstract: A single crystal diamond grown by vapor phase synthesis, wherein when one main surface is irradiated with a linearly polarized light considered to be the synthesis of two mutually perpendicular linearly polarized light beams, the phase difference between the two mutually perpendicular linearly polarized light beams exiting another main surface on the opposite side is, at a maximum, not more than 50 nm per 100 ?m of crystal thickness over the entire crystal. This single crystal diamond is of a large size and high quality unattainable up to now, and has characteristics that are extremely desirable in semiconductor device substrates and are applied to optical components of which low strain is required.
    Type: Grant
    Filed: May 26, 2005
    Date of Patent: November 10, 2009
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yoshiyuki Yamamoto, Kiichi Meguro, Takahiro Imai
  • Patent number: 7608539
    Abstract: A method and an apparatus for executing efficient and cost-effective Atomic Layer Deposition (ALD) at low temperatures are presented. ALD films such as oxides and nitrides are produced at low temperatures under controllable and mild oxidizing conditions over substrates and devices that are moisture- and oxygen-sensitive. ALD films, such as oxides, nitrides, semiconductors and metals, are efficiently and cost-effectively deposited from conventional metal precursors and activated nonmetal sources. Additionally, substrate preparation methods for optimized ALD are disclosed.
    Type: Grant
    Filed: June 18, 2007
    Date of Patent: October 27, 2009
    Assignee: Sundew Technologies, LLC
    Inventor: Ofer Sneh
  • Patent number: 7608147
    Abstract: A nanoengineered structure comprising an array of more than about 1000 nanowhiskers on a substrate in a predetermined spatial configuration, for use for example as a photonic band gap array, wherein each nanowhisker is sited within a distance from a predetermined site not greater than about 20% of its distance from its nearest neighbor. To produce the array, an array of masses of a catalytic material are positioned on the surface, heat is applied and materials in gaseous form are introduced such as to create a catalytic seed particle from each mass, and to grow, from the catalytic seed particle, epitaxially, a nanowhisker of a predetermined material, and wherein each mass upon melting, retains approximately the same interface with the substrate surface such that forces causing the mass to migrate across said surface are less than a holding force across a wetted interface on the substrate surface.
    Type: Grant
    Filed: January 7, 2004
    Date of Patent: October 27, 2009
    Assignee: QuNano AB
    Inventors: Lars Ivar Samuelson, Bjorn Jonas Ohlsson, Thomas M. I. Martensson
  • Patent number: 7605083
    Abstract: Embodiments of the invention provide methods for depositing tungsten materials. In one embodiment, a method for forming a composite tungsten film is provided which includes positioning a substrate within a process chamber, forming a tungsten nucleation layer on the substrate by subsequently exposing the substrate to a tungsten precursor and a reducing gas containing hydrogen during a cyclic deposition process, and forming a tungsten bulk layer during a plasma-enhanced chemical vapor deposition (PE-CVD) process. The PE-CVD process includes exposing the substrate to a deposition gas containing the tungsten precursor while depositing the tungsten bulk layer over the tungsten nucleation layer. In some example, the tungsten nucleation layer has a thickness of less than about 100 ?, such as about 15 ?. In other examples, a carrier gas containing hydrogen is constantly flowed into the process chamber during the cyclic deposition process.
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: October 20, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Ken K. Lai, Jeong Soo Byun, Frederick C. Wu, Ramanujapuran A. Srinivas, Avgerinos Gelatos, Mei Chang, Moris Kori, Ashok K. Sinha, Hua Chung, Hongbin Fang, Alfred W. Mak, Michael X. Yang, Ming Xi
  • Patent number: 7594967
    Abstract: A semiconductor structure including a cap layer formed over a semiconductor substrate having a rough edge, which discourages formation of dislocation pile-up defects.
    Type: Grant
    Filed: October 10, 2002
    Date of Patent: September 29, 2009
    Assignee: AmberWave Systems Corporation
    Inventors: Christopher J. Vineis, Richard Westhoff, Mayank Bulsara
  • Publication number: 20090223442
    Abstract: The present invention is related to the field of semiconductor processing equipment and methods and provides, in particular, methods for the sustained, high-volume production of Group III-V compound semiconductor material suitable for fabrication of optic and electronic components, for use as substrates for epitaxial deposition, for wafers and so forth. In preferred embodiments, these methods are optimized for producing Group III-N (nitrogen) compound semiconductor wafers and specifically for producing GaN wafers. Specifically, the method includes reacting an amount of a gaseous Group III precursor as one reactant with an amount of a gaseous Group V component as another reactant in a reaction chamber under conditions sufficient to provide sustained high volume manufacture of the semiconductor material on one or more substrates, with the gaseous Group III precursor continuously provided at a mass flow of 50 g Group III element/hour for at least 48 hours.
    Type: Application
    Filed: November 15, 2007
    Publication date: September 10, 2009
    Inventors: Chantal Arena, Christiaan Werkhoven
  • Publication number: 20090223441
    Abstract: The present invention is related to the field of semiconductor processing equipment and methods and provides, in particular, methods and equipment for the sustained, high-volume production of Group III-V compound semiconductor material suitable for fabrication of optic and electronic components, for use as substrates for epitaxial deposition, for wafers and so forth. In preferred embodiments, these methods and equipment are optimized for producing Group III-N (nitrogen) compound semiconductor wafers and specifically for producing GaN wafers. Specifically, the precursor is provided at a mass flow of at least 50 g Group III element/hour for a time of at least 48 hours to facilitate high volume manufacture of the semiconductor material. Advantageously, the mass flow of the gaseous Group III precursor is controlled to deliver the desired amount.
    Type: Application
    Filed: November 15, 2007
    Publication date: September 10, 2009
    Inventors: Chantal Arena, Christiaan Werkhoven
  • Patent number: 7579263
    Abstract: A method of forming a virtually defect free lattice mismatched nanoheteroepitaxial layer is disclosed. The method includes forming an interface layer on a portion of a substrate. A plurality of seed pads are then formed by self-directed touchdown by exposing the interface layer to a material comprising a semiconductor material. The plurality of seed pads, having an average width of about 1 nm to 10 nm, are interspersed within the interface layer and contact the substrate. An epitaxial layer is then formed by lateral growth of the seed pads over the interface layer.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: August 25, 2009
    Assignee: STC.UNM
    Inventors: Sang Han, Qiming Li
  • Publication number: 20090199763
    Abstract: The invention concerns a process and an apparatus for the production of gallium nitride or gallium aluminium nitride single crystals. It is essential for the process implementation according to the invention that the vaporisation of gallium or gallium and aluminium is effected at a temperature above the temperature of the growing crystal but at least at 1000° C. and that a gas flow comprising nitrogen gas, hydrogen gas, inert gas or a combination of said gases is passed over the surface of the metal melt in such a way that the gas flow over the surface of the metal melt prevents contact of the nitrogen precursor with the metal melt.
    Type: Application
    Filed: October 17, 2005
    Publication date: August 13, 2009
    Inventors: Armin Dadgar, Alois Krost
  • Patent number: 7563321
    Abstract: The invention is an improvement in the method of producing a high quality bulk single crystal of silicon carbide in a seeded sublimation system. In a first embodiment, the improvement comprises reducing the number of macrosteps in a growing crystal by incorporating a high concentration of nitrogen atoms in the initial one (1) millimeter of crystal growth.
    Type: Grant
    Filed: December 8, 2004
    Date of Patent: July 21, 2009
    Assignee: Cree, Inc.
    Inventors: Adrian Powell, Valeri F. Tsvetkov, Mark Brady, Robert T. Leonard
  • Publication number: 20090178611
    Abstract: The present invention is related to the field of semiconductor processing equipment and methods and provides, in particular, methods and equipment for the sustained, high-volume production of Group III-V compound semiconductor material suitable for fabrication of optic and electronic components, for use as substrates for epitaxial deposition, for wafers and so forth. In preferred embodiments, these methods are optimized for producing Group III-N (nitrogen) compound semiconductor wafers and specifically for producing GaN wafers. Specifically, the method includes reacting an amount of a gaseous Group III precursor as one reactant with an amount of a gaseous Group V component as another reactant in a reaction chamber under conditions sufficient to provide sustained high volume manufacture of the semiconductor material on one or more substrates, with the gaseous Group III precursor continuously provided at a mass flow of 50 g Group III element/hour for at least 48 hours.
    Type: Application
    Filed: November 15, 2007
    Publication date: July 16, 2009
    Applicant: S.O.I. TEC Silicon on Insulator Technologies S.A.
    Inventors: Chantal Arena, Christiaan Werkhoven
  • Publication number: 20090175777
    Abstract: A single crystal diamond prepared by CVD and having one or more electronic characteristics; making the diamond suitable for electronic applications. Also provided is a method of making the single crystal CVD diamond.
    Type: Application
    Filed: October 3, 2008
    Publication date: July 9, 2009
    Inventors: Geoffrey Alan SCARSBROOK, Philip Maurice Martineau, John Lloyd Collins, Ricardo Simon Sussmann, Barbel Susanne Charlotte Dorn, Andrew John Whitehead, Daniel James Twitchen
  • Patent number: 7556688
    Abstract: A method for growing bulk GaN and AlGaN single crystal boules, preferably using a modified HVPE process, is provided. The single crystal boules typically have a volume in excess of 4 cubic centimeters with a minimum dimension of approximately 1 centimeter. If desired, the bulk material can be doped during growth to achieve n-, i-, or p-type conductivity. In order to have growth cycles of sufficient duration, preferably an extended Ga source is used in which a portion of the Ga source is maintained at a relatively high temperature while most of the Ga source is maintained at a temperature close to, and just above, the melting temperature of Ga. To grow large boules of AlGaN, preferably multiple Al sources are used, the Al sources being sequentially activated to avoid Al source depletion and excessive degradation.
    Type: Grant
    Filed: May 20, 2005
    Date of Patent: July 7, 2009
    Assignee: Freiberger Compound Materials GmbH
    Inventors: Yuri V. Melnik, Vitali Soukhoveev, Vladimir Ivantsov, Katie Tsvetkov, Vladimir A. Dmitriev
  • Patent number: 7553369
    Abstract: The invention relates to a process for modifying the properties of a thin layer (1) formed on the surface of a support (2) forming a substrate (3) utilised in the field of microelectronics, nanoelectronics or microtechnology, nanotechnology, characterised in that it consists of: forming at least one thin layer (1) on a nanostructured support with specific upper surface (2), and treating the nanostructured support with specific upper surface (2) to generate internal strains in the support causing its deformation at least in the plane of the thin layer so as to ensure corresponding deformation of the thin layer to modify its properties.
    Type: Grant
    Filed: May 7, 2003
    Date of Patent: June 30, 2009
    Assignee: Universite Claude Bernard Lyon 1
    Inventors: Olivier Marty, Volodymyr Lysenko
  • Patent number: 7553370
    Abstract: Methods of crystal growth for semiconductor materials, such as nitride semiconductors, and methods of manufacturing semiconductor devices are provided. The method of crystal growth includes forming a number of island crystal regions during a first crystal growth phase and continuing growth of the island crystal regions during a second crystal growth phase while bonding of boundaries of the island crystal regions occurs. The second crystal growth phase can include a crystal growth rate that is higher than the crystal growth rate of the first crystal growth phase and/or a temperature that is lower than the first crystal growth phase. This can reduce the density of dislocations, thereby improving the performance and service life of a semiconductor device which is formed on a nitride semiconductor made in accordance with an embodiment of the present invention.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: June 30, 2009
    Assignee: Sony Corporation
    Inventors: Goshi Biwa, Hiroyuki Okuyama, Masato Doi, Toyoharu Oohata
  • Patent number: 7553373
    Abstract: A method of producing a silicon carbide single crystal, having: fixing a seed crystal, including setting a seed crystal on a seed crystal fixing part with interposition of an adhesive; applying a uniform pressure on the entire surface of the seed crystal by contacting a flexible bag which is inflatable and deflatable to the seed crystal by charging a gas into the to flexible bag; hardening the adhesive; and sublimating a silicon carbide powder obtained by calcinating a mixture containing at least a silicon source and a resol xylene resin, having a nitrogen content of 100 mass ppm or less and having a content of each impurity elements of 0.1 mass ppm or less, and re-crystallizing for growing a silicon carbide single crystal.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: June 30, 2009
    Assignee: Bridgestone Corporation
    Inventors: Masashi Otsuki, Takayuki Maruyama, Shigeki Endo, Daisuke Kondo, Takuya Monbara
  • Patent number: 7553468
    Abstract: Provided is a production method for producing a solid product by a reaction of gaseous raw materials with a plurality of components including a step of conducting the reaction using a reactor disposed in a vertical direction; a step of feeding the gaseous raw materials with a plurality of components from the upper part of the reactor; a step of, in the lower part of the reactor, forming a seal gas layer composed of a gas having a high density and fed continuously from the lower part of the reactor; a step of discharging an exhaust gas containing a by-product gas generated by the reaction and unreacted gaseous raw materials from somewhere in the upper part of the formed seal gas layer; and a step of accommodating a solid product in the seal gas layer of the lower part.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: June 30, 2009
    Assignee: Chisso Corporation
    Inventors: Shuuichi Honda, Toru Tanaka, Satoshi Hayashida
  • Patent number: 7547360
    Abstract: In a method of SiC single crystal growth, a SiC single crystal seed and polycrystalline SiC source material are provided in spaced relation inside of a graphite growth crucible along with at least one compound capable of forming SiO gas in the growth crucible. The growth crucible is heated whereupon the gaseous SiO forms and reacts with carbon in the growth crucible thereby avoiding the introduction of carbon into the SiC single crystal before and during the growth thereof and the SiC source material vaporizes and is transported via a temperature gradient in the growth crucible to the seed crystal where it precipitates and forms a SiC single crystal.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: June 16, 2009
    Assignee: II-VI Incorporated
    Inventors: Avinash K. Gupta, Edward Semenas, Ilya Zwieback
  • Publication number: 20090148984
    Abstract: Bulk GaN and AlGaN single crystal boules, preferably fabricated using a modified HVPE process, are provided. The single crystal boules typically have a volume in excess of 4 cubic centimeters with a minimum dimension of approximately 1 centimeter. If desired, the bulk material can be doped during growth, for example to achieve n-, i-, or p-type conductivity.
    Type: Application
    Filed: June 13, 2008
    Publication date: June 11, 2009
    Inventors: Yuri V. MELNIK, Vitali Soukhoveev, Vladimir Ivantsov, Katie Tsvetkov, Vladimir A. Dmitriev
  • Patent number: 7544249
    Abstract: From the viewpoint of manufacturing an SiC semiconductor device economically, a present Si device manufacturing line is utilized to make it possible to handle a small-diameter SiC wafer. Polycrystal SiC is grown from at least one surface side of a small-diameter a-SiC single crystal wafer so as to be in a size of an outer diameter corresponding to a handling device of an existing semiconductor manufacturing line, and thereafter the polycrystal SiC on the surface of the ?-SiC single crystal wafer is ground to manufacture an increased-diameter SiC of a double structure in which the polycrystal SiC is grown around an outer circumference of the small-diameter ?-SiC single crystal wafer.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: June 9, 2009
    Assignee: Mitsui Engineering Co. Ltd.
    Inventors: Shigehiro Nishino, Kazutoshi Murata
  • Publication number: 20090127506
    Abstract: The invention relates to a single crystal CVD diamond material, wherein the extended defect density as characterised by X-ray topography is less than 400/cm2 over an area of greater than 0.014 cm2. The invention further relates to a method for producing a CVD single crystal diamond material according to any preceding claim comprising the step of selecting a substrate on which to grow the CVD single crystal diamond, wherein the substrate has at least one of a density of extended defects as characterised by X-ray topography of less than 400/cm2 over an area greater than 0.014 cm2; an optical isotropy of less than 1×10-5 over a volume greater than 0.1 mm3; and a FWHM X-ray rocking curve width for the (004) reflection of less than 20 arc seconds.
    Type: Application
    Filed: December 8, 2006
    Publication date: May 21, 2009
    Inventors: Daniel James Twitchen, Grant Charles Summerton, Ian Friel, John Olaf Hansen, Keith Barry Guy, Michael Peter Gaukroger, Philip Maurice Martineau, Robert Charles Burns, Simon Craig Lawson, Timothy Patrick Gerard Addison
  • Publication number: 20090127566
    Abstract: [Object] The present invention provides a method of selectively forming a flat plane on an atomic level on a diamond (001), (110) or (111) surface. [Means for Solving Problems] A method of selectively forming a flat plane on a diamond surface comprising growing diamond on a stepped diamond surface of any of crystal structures (001), (110) and (111) by CVD (Chemical Vapor Deposition) under growth conditions such that step-flow growth of diamond is carried out thereafter.
    Type: Application
    Filed: April 23, 2007
    Publication date: May 21, 2009
    Inventors: Norio Tokuda, Hitoshi Umezawa, Satoshi Yamasaki
  • Publication number: 20090101063
    Abstract: Affords a method of manufacturing GaN crystal substrate in which enlargement of pit size in the growing of GaN crystal is inhibited to enable GaN crystal substrate with a high substrate-acquisition rate to be produced. The method of manufacturing GaN crystal substrate includes a step of growing GaN crystal (4) by a vapor growth technique onto a growth substrate (1), the GaN-crystal-substrate manufacturing method being characterized in that in the step of growing the GaN crystal (4), pits (6) that define facet planes (5F) are formed in the crystal-growth surface, and being characterized by having the pit-size increase factor of the pits (6) be 20% or less.
    Type: Application
    Filed: December 19, 2008
    Publication date: April 23, 2009
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takuji Okahisa
  • Patent number: 7520930
    Abstract: A bulk silicon carbide single crystal of good crystalline quality which includes a minimized number of structural defects and is free from micropipe defects can be produced by crystal growth in a melt of an alloy comprising Si, C, and M (wherein M is either Mn or Ti) and having an atomic ratio between Si and M in which the value of x, when express as Si1-xMx, is 0.1?x?0.7 in the case where M is Mn or 0.1?x?0.25 in the case where M is Ti at a temperature of the melt which is below 2000° C. The C component is preferably supplied into the melt by dissolution of a graphite crucible which contains the melt such that the melt is free from undissolved C. One method of crystal growth is performed by cooling the melt after a seed substrate is immersed in the melt.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: April 21, 2009
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Kazuhiko Kusunoki, Shinji Munetoh, Kazuhito Kamei
  • Patent number: 7501022
    Abstract: Methods for producing silicon carbide crystals, seed crystal holders and seed crystal for use in producing silicon carbide crystals and silicon carbide crystals are provided. Silicon carbide crystals are produced by forcing nucleation sites of a silicon carbide seed crystal to a predefined pattern and growing silicon carbide utilizing physical vapor transport (PVT) so as to provide selective preferential growth of silicon carbide corresponding to the predefined pattern. Seed holders and seed crystals are provided for such methods. Silicon carbide crystals having regions of higher and lower defect density are also provided.
    Type: Grant
    Filed: October 4, 2006
    Date of Patent: March 10, 2009
    Assignee: Cree, Inc.
    Inventor: Stephan Mueller
  • Patent number: 7501023
    Abstract: A method and apparatus for growing low defect, optically transparent, colorless, crack-free, substantially flat, single crystal Group III nitride epitaxial layers with a thickness of at least 10 microns is provided. These layers can be grown on large area substrates comprised of Si, SiC, sapphire, GaN, AlN, GaAs, AlGaN and others. In one aspect, the crack-free Group III nitride layers are grown using a modified HVPE technique. If desired, the shape and the stress of Group III nitride layers can be controlled, thus allowing concave, convex and flat layers to be controllably grown. After the growth of the Group III nitride layer is complete, the substrate can be removed and the freestanding Group III nitride layer used as a seed for the growth of a boule of Group III nitride material. The boule can be sliced into individual wafers for use in the fabrication of a variety of semiconductor structures (e.g., HEMTs, LEDs, etc.).
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: March 10, 2009
    Assignee: Technologies and Devices, International, Inc.
    Inventors: Vladimir A. Dmitriev, Yuri V. Melnik
  • Patent number: 7494546
    Abstract: The present invention describes use of electron beam evaporation method for fabrication of group III-nitride thin films. The fabricated thin films found to have desirable crystalline and optical properties. These films and their properties could be used for protecting electronic devices under space radiation applications such as solar cell operating in space.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: February 24, 2009
    Assignee: Blue Wave Semicodnuctors, Inc.
    Inventors: Ratnakar D. Vispute, Evan Bertrue Jones
  • Publication number: 20090038541
    Abstract: A method to grow a boule of silicon carbide is described. The method may include flowing a silicon-containing precursor and a carbon-containing precursor proximate to a heated filament array and forming the silicon carbide boule on a substrate from reactions of the heated silicon-containing and carbon-containing precursors. Also, an apparatus for growing a silicon carbide boule is described. The apparatus may include a deposition chamber to deposit silicon carbide on a substrate, and a precursor transport system for introducing silicon-containing and carbon-containing precursors into the deposition chamber. The apparatus may also include at least one filament or filament segment capable of being heated to a temperature that can activate the precursors, and a substrate pedestal to hold a deposition substrate upon which the silicon carbide boule is grown. The pedestal may be operable to change the distance between the substrate and the filament as the silicon carbide boule is grown.
    Type: Application
    Filed: August 5, 2008
    Publication date: February 12, 2009
    Applicant: SiC Systems, Inc.
    Inventors: Joshua Robbins, Michael Seman
  • Patent number: 7488386
    Abstract: The invention includes atomic layer deposition methods and chemical vapor deposition methods. In a particular aspect of the invention, a source of microwave radiation is provided proximate a reaction chamber. At least a fragment of a precursor material is chemisorbed on a substrate within the reaction chamber while not exposing the precursor material to microwave radiation from the source. Excess precursor material is removed from the chamber, and the chemisorbed material is subsequently exposed to microwave radiation from the source within the reaction chamber.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: February 10, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Patent number: 7488385
    Abstract: The invention concerns the preparation of gallium nitride films by epitaxy with reduced defect density levels. It concerns a method for producing a gallium nitride (GaN) film by epitaxial deposition of GaN. The invention is characterized in that it comprises at least a step of epitaxial lateral overgrowth and in that it comprises a step which consists in separating part of the GaN layer from its substrate by embrittlement through direct ion implantation in the GaN substrate. The invention also concerns the films obtainable by said method as well as the optoelectronic and electronic components provided with said gallium nitride films.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: February 10, 2009
    Assignee: Lumilog
    Inventors: Hacène Lahreche, Gilles Nataf, Bernard Beaumont
  • Publication number: 20090026417
    Abstract: Affords gallium nitride crystal growth methods, gallium nitride crystal substrates, epi-wafers, and methods of manufacturing the epi-wafers, that make it possible to curb cracking that occurs during thickness reduction operations on the crystal, and to grow gallium nitride crystal having considerable thickness. A gallium nitride crystal growth method in one aspect of the present invention is a method of employing a carrier gas, a gallium nitride precursor, and a gas containing silicon as a dopant, and by hydride vapor phase epitaxy (HVPE) growing gallium nitride crystal onto an undersubstrate. The gallium nitride crystal growth method is characterized in that the carrier-gas dew point during the gallium nitride crystal growth is ?60° C. or less.
    Type: Application
    Filed: July 25, 2008
    Publication date: January 29, 2009
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventor: Shunsuke Fujita
  • Patent number: 7482037
    Abstract: A method of forming a metal containing layer on a substrate, particularly a semiconductor substrate or substrate assembly for use in manufacturing a semiconductor or memory device structure, using one or more precursor compounds that include niobium and/or vanadium and using an atomic layer deposition process including a plurality of deposition cycles.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: January 27, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Garo J. Derderian, Donald L. Westmoreland, Stefan Uhlenbrock
  • Patent number: 7481879
    Abstract: A diamond single crystal substrate manufacturing method for growing by vapor-phase synthesis a single crystal from a diamond single crystal seed substrate, comprising etching away by reactive ion etching, prior to single crystal growth, at least 0.5 ?m and less than 400 ?m, in etching thickness off the surface of the seed substrate which has been mechanically polished, thereby removing from the surface of the seed substrate the work-affected layers caused by mechanical polishing; and growing then a single crystal thereon. The manufacturing method provides a diamond single crystal substrate having a high quality, large size, and no unintentional impurity inclusions, and suitable for use as semiconductor materials, electronic components, optical components or the like.
    Type: Grant
    Filed: January 11, 2005
    Date of Patent: January 27, 2009
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Kiichi Meguro, Yoshiyuki Yamamoto, Takahiro Imai
  • Patent number: 7481881
    Abstract: Affords a method of manufacturing GaN crystal substrate in which enlargement of pit size in the growing of GaN crystal is inhibited to enable GaN crystal substrate with a high substrate-acquisition rate to be produced. The method of manufacturing GaN crystal substrate includes a step of growing GaN crystal (4) by a vapor growth technique onto a growth substrate (1), the GaN-crystal-substrate manufacturing method being characterized in that in the step of growing the GaN crystal (4), pits (6) that define facet planes (5F) are formed in the crystal-growth surface, and being characterized by having the pit-size increase factor of the pits (6) be 20% or less.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: January 27, 2009
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Takuji Okahisa
  • Patent number: 7476420
    Abstract: A process for producing metal oxide thin films on a substrate by the ALD method comprises the steps of bonding no more than about a molecular monolayer of a gaseous metal compound to a growth substrate, and converting the bonded metal compound to metal oxide. The bonded metal compound is converted to metal oxide by contacting it with a reactive vapor source of oxygen other than water, and the substrate is kept at a temperature of less than 190° C. during the growth process. By means of the invention it is possible to produce films of good quality at low temperatures. The dielectric thin films having a dense structure can be used for passivating surfaces that do not endure high temperatures. Such surfaces include, for example, organic films in integrated circuits and polymer films such as in organic electroluminescent displays and organic solar cells. Further, when a water-free oxygen source is used, surfaces that are sensitive to water can be passivated.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: January 13, 2009
    Assignee: ASM International N.V.
    Inventors: Jarmo Skarp, Mervi Linnermo, Timo Asikainen
  • Patent number: 7468103
    Abstract: Disclosed herein is a method of manufacturing a gallium nitride-based (AlxInyGa(1?x?y)N, where 0?x?1, 0?y?1, 0?x+y?1) single crystal substrate. The method comprises the steps of preparing a ZnO substrate, primarily growing a gallium nitride-based single crystal layer, and secondarily growing an additional gallium nitride-based single crystal layer on the primarily grown gallium nitride-based single crystal layer while removing the ZnO substrate by etching the underside of the ZnO substrate.
    Type: Grant
    Filed: May 4, 2004
    Date of Patent: December 23, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Soo Min Lee, Hun Joo Hahm, Young Ho Park
  • Publication number: 20080308036
    Abstract: There is provided a vapor-phase growth apparatus which shortens a temperature decrease time of a wafer substrate after an epitaxial growth step to make it easy to realize a high throughput in film formation of an epitaxial layer. The vapor-phase growth apparatus includes a gas supply port formed in a top portion of a reactor, a gas distribution plate arranged in the reactor, a discharge port formed in a bottom portion of the reactor, an annular holder on which a semiconductor wafer is placed to face the gas distribution plate. A separation distance between the gas distribution plate and the annular holder is set such that a cooling gas which flows downward from the gas supply port through the gas distribution plate to decrease the temperature is in a laminar flow state on a surface of the semiconductor wafer or a surface of the annular holder.
    Type: Application
    Filed: June 12, 2008
    Publication date: December 18, 2008
    Inventors: Hideki ITO, Hironobu Hirata, Shinichi Mitani
  • Patent number: RE40647
    Abstract: The first object of the present invention is to provide a PDP with improved panel brightness which is achieved by improving the efficiency in conversion from discharge energy to visible rays. The second object of the present invention is to provide a PDP with improved panel life which is achieved by improving the protecting layer protecting the dielectrics glass layer. To achieve the first object, the present invention sets the amount of xenon in the discharge gas to the range of 10% by volume to less than 100% by volume, and sets the charging pressure for the discharge gas to the range of 500 to 760 Torr which is higher than conventional charging pressures. With such construction, the panel brightness increases. Also, to achieve the second object, the present invention has, on the surface of the dielectric glass layer, a protecting layer consisting of an alkaline earth oxide with (100)-face or (110)-face orientation.
    Type: Grant
    Filed: November 29, 2001
    Date of Patent: March 10, 2009
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaki Aoki, Hideo Torii, Eiji Fujii, Mitsuhiro Ohtani, Takashi Inami, Hiroyuki Kawamura, Hiroyoshi Tanaka, Ryuichi Murai, Yasuhisa Ishikura, Yutaka Nishimura, Katsuyoshi Yamashita