Abstract: In a process for producing a substrate for use in a semiconductor element: a growth suppression mask which is constituted by a plurality of mask elements being discretely arranged and each having a width of 2.5 micrometers or smaller is formed on a surface of a base substrate; a first GaN layer having a plurality of holes is formed on the surface of the base substrate by growing GaN from areas of the surface of the base substrate which are not covered by the plurality of first mask elements; and a second GaN layer is formed over the first GaN layer by crystal growth.

Abstract: A method of forming a native oxide from at least one strain-compensated superlattice of Group III-V semiconductor material, where each at least one superlattice includes two monolayers of a Group III-V semiconductor material and at least two monolayers of an aluminum-bearing Group III-V semiconductor material. The method entails exposing each at least one superlattice to a water-containing environment and a temperature of at least about 425 degrees Celsius to convert at least a portion of said superlattice to a native oxide. The native oxide thus formed is useful in electrical and optoelectrical devices, such as lasers.

Abstract: A semiconductor substrate, a field effect transistor, a method of forming a SiGe layer and a method of forming a strained Si layer using the same, and a method of manufacturing a field effect transistor are provided, which enable the threading dislocation density of the SiGe layer to be reduced and the surface roughness to be minimized. On top of a Si substrate 1 is provided a SiGe buffer layer 2, 12 constructed of a plurality of laminated layers comprising alternating layers of a SiGe gradient composition layer 2a, 12a in which the Ge composition ratio increases gradually from the Ge composition ratio of the base material, and a SiGe constant composition layer 2b, 12b which is provided on top of the gradient composition layer and in which the Ge composition ratio is equal to that of the upper surface of the gradient composition layer.

Abstract: A superjunction device has a plurality of equally spaced P columns in an N− epitaxial layer. The concentration of the P type columns is made greater than that needed for maintaining charge balance in the N− epi region and the P columns thereby to increase avalanche energy. An implant dose of 1.1E13 or greater is used to form the P columns.

Abstract: Methods of forming a nano-scale electronic and optoelectronic devices include forming a substrate having a semiconductor layer therein and a substrate insulating layer on the semiconductor layer. An etching template having a first array of non-photolithographically defined nano-channels extending therethrough, is formed on the substrate insulating layer. This etching template may comprise an anodized metal oxide, such as an anodized aluminum oxide (AAO) thin film. The substrate insulating layer is then selectively etched to define a second array of nano-channels therein. This selective etching step preferably uses the etching template as an etching mask to transfer the first array of nano-channels to the underlying substrate insulating layer, which may be thinner than the etching template. An array of semiconductor nano-pillars is then formed in the second array of nano-channels. The semiconductor nano-pillars in the array may have an average diameter in a range between about 8 nm and about 50 nm.

Abstract: A light emitting device and a method of increasing the light output of the device utilize a chirped multi-well active region to increase the probability of radiative recombination of electrons and holes within the light emitting active layers of the active region by altering the electron and hole distribution profiles within the light emitting active layers of the active region (i.e., across the active region). The chirped multi-well active region produces a higher and more uniform distribution of electrons and holes throughout the active region of the device by substantially offsetting carrier diffusion effects caused by differences in electron and hole mobility by using complementary differences in layer thickness and/or layer composition within the active region.

Abstract: Presented is an LED device that produces white light by performing phosphor conversion on substantially all of the primary light emitted by the light emitting structure of the LED device. The LED device comprises a light emitting structure and at least one phosphor-converting element located to receive and absorb substantially all of the primary light. The phosphor-converting element emits secondary light at second and third wavelengths that combine to produce white light. Some embodiments include an additional phosphor-converting element, which receives light from a phosphor-converting element and emits light at a fourth wavelength. In the embodiments including an additional phosphor-converting element, the second, third, and fourth wavelengths combine to produce white light. Each phosphor-converting element includes at least one host material doped with at least one dopant. The phosphor-converting element may be a phosphor thin film, a substrate for the light emitting structure, or a phosphor powder layer.

Abstract: A fractal structure is formed to have a plurality of regions different in fractal dimension characterizing the self-similarity. The fractal structure is grown from one or more origins under growth conditions providing a first fractal dimension in a first portion of the growth process from the start point of time to a first point of time, and under growth conditions providing a second fractal dimension lower than the first fractal dimension in another portion of the growth process from the first point of time to a second point of time. By adjusting the timing for changing the growth conditions, the fractal structure is controlled in nature of phase transition, such as critical temperature for ferromagnetic phase transition, which occurs in the fractal structure. For enhancing the controllability, the first fractal dimension is preferably larger than 2.7 and the second fractal dimension is preferably smaller than 2.3.

Abstract: On a silicon substrate is formed a silicon dioxide film and then hemispherical grains made of silicon, each having an extremely small diameter, are deposited thereon by LPCVD. After annealing the hemispherical grains, the silicon dioxide film is etched using the hemispherical grains as a first dotted mask, thereby forming a second dotted mask composed of the silicon dioxide film. The resulting second dotted mask is used to etch the silicon substrate to a specified depth from the surface thereof, thereby forming an aggregate of semiconductor micro-needles. Since the diameter of each of the semiconductor micro-needles is sufficiently small to cause the quantum size effects as well as has only small size variations, remarkable quantum size effects can be obtained. Therefore, it becomes possible to constitute a semiconductor apparatus with a high information-processing function by using the aggregate of semiconductor micro-needles (quantized region).

Abstract: A practically realizable semiconductor magnetic body having a flat-band structure is disclosed. The semiconductor magnetic body is formed by semiconductor quantum dots arranged on lattice points such that electrons can transfer between neighboring quantum dots and the electron energy band contains a flat-band structure, where each quantum dot is a structure in which electrons are confined inside a region which is surrounded by high energy potential regions, and the flat-band structure is a band structure in which energy dispersion of electrons has hardly any wave number dependency.

Abstract: An emission layer is formed in a p-layer, and an electron reflecting layer and a hole reflecting layer are formed sandwiching the emission layer. Each of the electron reflecting layer and the hole reflecting layer is constituted by a quantum-wave interference layer with plural periods of a pair of a first layer W and a second layer B. Thicknesses of the first and the second layers in the electron reflecting layer are determined by multiplying by an odd number one fourth of a quantum-wave wavelength of electrons in each of the first and the second layers, and each thicknesses of the first and the second layers in the hole reflecting layer are determined by multiplying by an odd number one fourth of a quantum-wave wavelength of holes in each of the first and the second layers. A luminous efficiency of the LED is improved by electron-hole pairs.

Abstract: According to the invention, there is provided a semiconductor light emitting device comprising: a contact layer formed of a nitride semiconductor; and a p-side electrode provided in contact with a surface of the contact layer, the contact layer having a superlattice including an alternative stacked structure of first nitride semiconductor layers having a wider bandgap and second nitride semiconductor layers having a narrower bandgap, the first semiconductor layers being selectively doped with a p-type dopant.

Abstract: A field effect transistor having a quantum-wave interference layer with plural periods of a pair of a first layer W and a second layer B. The second layer B has wider band gap than the first layer W, and the quantum-wave interference layer is formed in a region adjacent to a channel. Each thickness of the first layer W and the second layer B is determined by multiplying by an odd number one fourth of quantum-wave wavelength of carriers in each of the first layer W and the second layer B, which exist around the lowest energy level of the second layer B. The quantum-wave interference layer functions as a carrier reflecting layer, and enable to prevent leakage current from a source to a region except a drain.

Abstract: An intersubband light emitting element includes a semiconducting substrate, a first layer composed of a first semiconducting material, and a second layer composed of second semiconducting material. The first layer makes a heterojunction with the second layer. The top of a valence band of the first semiconducting material is higher in energy than the bottom of a conduction band of the second semiconducting material. The element further includes a third layer making a heterojunction with the first or second layer. The third layer has a superlattice structure. One of the first and second layer is provided on the semiconducting substrate directly or through at least one semiconducting layer.

Abstract: A semiconductor device is constituted by a quantum-wave interference layer with plural periods of a pair of a first layer W and a second layer B. The second layer B has wider band gap than the first layer W. Each thickness of the first layer W and the second layer B is determined by multiplying by an odd number one fourth of wavelength of quantum-wave of carriers in each of the first layer W and the second layer B existing around the lowest energy level of the second layer B. A &dgr; layer, for sharply varying energy band, is formed at an every interface between the first layer W and the second layer B and has a thickness substantially thinner than the first layer W and the second layer B. The quantum-wave interference layer functions as a reflecting layer of carriers for higher reflectivity.

Abstract: An optical modulator and a semiconductor laser device including the optical modulator, both reducing variations in the refractive index of an optical modulator or making variations negative without an increase in loss or a decrease in extinction ratio, as well as an optical communications system increasing an interval of distance at which modulated light is transmitted, by use of the optical modulator and the semiconductor laser device including the optical modulator. The optical modulator includes a semiconductor substrate of a first conductivity type; a light absorption layer on the semiconductor substrate and having a multiple quantum well structure, the multiple quantum well structure including a first well layer and second well layers. The peak wavelength of the absorption spectrum of the second well layers is shorter than the peak wavelength of the absorption spectrum of the first well layers A semiconductor cladding layer of the second conductivity type is on the light absorption layer.

Abstract: An LED and a method of fabricating the LED which utilize controlled oxygen (O) doping to form at least one layer of the LED having an O dopant concentration which is correlated to the dominant emission wavelength of the LED. The O dopant concentration is regulated to be higher when the LED has been configured to have a longer dominant emission wavelength. Since the dominant emission wavelength is dependent on the composition of the active layer(s) of the LED, the O dopant concentration in the layer is related to the composition of the active layer(s). The controlled O doping improves the reliability while minimizing any light output penalty due to the introduction of O dopants. In an exemplary embodiment, the LED is an AlGaInP LED that includes a substrate, an optional distributed Bragg reflector layer, an n-type confining layer, an optional n-type set-back layer, an active region, an optional p-type set-back layer, a p-type confining layer and an optional window layer.

Abstract: By using wafer fusion, various structures for photodetectors and photodetectors integrated with other electronics can be achieved. The use of silicon as a multiplication region and III—V compounds as an absorption region create photodetectors that are highly efficient and tailored to specific applications. Devices responsive to different regions of the optical spectrum, or that have higher efficiencies are created.

Abstract: A GaInP epitaxial stacking structure and fabrication method thereof, and a FET transistor using this structure are provided wherein, stacked upon a GaAs single-crystal substrate are at least a buffer layer, a GaZIn1−ZAs (0<Z≦1) channel layer, and a GaYIn1−YP (0<Y≦1) electron-supply layer joined to the channel layer, wherein the GaInP epitaxial stacking structure includes a region within the electron-supply layer wherein the gallium composition ratio (Y) decreases from the side of the junction interface with the channel layer toward the opposite side.

Abstract: A method for monitoring silicide failures in the semiconductor process provides P-channel gate oxide capacitors on a semiconductor wafer. The breakdown voltages of the P-channel oxide gate capacitors are measured. With higher rapid thermal anneal (RTA) temperatures, an increased number of short failures occur in the P-channel gate oxide capacitors. Based on a correlation of the P-channel gate oxide capacitor failures and the RTA temperatures, the optimum RTA temperature for the silicide process is determined.

Abstract: A semiconductor laser includes a gain region, a phase control region and a DBR region. The semiconductor laser includes an active layer of multiple quantum wells of Ga0.7Al0.3As barrier layers and GaAs well layers, a p-type Ga0.5Al0.5As second cladding layer and a p-type Ga0.7Al0.3As first light-guiding layer. Furthermore, a p-type Ga0.8Al0.2As diffraction grating layer subjecting waveguide light to a distributed Bragg reflection is layered on the first light-guiding layer. This diffraction grating layer is arranged at least at a region other than a region opposite the optical waveguide of the active layer in the gain region (region into which the current is supplied).

Abstract: A method of fabricating a vertical channel transistor, comprising the following steps. A semiconductor substrate having an upper surface is provided. A high doped N-type lower epitaxial silicon layer is formed on the semiconductor substrate. A low doped P-type middle epitaxial silicon layer is formed on the lower epitaxial silicon layer. A high doped N-type upper epitaxial silicon layer is formed on the middle epitaxial silicon layer. The lower, middle, and upper epitaxial silicon layers are etched to form a epitaxial layer stack defined by isolation trenches. Oxide is formed within the isolation trenches. The oxide is etched to form a gate trench within one of the isolation trenches exposing a sidewall of the epitaxial layer stack facing the gate trench. Multi-quantum wells or a stained-layer super lattice is formed on the exposed epitaxial layer stack sidewall. A gate dielectric layer is formed on the multi-quantum wells or the stained-layer super lattice and within the gate trench.

Abstract: Nitrogen-containing III-V alloy semiconductor materials have both a conduction band offset &Dgr;Ec and a valence band offset &Dgr;Ev large enough for the practical applications to light emitting devices. The semiconductor materials are capable of providing laser diodes, having excellent temperature characteristics with emission wavelengths in the red spectral region and of 600 nm or smaller, and high brightness light emitting diodes with emission wavelengths in the visible spectral region. The light emitting device is fabricated on an n-GaAs substrate, which has the direction normal to the substrate surface is misoriented by 15° from the direction normal to the (100) plane toward the [011] direction. On the substrate, there disposed by MOCVD, for example, are an n-GaAs buffer layer, an n-(Al0.7Ga0.3)0.51In0.49P cladding layer, an (Al0.2Ga0.8)0.49In0.51N0.01P0.99 active layer, a p-(Al0.7Ga0.3)0.51In0.49P cladding layer, and a p-GaAs contact layer.

Abstract: A semiconductor photonic device includes a substrate having a cleavage plane perpendicular to a principal plane thereof; a ZnO film on the substrate; and a compound semiconductor layer expressed by InxGayAlzN (x+y+z=1, 0≦x≦1, 0≦y ≦1, 0≦z≦1).

Abstract: A superlattice infrared photodetector is disclosed, which can be fabricated easily by molecular beam epitaxy, has low power consumption and small dark current. Furthermore, the working temperature to operate the detector under background limited performance can be achieved by cooling down to the liquid nitrogen temperature. That is, the front and rear sides of the superlattice structure are added with blocking layers with sufficient height and width. The thickness is about 50 nm and the height of the energy barrier must be higher than the bottom of the second miniband of the superlattice structure by a value of more than 10 meV. Thereby, with the generation of photocurrent, the dark current is reduced at the same time. Therefore, the ratio of the photocurrent to the dark current can be improved effectively so that the working temperature for the background limited performance is increased vastly to even higher than 77 K.

Abstract: A light-emitting device comprising an emission layer which has a single layer structure is formed. The emission layer is sandwiched by a first quantum-wave interference layer constituted by plural periods of a pair of a first layer and a second layer, the second layer having a wider band gap than the first layer, and a second quantum-wave interference layer constituted by plural periods of a pair of a third layer and a fourth layer, the fourth layer having a wider band gap than the third layer. The first quantum-wave interference layer functions as an electron reflection layer, and its thickness is determined by multiplying by an odd number one fourth of quantum-wave wavelength of the injected electrons. The second quantum-wave interference layer functions as an electron transmission layer, and its thickness is determined by multiplying by an odd number one fourth of quantum-wave wavelength of the injected electrons. As a result, luminous efficiency of the device is improved.

Abstract: A method of growing p-type group II-VI compound semiconductor crystals, includes a step of forming ZnO layers and ZnTe layers alternately on a ZnO substrate, the ZnO layer being not doped with impurities and having a predetermined impurity concentration, and the ZnTe layer being doped with p-type impurities N to a predetermined impurity concentration or higher.

Abstract: A semiconductor component, selected from the group comprising a photodetector, a light emitting diode, an optical modulator and a waveguide. The semiconductor component comprises an Si substrate, an active region formed on said substrate, and an Si capping layer on said active region. In one embodiment the active region is a superlattice comprising alternating layers of Si1-yCy and Si1-x-yGexCy, with the atomic fraction y of the Si1-x-yGexCy layers being equal to or different from the atomic fraction y of the Si1-yCy layers. In another embodiment it is a superlattice comprising a plurality of periods of a three-layer structure comprising Si, Si1-yCy and Si1-xGex layers. In a third embodiment it is a superlattice comprising a plurality of periods of a three-layer structure comprising Si, Si1-yCy and Si1-x-yGexCy layers, with the atomic fraction y of the Si1-x-yGexCy layers being equal to or different from the atomic fraction y of the Si1-yCy layers.

Abstract: Quantum-dot superlattice (QLSL) structures having improved thermoelectric properties are described. In one embodiment, PbSexTe1-x/PbTe QDSLs are provided having enhanced values of Seebeck coefficient and thermoelectric figure of merit (ZT) relative to bulk values. The structures can be combined into multi-chip devices to provide additional thermoelectric performance.

Abstract: A thermoelectric device with enhanced structured interfaces for improved cooling efficiency is provided. In one embodiment, the thermoelectric device includes a first thermoelement comprising a supetlattice of p-type thermoelectric material and a second thermoelement comprising superlattice of n-type thermoelectric material. The first and second thermoelements are electrically coupled to each other. The first thermoelement is proximate to, without necessarily being in physical contact with, a first array of electrically conducting tips at a discrete set of points. A planer surface of the second thermoelement is proximate to, without necessarily being in physical contact with, a second array of electrically conducting tips at a discrete set of points. The electrically conducting tips are coated with a material that has the same Seebeck coefficient as the material of the nearest layer of the superlattice to the tip.

Abstract: A Schottky diode, and a method of making the same, which is fabricated on InP material and employs a Schottky layer including InxAl1−xAs with x>0.6, or else including a chirped graded supperlattice in which successive periods of the superlattice contain progressively less GaInAs and progressively more AlInAs, the increase in AlInAs being terminated before the proportion of AlInAs within the last period (adjacent the anode metal) exceeds 80%. Such fabrication creates an InP-based Schottky diode having a low turn-on voltage which may be predictably set within a range by adjusting the fabrication parameters.

Abstract: A stacked material free from a degraded quality of crystal, formed with a precise periodicity, and fabricated without relying on the vapor phase growth method is provided. An optical function device using the stacked material is also provided. A starting stacked material composed of two alternate layers (A), (B) having different refractive indexes is stacked over two periods or more by a substrate bonding method to provide a multi-periodic stacked structure.

Abstract: A method for aligning quantum dots effectively controls a growth position of the quantum dots for obviating an irregularity of a position of spontaneous formation quantum dots, and thus aligns the quantum dots in one-dimension (1-D) or two-dimension (2-D). A semiconductor device fabricated using the method manufactures a superlattice layer layer for adjusting an internal strain distribution by alternately depositing two semiconductor materials having different lattice constant, and grows spontaneous formation quantum dots on the superlattice layer. As a result, a strained force caused by the superlattice layer influences on the quantum dots so that the quantum dots can be regularly aligned.

Abstract: It is an object of the present invention to provide a semiconductor light emitting device capable of securing, in use of an optical information processing or an optical communication system, a low threshold and high efficiency operation as well as a high output characteristic. An active layer structure having a flatness and an interface acuteness of a quantum well structure improved by introducing a multi-period super lattice structure between a substrate for crystal growth and a light emitting layer area further to on a misoriented substrate sued to enhance a homogeneity of a semiconductor crystal. Further, a carrier confinement and a light confinement can be enhanced by providing a margin for design of the quantum well structure.

Abstract: A high voltage microwave field effect transistor (FET) and method for its manufacture. The FET (10) includes a channel layer (18) formed of compressively strained GaInP. Carrier confinement layers (16), (20) formed of tensile strained (AlGa)InP are formed both above (20) and below (16) the channel layer (20) to confine the carriers to the channel layer (20) and to provide a high breakdown voltage.

Abstract: A transistor having an electron quantum-wave interference layer with plural periods of a pair of a first layer W and a second layer B in a p-layer of a pn junction structure. The second layer B has wider band gap than the first layer W. Each thicknesses of the first layer W and the second layer B is determined by multiplying by an odd number one fourth of quantum-wave wavelength of carriers in each of the first layer W and the second layer B, the carriers existing around the lowest energy level of the second layer B. The quantum-wave interference layer functions as an electron reflecting layer, and enables to lower a dynamic resistance of the transistor notably. An amplification factor of a bipolar transistor of an npn junction structure, having the electron reflecting layer is improved compared with a transistor without an electrode reflecting layer. Similarly, a transistor having a hole reflecting layer, which has a larger amplification factor, can be obtained.

Abstract: An inverter comprising four quantum dot cells. When the quantum dot cells are arranged in 9 o'clock direction, 12 o'clock direction and 3 o'clock direction, the quantum dot cell is arranged in 6 o'clock direction.

Abstract: A variable capacity device having an nin, pip, nn−p, np−p, or nip junction whose middle layer is constituted by a quantum-wave interference layer with plural periods of a first layer W and a second layer B as a unit. The second layer B has a wider band gap than the first layer W. Each thickness of the first layer W and the second layer B is determined by multiplying by an odd number one fourth of a wavelength of a quantum-wave of carriers in each of the first layer W and the second layer B existing around the lowest energy level of the second layer B. A &dgr; layer, for changing energy band suddenly, is formed at interfaces between the first layer W and the second layer B and has a thickness substantially thinner than the first layer W and the second layer B. Plurality of quantum-wave interference units are formed sandwiching carrier accumulation layers in series. Then a voltage-variation rate of capacity of the variable capacity device is improved.

Abstract: A semiconductor device of a pin junction structure, constituted by a quantum-wave interference layers Q1 to Q4 with plural periods of a pair of a first layer W and a second layer B and middle layers (carrier accumulation layers) C1 to C3. The second layer B has wider band gap than the first layer W. Each thicknesses of the first layer W and the second layer B is determined by multiplying by an odd number one fourth of wavelength of quantum-wave of carriers conducted in the i-layer in each of the first layer W and the second layer B existing at the level near the lowest energy level of the second layer B. A &dgr; layer, for sharply varying energy band, is formed at an every interface between the first layer W and the second layer B and has a thickness substantially thinner than the first layer W and the second layer B. Then quantum-wave interference layers and carrier accumulation layers are formed in series.

Abstract: A layer structure for a II-VI compound semiconductor device is formed on a GaAs substrate of III-V compound, wherein lattice mismatching is prevented by a first layer interposed between the GaAs substrate and a II-VI compound semiconductor active layer and made of III-V compound semiconductor including In element as a constituent element thereof. The thickness of the first layer is less than the critical thickness allowing coherent growth. Alternatively, the III-V compound of the first layer has a lattice constant substantially equal to the lattice constant of the GaAs substrate. The first layer may be a superlattice layer.

Abstract: A semiconductor structure and a method of forming same is disclosed. The method includes forming, on a substrate, an n-doped collector structure of InAs/AlSb materials; forming a base structure on said collector structure which base structure comprises p-doped GaSb; and forming, on said base structure, an n-doped emitter structure of InAs/AlSb materials. The collector and emitter structure are preferably superlattices each comprising a plurality of periods of InAs and AlSb sublayers. A heterojunction bipolar transistor manufactured using the method is disclosed.

Abstract: An MIS device (20) includes a semiconducting substrate (22), a silicon nitride buffer layer (24), a ferroelectric metal oxide superlattice material (26), and a noble metal top electrode (28). The layered superlattice material (26) is preferably a strontium bismuth tantalate, strontium bismuth niobate, or strontium bismuth niobium tantalate. The device is constructed according to a preferred method that includes forming the silicon nitride on the semiconducting substrate prior to deposition of the layered superlattice material. The layered superlattice material is preferably deposited using liquid polyoxyalkylated metal organic precursors that spontaneously generate a layered superlattice upon heating of the precursor solution. UV exposure during drying of the precursor liquid imparts a C-axis orientation to the final crystal, and results in improved thin-film electrical properties.

Abstract: A stacked material free from a degraded quality of crystal, formed with a precise periodicity, and fabricated without relying on the vapor phase growth method is provided. An optical function device using the stacked material is also provided. A starting stacked material composed of two alternate layers (A), (B) having different refractive indexes is stacked over two periods or more by a substrate bonding method to provide a multi-periodic stacked structure.

Abstract: A semiconductor device with a heterojunction structure having a substrate and a crystal layer which is grown over the substrate, in which a quantum dot buffer layer is interposed between the substrate and the crystal layer. In the semiconductor device, the interposition of the quantum dot buffer layer between the substrate and the crystal layer can effectively eliminate lattice mismatch between the substrate and the crystal layer. Therefore, a semiconductor device having excellent electro-optical characteristics can be obtained.

Abstract: An optical semiconductor device having a plurality of GaN-based semiconductor layers containing a strained quantum well layer in which the strained quantum well layer has a piezoelectric field that depends on the orientation of the strained quantum well layer when the quantum layer is grown. In the present invention, the strained quantum well layer is grown with an orientation at which the piezoelectric field is less than the maximum value of the piezoelectric field strength as a function of the orientation. In devices having GaN-based semiconductor layers with a wurtzite crystal structure, the growth orientation of the strained quantum well layer is tilted at least 1° from the {0001} direction of the wurtzite crystal structure. In devices having GaN-based semiconductor layers with a zincblende crystal structure, the growth orientation of the strained quantum well layer is tilted at least 1° from the {111} direction of the zincblende crystal structure.

Abstract: A semiconductor light emitting device is disclosed, including a semiconductor substrate, an active region comprising a strained quantum well layer, and a cladding layer for confining carriers and light emissions, wherein the amount of lattice strains in the quantum well layer is in excess of 2% against either the semiconductor substrate or cladding layer and, alternately, the thickness of the quantum well layer is in excess of the critical thickness calculated after Matthews and Blakeslee.

Abstract: The present invention provides a III-V compound semiconductor having a laminated superlattice structure in which a first monoatomic layer and a second monoatomic layer are regularly laminated, the first monoatomic layer being formed by laminating 1 atomic layer of a group III atom selected from Al, Ga and In and 1 atomic layer of a group V atom selected from P, As and Sb, the second monoatomic layer being formed by laminating 1 atomic layer of the group III atom and 1 atomic layer of a nitrogen atom, and a semiconductor device using the same.

Abstract: A diode is constituted by a quantum-wave interference layer with plural periods of a pair of a first layer W and a second layer B, having at least one quantum-wave interference layer in a p-layer or an n-layer. The second layer B has wider band gap than the first layer W. Each thickness of the first layer W and the second layer B is determined by multiplying by an odd number one fourth of quantum-wave wavelength of carriers in each of the first layer W and the second layer B existing around the lowest energy level of the second layer B. A &dgr; layer, for sharply varying an energy band, is formed at an every interface between the first layer W and the second layer B and has a thickness substantially thinner than the first layer W and the second layer B. The quantum-wave interference layer functions as a reflecting layer of carriers for higher reflectivity.

Abstract: There is provided a field effect transistor including a semi-insulating semiconductor substrate formed with a recess at a region in which a gate is to be formed, a gate base layer formed on the recess and composed of one of an InP layer and a plurality of layers including an InP layer, and a gate electrode formed on the gate base layer. The InP layer may be replaced with an InGaP layer, an AlXGa1−XAs (0≦X≦1) layer, an InXGa1−XAs (0≦X≦1) layer, or an InXAl1−XAs (0≦X<0.4 or 0.6<X≦1) layer. The above-mentioned field effect transistor prevents thermal instability thereof caused by impurities such as fluorine entering a donor layer to thereby inactivate donor. As a result, there is presented a highly reliable compound field effect transistor.

Abstract: An integrated semiconductor device is formed by bonding the conductors of one fabricated semiconductor device having a substrate to the conductors on another fabricated semiconductor device having a substrate, flowing an etch-resist in the form of a photoresist between the devices, allowing the etch-resist to dry, and removing the substrate from one of the semiconductor devices. Preferably the etch-resist is retained to impart mechanical strength to the device. More specifically, a hybrid semiconductor device is formed by bonding the conductors of one or more GaAs/AlGaAs multiple quantum well modulators to conductors on an IC chip, flowing a photoresist between the modulators and the chip, allowing the photoresist to dry, and removing the substrate from the modulator.