Abstract: The invention provides a device having a substrate, a buffer region positioned upon the substrate, wherein the buffer region has an upper buffer region and a lower buffer region, a heterojunction region positioned upon the buffer region, and a superlattice positioned between the lower buffer region and the upper buffer region, wherein the device is configured to function as a heterojunction field effect transistor.

Abstract: Semiconductor quantum well devices and methods of making the same are described. In one aspect, a device includes a quantum well structure that includes semiconductor layers defining interleaved heavy-hole and light-hole valance band quantum wells. Each of the quantum wells includes a quantum well layer interposed between barrier layers. One of the semiconductor layers that functions as a barrier layer of one of the light-hole quantum wells also functions as the quantum well layer of one of the heavy-hole quantum wells. Another of the semiconductor layers that functions as a barrier layer of one of the heavy-hole quantum wells also functions as the quantum well layer of one of the light-hole quantum wells.

Abstract: Disclosed is a multi-quantum-well light emitting diode, which makes enormous adjustments and improvements over the conventional light emitting diode, and further utilizes a transparent contact layer of better transmittance efficiency, so as to significantly raise the illuminance of this light emitting diode and its light emission efficiency. The multi-quantum-well light emitting diode has a structure including: substrate, buffer layer, n-type gallium-nitride layer, active light-emitting-layer, p-type cladding layer, p-type contact layer, barrier buffer layer, transparent contact layer, and the n-type electrode layer.

Abstract: A light-emitting apparatus employing a GaN-based semiconductor. The light-emitting apparatus comprises an n-type clad layer (124); an active layer (129) including an n-type first barrier layer (126), well layers (128), and second barrier layers (130); a p-type block layer (132); and a p-type clad layer (134). By setting the band gap energy Egb of the p-type block layer (132), the band gap energy Eg2 of the second barrier layers (130), the band gap energy Eg1 of the first barrier layer (126), and the band gap energy Egc of the n-type and the p-type clad layers such that the relationship Egb>Eg2>Eg1?Egc is satisfied; the carriers can be efficiently confined; and the intensity of the light emission can be increased.

Abstract: Disclosed is a natural-superlattice homologous single-crystal thin film, which includes a complex oxide which is epitaxially grown on either one of a ZnO epitaxial thin film formed on a single-crystal substrate, the single-crystal substrate after disappearance of the ZnO epitaxial thin film and a ZnO single crystal. The complex oxide is expressed by the formula: M1M2O3 (ZnO)m, wherein M1 is at least one selected from the group consisting of Ga, Fe, Sc, In, Lu, Yb, Tm, Er, Ho and Y, M2 is at least one selected from the group consisting of Mn, Fe, Ga, In and Al, and m is a natural number of 1 or more. A natural-superlattice homologous single-crystal thin film formed by depositing the complex oxide and subjecting the obtained layered film to a thermal anneal treatment can be used in optimal devices, electronic devices and X-ray optical devices.

Abstract: The present invention provides a nitride semiconductor device comprising an active layer of a quantum well structure, a first conductive clad layer and a second conductive clad layer. The first conductive clad layer is made of the quaternary nitride semiconductor InAlGaN having a lattice constant equal to or larger than that of the active layer and includes a first nitride semiconductor layer having an energy band gap larger than that of the active layer, a second nitride semiconductor layer having an energy band gap smaller than that of the first nitride semiconductor layer and a third nitride semiconductor layer having an energy band gap larger than that of the second nitride semiconductor layer, sequentially closer to the active layer.

Abstract: The invention relates to the design, fabrication, and use of semiconductor devices that employ deep-level transitions (i.e., deep-level-to-conduction-band, deep-level-to-valence-band, or deep-level-to-deep-level) to achieve useful results. A principal aspect of the invention involves devices in which electrical transport occurs through a band of deep-level states and just the conduction band (or through a deep-level band and just the valence band), but where significant current does not flow through all three bands. This means that the deep-state is not acting as a nonradiative trap, but rather as an energy band through which transport takes place. Advantageously, the deep-level energy-band may facilitate a radiative transition, acting as either the upper or lower state of an optical transition.

Abstract: Particle localization by geometrical nanostructures allows for the fabrication of artificial atoms and molecules suitable for use as building blocks for molecular electronic devices. Artificial lattices made from the artificial atoms and molecules can be used to create artificial networks or arrays. These can be formed by depositing strips of homogeneous semiconductor material on an insulator substrate and etching away unwanted material to form specific lattice shapes, such as by using photolithographic methods or other techniques. The artificial atoms and molecules can be used to form field effect transistors, power and signal amplifiers, artificial electrical conductors, and artificial two-dimensional electronic superconductors. The artificial molecules of the invention can also be employed in constant magnetic fields and probed by electromagnetic fields to produce magnetic memory elements.

Abstract: A semiconductor device may include a superlattice comprising a plurality of stacked groups of layers. Each group of layers of the superlattice may include a plurality of stacked base silicon monolayers defining a base silicon portion and an energy band-modifying layer thereon. The energy band-modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The superlattice may further include at least one pair of oppositely-doped regions therein defining at least one semiconductor junction.

Abstract: A method for making a semiconductor device may include forming a superlattice comprising a plurality of stacked groups of layers. Each group of layers of the superlattice may include a plurality of stacked base silicon monolayers defining a base silicon portion and an energy band-modifying layer thereon. The energy band-modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base silicon portions. The method may further include forming a semiconductor layer adjacent the superlattice and comprising at least one first region therein including a first conductivity type dopant. At least one second region may be formed in the superlattice including a second conductivity type dopant to define, with the at least one first region, at least one semiconductor junction.

Abstract: A structure for the n-type contact layer in the GaN-based MQW LEDs is provided. Instead of using Si-doped GaN as commonly found in conventional GaN-based MQW LEDs, the n-type contact layer provided by the present invention achieves high doping density (>1×1019 cm?3) and low resistivity through a superlattice structure combining two types of materials, AlmInnGa1-m-nN and AlpInqGa1-p-qN (0?m,n<1, 0<p,q<1, p+q?1, m<p), each having its specific composition and doping density. In addition, by controlling the composition of Al, In, and Ga in the two materials, the n-type contact layer would have a compatible lattice constant with the substrate and the epitaxial structure of the GaN-based MQW LEDs. This n-type contact layer, therefore, would not chap from the heavy Si doping, have a superior quality, and reduce the difficulties of forming n-type ohmic contact electrode. In turn, the GaN-based MQW LEDs would require a lower operation voltage.

Abstract: A GaN LED structure with a short period superlattice digital contacting layer is provided. The LED structure comprises, from the bottom to top, a substrate, a double buffer layer, an n-type GaN layer, a short period superlattice digital contacting layer, an active layer, a p-type shielding layer, and a contacting layer. The feature is to avoid the cracks or pin holes in the thick n-type GaN layer caused during the fabrication of heavily doped (n>1×1019cm?3) thick n-type GaN contacting layer, so that the quality of the GaN contacting layer is assured. In addition, by using short period heavily doped silicon Al1-x-yGaxInyN (n++-Al1-x-yGaxInyN) to grow a superlattice structure to become a short period superlattice digital contacting layer structure, which is used as a low resistive n-type contacting layer in a GaInN/GaN MQW LED. In the following steps, it is easier to form an n-type ohmic contacting layer, and the overall electrical characteristics are improved.

Abstract: A super-lattice thermoelectric device. The device includes p-legs and n-legs, each leg having a large number of alternating layers of two materials with differing electron band gaps. The n-legs in the device are comprised of alternating layers of silicon and silicon germanium. The p-legs includes alternating layers of B4C and B9C. In preferred embodiments the layers are about 100 angstroms thick. Applicants have fabricated and tested a first Si/SiGe (n-leg) and B4C/B9C (p-leg) quantum well thermocouple. Each leg was only 11 microns thick on a 5 micron Si substrate. Nevertheless, in actual tests the thermocouple operated with an amazing efficiency of 14 percent with a Th of 250 degrees C. Thermoelectric modules made according to the present invention are useful for both cooling applications as well as electric power generation. This preferred embodiment is a thermoelectric 10×10 egg crate type module about 6 cm×6 cm×0.

Abstract: An InGaAlAs-based buried type laser is expected to improve properties of the device, but generates defects at a re-growth interface and is difficult to realize a long-term reliability necessary for optical communication, due to inclusion of Al in an active layer. A semiconductor optical device and an optical module including a package substrate and a semiconductor optical device mounted on the package substrate are provided, whereby there are realized the improvement of device properties and the long-term reliability through the use of an Al composition ratio-reduced tensile strained quantum well layer.

Abstract: A semiconductor device includes a superlattice that, in turn, includes a plurality of stacked groups of layers. The device may also include regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. Moreover, the energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Accordingly, the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise be present.

Abstract: A method of fabricating a tunable quantum dot apparatus, comprising: forming multi-quantum wells sandwiched substantially between at least two barrier layers; spin coating a non-continuous mask onto at least one of said barrier layers; forming a gate material onto the mask, wherein the non-continuity of the mask substantially prevents formation of a continuous gate material layer; lifting off at least a portion of the gate material; self isolating the gate material; and, forming a top contact onto at least a portion of said barrier layers

Abstract: A Si/C superlattice useful for semiconductor devices comprises a plurality of epitaxially grown silicon layers alternating with carbon layers respectively adsorbed on surfaces of said silicon layers. Structures and devices comprising the superlattice and methods are described.

Abstract: The invention concerns a superluminescent light emitting diode (SLED) comprising a semiconductor heterostructure forming a PN junction and a waveguide. The semiconductor heterostructure includes a gain region with a contact means for biasing the PN junction so as to produce light emission including stimulated emission from an active zone of the gain region, and in the active zone a plurality of quantum dot layers, each quantum dot layer made up of a plurality of quantum dots and a plurality of adjoining layers, each adjoining layer adjacent to one of said quantum dot layers. The material composition or a deposition parameter of at least two adjoining layers is different. This ensures an enhanced emission spectral width.

Abstract: Various methods for forming a layer of strained silicon in a channel region of a device and devices constructed according to the disclosed methods. In one embodiment, a strain-inducing layer is formed, a relaxed layer is formed on the strain-inducing layer, a portion of the strain-inducing layer is removed, which allows the strain-inducing layer to relax and strain the relaxed layer.

Abstract: The present invention provides a method for forming quantum tunneling devices comprising the steps of: (1) providing a quantum well, the quantum well comprising a composite material, the composite material comprising at least a first and a second material; and (2) processing the quantum well so as to form at least one segregated quantum tunneling structure encased within a shell comprised of a material arising from processing the composite material, wherein each segregated quantum structure is substantially comprised of the first material. The present invention also comprises additional methods of formation, quantum tunneling devices, said electronic devices.

Abstract: Provided are a semiconductor device having a superlattice semiconductor layer and a method of fabricating the same. The semiconductor device includes a superlattice semiconductor layer in which first material layers and second material layers formed of different materials are alternately stacked. A plurality holes are formed in the first material layers and the second material layers forming a superlattice structure, and the holes are filled with materials of the adjacent material layers. The provided superlattice structure reduces a driving voltage by transferring charges through the holes in the first material layers and the second material layers while maintaining a predetermined optical confinement characteristic.

Abstract: A superlattice contact structure for light emitting devices includes a plurality of contiguous p-type Group III nitride layers. The contact structure may be formed of p-type indium nitride, aluminum indium nitride, or indium gallium nitride. Also disclosed is a light emitting device that incorporates the disclosed contact structures.

Abstract: The nitride semiconductor light emitting device includes a nitride semiconductor underlayer (102) grown on a surface of a nitride semiconductor substrate or a surface of a nitride semiconductor substrate layer laminated over a base substrate of other than a nitride semiconductor, and a light emitting device structure having a light emitting layer (106) including a quantum well layer or a quantum well layer and a barrier layer in contact with the quantum well layer between an n type layer (103–105) and a p type layer (107–110) over the nitride semiconductor underlayer. It includes a depression (D) not flattened on a surface of the light emitting device structure even after growth of the light emitting device structure.

Abstract: A semiconductor device includes a compound semiconductor substrate having a resistivity less than 1.0×108 Ohm-cm at least at one surface thereof, a buffer layer formed on the compound semiconductor substrate and having a super lattice structure, and an active layer formed on the buffer layer and having an active element formed therein.

Abstract: An epitaxial structure for the GaN-based LED is provided. The GaN-based LED uses a substrate usually made of sapphire or silicon-carbide (SiC). On top of the substrate, the GaN-based LED contains an n-type contact layer made of an n-type GaN-based material. On top of the n-type contact layer, the GaN-based LED further contains a lower barrier layer covering part of the surface of the n-type contact layer. A negative electrode is also on top of and has an ohmic contact with the n-type contact layer in an area not covered by the lower barrier layer. On top of the lower barrier layer, the GaN-based LED then further contains an active layer made of aluminum-gallium-indium-nitride, an upper barrier layer, a p-type contact layer made of a magnesium (Mg)-doped GaN material, and a positive electrode having an ohmic contact with the p-type contact layer, sequentially stacked in this order from bottom to top.

Abstract: The present invention provides a semiconductor device having a semiconductor multi-layer structure which includes at least an active layer having at least a quantum well, and the active layer further including at least a luminescent layer of InxAlyGa1?x?yN (0<x<1, 0?y?0.2), wherein a threshold mode gain of each of the at least quantum well is not more than 12 cm?1, and wherein a standard deviation of a microscopic fluctuation in a band gap energy of the at least luminescent layer is in the range of 75 meV to 200 meV.

Abstract: A quantum logic gate utilizes an inter-polarization (dipole—dipole) interaction between excitons having polarization in semiconductor quantum well structures, or a spin exchange interaction between spin polarized excitons in the semiconductor quantum well structures. Problems associated with conventional semiconductor quantum well structures are solved in that a phase relaxation time is very short because of using inter-subband electrons, and that there is no usable ultrashort optical pulse laser technology because a subband transition wavelength is in a far-infrared region and hence ultra fast control is impossible.

Abstract: A quantum well infrared photodetector (QWIP) that provides two-color image sensing. Two different quantum wells are configured to absorb two different wavelengths. The QWIPs are arrayed in a focal plane array (FPA). The two-color QWIPs are selected for readout by selective electrical contact with the two different QWIPs or by the use of two different wavelength sensitive gratings.

Abstract: A semiconductor device includes a superlattice that, in turn, includes a plurality of stacked groups of layers. The device may also include regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. Moreover, the energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Accordingly, the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise be present.

Abstract: A method (and resultant structure) of forming a semiconductor structure, includes processing an oxide to have a crystalline arrangement, and depositing an amorphous semiconductor layer on the oxide by one of evaporation and chemical vapor deposition (CVD).

Abstract: A semiconductor device includes a superlattice that, in turn, includes a plurality of stacked groups of layers. The device may also include regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. Moreover, the energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Accordingly, the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise be present.

Abstract: A quantum logic gate utilizes an inter-polarization (dipole-dipole) interaction between excitons having polarization in semiconductor quantum well structures, or a spin exchange interaction between spin polarized excitons in the semiconductor quantum well structures. Problems associated with conventional semiconductor quantum well structures are solved in that a phase relaxation time is very short because of using inter-subband electrons, and that there is no usable ultrashort optical pulse laser technology because a subband transition wavelength is in a far-infrared region and hence ultra fast control is impossible.

Abstract: A heterojunction bipolar transistor is provided that has a reduced turn-on voltage threshold. A base spacer layer is provided and alternately an emitter layer is provided that has a lowered energy gap. The lowered energy gap of the base spacer or the emitter spacer allow the heterojunction bipolar transistor to realize a lower turn-on voltage threshold. The thickness of the emitter layer if utilized is kept to a minimum to reduce the associated space charge recombination current in the heterojunction bipolar transistor.

Abstract: Methods of forming a nano-scale electronic and optoelectronic devices include forming a substrate having a semiconductor layer therein and a substrate insulating layer on the semiconductor layer. An etching template having a first array of non-photolithographically defined nano-channels extending therethrough, is formed on the substrate insulating layer. This etching template may comprise an anodized metal oxide, such as an anodized aluminum oxide (AAO) thin film. The substrate insulating layer is then selectively etched to define a second array of nano-channels therein. This selective etching step preferably uses the etching template as an etching mask to transfer the first array of nano-channels to the underlying substrate insulating layer, which may be thinner than the etching template. An array of semiconductor nano-pillars is then formed in the second array of nano-channels. The semiconductor nano-pillars in the array may have an average diameter in a range between about 8 nm and about 50 nm.

Abstract: A photosensitive diode has an active region defining a majority carrier of a first conductivity type and a minority carrier of a second conductivity type. At least one extraction region is disposed on a first side of the active region and has a majority carrier of the second conductivity type. Carriers of the second conductivity type are extracted from the active region and into the extraction region under a condition of reverse bias. At least one exclusion region is disposed on a second side of the active region and has a majority carrier of the first conductivity type. The exclusion region prevents entry of its minority carriers, which are of the second conductivity type, into the active region while in a condition of reverse bias. The exclusion region includes a superlattice with a plurality of layers.

Abstract: This invention teaches two new families of Si-based Ge/SnxGe1-x heterodiode and multiple quantum well (MQW) photonic devices: (1) band-to-band photodetectors, lasers, emitters, amplifiers and modulators for the 1.5 to 12 ?m wavelength range; (2) intersubband photodetectors, lasers, emitters and modulators for 12 to 100 ?m operation. The bipolar band-to-band devices have applications within the 1.5-2.2, 3-5 and 8-to-12 ?m bands. The unipolar intersubband group has longwave infrared and terahertz applications. All strained-layer devices are grown a relaxed SnySizGe1-y-z buffer layer—a virtual substrate (VS) grown directly upon a silicon wafer by unique LT UHV-CVD. The VS provides a low-defect atomic template for subsequent heteroepitaxy and is an essential enabling technique for engineering tensile and compressive strain within the Ge/SnxGe1-x MQW by selecting the VS lattice parameter to be approx midway between the layer lattices.

Abstract: A quantum well structure is provided that includes two or more quantum well layers coupled by at least one barrier layer such that at least one of a piezo-electric field and a pyro-electric field is produced. The quantum well structure is sufficiently doped to cause a Fermi energy to be located between ground states and excited states of the coupled quantum well layers. The quantum well structure can be incorporated into a layered semiconductor to form optical devices such as a laser or optical amplifier.

Abstract: A semiconductor device includes a superlattice that, in turn, includes a plurality of stacked groups of layers. The device may also include regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. Moreover, the energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Accordingly, the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise be present.

Abstract: A method for fabricating a p-n heterojunction device is provided, the device being preferably comprised of an n-type GaN layer co-doped with silicon and zinc and a p-type AlGaN layer. The device may also include a p-type GaN capping layer. The device can be grown on any of a variety of different base substrates, the base substrate comprised of either a single substrate or a single substrate and an intermediary layer. The device can be grown directly onto the surface of the substrate without the inclusion of a low temperature buffer layer.

Abstract: GaAs substrates with compositionally graded buffer layers for matching lattice constants with high-Indium semiconductor materials such as quantum well infrared photoconductor devices and thermo photo voltaic devices are disclosed.

Abstract: A heterojunction bipolar transistor has a raised breakdown voltage and restrains the rising characteristic of IC-VCE characteristic from degrading. The collector region includes first, second, and third collector layers of semiconductor. The first collector layer is made of a doped or undoped semiconductor in such a way as to contact the sub-collector region. The second collector layer is made of a doped or undoped semiconductor having a narrower band gap than the first collector layer in such a way as to contact the base region. The third collector layer has a higher doping concentration than the second collector layer in such a way as to be located between or sandwiched by the first collector layer and the second collector layer.

Abstract: Light-emitting devices are described. One example of a light-emitting device includes a first barrier layer and a second barrier layer, and a quantum well layer located between the first and second barrier layers. The first and second barrier layers are composed of gallium arsenide, and the quantum well layer is composed of indium gallium arsenide nitride. A first layer is located between the quantum well layer and the first barrier layer. The first layer has a bandgap energy between that of the first barrier layer and that of the quantum well layer. Another example of a light-emitting device includes a quantum well and a carrier capture element adjacent the quantum well. The carrier capture element increases the effective carrier capture cross-section of the quantum well.

Abstract: In the manufacture of a semiconductor laser device, sequentially grown on a sapphire substrate in the following order are a buffer layer, a first undoped GaN layer, a first super lattice defect reducing layer, a second undoped GaN layer, a second super lattice defect reducing layer, a third undoped GaN layer, a third super lattice defect reducing layer and a fourth undoped GaN layer. A device structure is then formed thereon. The first to third super lattice defect reducing layers each include five pairs of InGaN and AlGaN films alternately placed on one another in this order.

Abstract: A concentrator for detecting biological and/or chemical materials in an environment. The concentrator comprises an engineered superlattice structure having alternating layers of elemental, binary or ternary group III-group V, or group IV-group IV semiconducting materials. A method for detecting biological and/or chemical materials in an environment using the concentrator. The method comprising exposing the concentrator to the biological and/or chemical materials in an environment and activating the superlattice structure optically or electrically followed by the detection of the biological and/or chemical materials.

Abstract: A multi-layer film 10 is formed by stacking a Si1-x1-y1Gex1Cy1 layer (0?x1<1 and 0<y1<1) having a small Ge mole fraction, e.g., a Si0.785Ge0.2C0.015 layer 13, and a Si1-x2-y2Gex2Cy2 layer (0<x2?1 and 0?y2<1) (where x1<x2 and y1>y2) having a high Ge mole fraction, e.g., a Si0.2Ge0.8 layer 12. In this manner, the range in which the multi-layer film serves as a SiGeC layer with C atoms incorporated into lattice sites extends to high degrees in which a Ge mole fraction is high.

Abstract: A nitride semiconductor device including a light emitting device comprises a n-type region of one or more nitride semiconductor layers having n-type conductivity, a p-type region of one or more nitride semiconductor layers having p-type conductivity and an active layer between the n-type region and the p-type region. In such devices, there is provided with a super lattice layer comprising first layers and second layers which are nitride semiconductors having a different composition respectively. The super lattice structure makes working current and voltage of the device lowered, resulting in realization of more efficient devices.

Abstract: A light-emitting device and a method for manufacturing the same are described, by forming a SiN/Al1-x-yInxGayN(0?x?1, 0?y?1, x+y?1) superlattice layer between a substrate and an undoped GaN as a buffer layer, so as to reduce dislocation density of the buffer layer. In the SiN/Al1-x-yInxGayN(0?x?1, 0?y?1, x+y?1) superlattice layer, Al1-x-yInxGayN(0?x?1, 0?y?1, x+y?1) can be n-type, p-type or undoped.

Abstract: In the nitride semiconductor device of the present invention, an active layer 12 is sandwiched between a p-type nitride semiconductor layer 11 and an n-type nitride semiconductor layer 13. The active layer 12 has, at least, a barrier layer 2a having an n-type impurity; a well layer 1a made of a nitride semiconductor that includes In; and a barrier layer 2c that has a p-type impurity, or that has been grown without being doped. An appropriate injection of carriers into the active layer 12 becomes possible by arranging the barrier layer 2c nearest to the p-type layer side.

Abstract: A semiconductor device includes a superlattice that, in turn, includes a plurality of stacked groups of layers. The device may also include regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. Moreover, the energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Accordingly, the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise be present.

Abstract: A superlattice thermoelectric device. The device includes p-legs and n-legs, each leg includes a large number of at least two different very thin alternating layers of elements. The n-legs in the device includes alternating layers of silicon and silicon carbide. In preferred embodiments p-legs include a superlatice of B-C layers, with alternating layers of different stoichiometric forms of B-C. This preferred embodiment is designed to produce 20 Watts with a temperature difference of 300 degrees C. with a module efficiency of about 30 percent. The module is about 1 cm thick with a cross section area of about 7 cm2 and has about 10,000 sets of n and p legs each set of legs being about 55 microns thick and having about 5,000 very thin layers (each layer about 10 nm thick).