Non-electrical Input Responsive (e.g., Light Responsive Imager, Input Programmed By Size Of Storage Sites For Use As A Read-only Memory, Etc.) Patents (Class 257/225)
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Publication number: 20130099291Abstract: A solid-state imaging device includes a first and second pixel regions. In the first pixel region, a photoelectric conversion unit, a floating diffusion region (FD), and a transferring transistor are provided. In the second pixel region, an amplifying transistor, and a resetting transistor are provided. A first element isolation portion is provided in the first pixel region, while a second element isolation portion is provided in the second pixel region. An amount of protrusion of an insulating film into a semiconductor substrate in the first element isolation portion is smaller, than that in the second element isolation portion.Type: ApplicationFiled: June 21, 2011Publication date: April 25, 2013Applicant: CANON KABUSHIKI KAISHAInventors: Mineo Shimotsusa, Fumihiro Inui
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Patent number: 8426896Abstract: A solid state imaging device in which ? characteristic is obtained and enlargement of dynamic range is provided. The solid state imaging device of the present invention includes a vertical overflow function and has a feature in which potential of a semiconductor substrate is changed from a high potential to a low potential in a stepwise manner during a period from an exposure start to an exposure end.Type: GrantFiled: June 28, 2011Date of Patent: April 23, 2013Assignee: Sony CorporationInventor: Tetsuro Kumesawa
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Publication number: 20130075791Abstract: In various embodiments, a charge-coupled device includes channel stops laterally spaced away from the channel by fully depleted regions.Type: ApplicationFiled: September 20, 2012Publication date: March 28, 2013Inventor: Christopher Parks
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Publication number: 20130076951Abstract: There is provided an imaging element including a transmission channel region provided in an optical black pixel region shielded from light from an outside of a semiconductor substrate by a light shielding film, for transmitting a charge existing inside the semiconductor substrate of the optical black pixel region to an outside of the optical black pixel region.Type: ApplicationFiled: August 13, 2012Publication date: March 28, 2013Applicant: Sony CorporationInventor: Suzunori ENDO
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Patent number: 8405129Abstract: A design structure tangibly embodied in a machine readable medium for designing, manufacturing, or testing an integrated circuit includes a plurality of bit line structures, a plurality of word line structures intersecting said plurality of bit line structures to form a plurality of cell locations, and a plurality of cells located at said plurality of cell locations, each of said cells being selectively coupled to a corresponding bit line structure under control of a corresponding word line structure, each of said cells comprising a logical storage element having at least a first n-type field effect transistor and at least a first p-type field effect transistor, wherein said at least first n-type field effect transistor is formed with a relatively thick buried oxide layer sized to reduce capacitance of said bit line structures, and said at least first p-type field effect transistor is formed with a relatively thin buried oxide layer.Type: GrantFiled: April 18, 2012Date of Patent: March 26, 2013Assignee: International Business Machines CorporationInventors: Ching-Te K. Chuang, Fadi H. Gebara, Keunwoo Kim, Jente Benedict Kuang, Hung C. Ngo
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Publication number: 20130069119Abstract: Provided is a solid-state imaging device. Two unit cells are prepared each having three pixels and sharing an output circuit. One of the basic blocks is rotated by 180° such that a reset drain is shared, resulting in a 6-pixel 1-cell, and the cells are disposed in a square lattice pattern or checkerboard pattern. Thus, element isolation regions between the pixels and the output circuit disposed adjacent thereto are minimized, and the number of wirings disposed around the pixels is reduced. As a result, a margin for white scratches and saturation charge amounts may be increased despite the miniaturization of cells.Type: ApplicationFiled: March 15, 2012Publication date: March 21, 2013Applicant: Kabushiki Kaisha ToshibaInventor: Hirokazu SEKINE
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Patent number: 8399914Abstract: A solid-state imaging device includes a photoelectric conversion unit that includes a first region of a first conductivity type and a second region of a second conductivity type between which a pn junction is formed, the first region and the second region being formed in a signal-readout surface of a semiconductor substrate, the second region being located at a position deeper than the first region; and a transfer transistor configured to transfer signal charges accumulated in the photoelectric conversion unit to a readout drain through a channel region that lies under a surface of the first region and horizontally adjacent to the photoelectric conversion unit, the transfer transistor being formed in the signal-readout surface. The transfer transistor includes a transfer gate electrode that extends from above the channel region with a gate insulating film therebetween to above the first region so as to extend across a step.Type: GrantFiled: August 11, 2010Date of Patent: March 19, 2013Assignee: Sony CorporationInventor: Keiji Mabuchi
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Patent number: 8395193Abstract: A MOS-type solid-state image pickup device is provided on a semiconductor substrate and includes a photoelectric conversion unit having a first semiconductor region, a second semiconductor region, and a third semiconductor region. A transfer gate electrode is disposed on an insulation film and transfers a carrier from the second semiconductor region to a fourth semiconductor region, and an amplifying MOS transistor has a gate electrode connected to the fourth semiconductor region. In addition, a fifth semiconductor region is continuously disposed to the second semiconductor region, under the gate electrode. An entire surface of the third semiconductor region is covered with the insulation film, and a side portion of the third semiconductor region that is laterally opposite to the transfer gate is in contact with the first semiconductor region.Type: GrantFiled: February 2, 2012Date of Patent: March 12, 2013Assignee: Canon Kabushiki KaishaInventors: Toru Koizumi, Shigetoshi Sugawa, Isamu Ueno, Tetsunobu Kochi, Katsuhito Sakurai, Hiroki Hiyama
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Publication number: 20130056800Abstract: An image sensor is described in which the imaging pixels have reduced noise by blocking nitridation in selected areas. In one example, a method includes forming a first and second gate oxide layer over a substrate, forming a layer of photoresist over the first gate oxide layer, applying nitridation to the photoresist and the second gate oxide layer such that the first gate oxide layer is protected from the nitridation by the photoresist, and forming a polysilicon gate over the first and second gate oxide layers.Type: ApplicationFiled: September 7, 2011Publication date: March 7, 2013Inventors: Jeong-Ho Lyu, Sohei Manabe, Howard Rhodes
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Patent number: 8384133Abstract: In a solid state imaging device, and a method of manufacture thereof, the efficiency of the transfer of available photons to the photo-receiving elements is increased beyond that which is currently available. Enhanced anti-reflection layer configurations, and methods of manufacture thereof, are provided that allow for such increased efficiency. They are applicable to contemporary imaging devices, such as charge-coupled devices (CCDs) and CMOS image sensors (CISs). In one embodiment, a photosensitive device is formed in a semiconductor substrate. The photosensitive device includes a photosensitive region. An anti-reflection layer comprising silicon oxynitride is formed on the photosensitive region. The silicon oxynitride layer is heat treated to increase a refractive index of the silicon oxynitride layer, and to thereby decrease reflectivity of incident light at the junction of the photosensitive region.Type: GrantFiled: July 17, 2009Date of Patent: February 26, 2013Assignee: Samsung Electronics Co., Ltd.Inventor: Chang Rok Moon
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Patent number: 8378391Abstract: A solid-state image sensor which holds a potential for a long time and includes a thin film transistor with stable electrical characteristics is provided. When the off-state current of a thin film transistor including an oxide semiconductor layer is set to 1×10?13 A or less and the thin film transistor is used as a reset transistor and a transfer transistor of the solid-state image sensor, the potential of the signal charge storage portion is kept constant, so that a dynamic range can be improved. When a silicon semiconductor which can be used for a complementary metal oxide semiconductor is used for a peripheral circuit, a high-speed semiconductor device with low power consumption can be manufactured.Type: GrantFiled: November 3, 2010Date of Patent: February 19, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Jun Koyama, Shunpei Yamazaki
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Publication number: 20130032697Abstract: In accordance with an embodiment, a pixel includes at least two switches, each switch having a control terminal and first and second current carrying terminals. The control terminals of the first and second switches are commonly connected together. In accordance with another embodiment, a method for transferring charge from a first switch to a capacitance includes applying voltage to the commonly connected control terminals of the first and second switches.Type: ApplicationFiled: April 21, 2011Publication date: February 7, 2013Inventor: Yannick De Wit
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Publication number: 20130027596Abstract: Electronic devices may include monochrome image sensors having multi-storage-node image sensor pixels. A multi-storage-node image pixel may be synchronized with artificial light sources of different colors and may include a floating diffusion region and multiple storage regions. The image pixels may be sequentially exposed to each light color and may store charge associated with each color in each of the different storage regions. After exposure, the stored charge may be transferred to the floating diffusion region and subsequently read out using readout circuitry. The image pixel may have one set of storage gates that can perform both storage and transfer functions. Alternatively, the image pixel may have a first set of transfer gates for transferring charge to the storage regions and a second set of transfer gates for transferring charge from the storage regions to the floating diffusion region.Type: ApplicationFiled: July 25, 2012Publication date: January 31, 2013Inventor: Chung Chun Wan
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Publication number: 20130026384Abstract: Electronic devices may include time-of-flight image pixels. A time-of-flight image pixel may include first and second charge storage regions coupled to a photosensor and a transfer transistor with a gate terminal coupled to the first storage region. An electronic device may further include a light pulse emitter configured to emit pulses of light to be reflected by objects in a scene. Reflected portions of the emitted pulses of light may be captured along with background light by the time-of-flight image pixels. Time-of-flight image pixels may be configured sense the time-of-flight of the reflected portions of the emitted pulses. The electronic device may include processing circuitry configured to use the sensed time-of-flight of the reflected portions to generate depth images of a scene. Depth images may include depth-image pixel values that contain information corresponding to the distance of the objects in the scene from the electronic device.Type: ApplicationFiled: October 20, 2011Publication date: January 31, 2013Inventors: Dongsoo Kim, Jae Eun Lim, Kwangbo Cho
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Patent number: 8361824Abstract: A lens forming method according to the present invention for forming lenses capable of focusing light on a plurality of respective photoelectric conversion sections constituting of a semiconductor apparatus is described. The method includes a lens forming step of processing a lens forming material, in which an average gradient of a ? curve indicating a residual film thickness with respect to the amount of irradiation light is between ?15 and ?0.8 nm·cm2/mJ within the range of a residual film ratio of 10 to 50% or within the range of the amount of irradiation light of 55 to 137 mJ/cm2 into a lens surface shape, using a photomask with an optical transmittance that is varied according to a lens surface shape, as an exposure mask.Type: GrantFiled: May 5, 2010Date of Patent: January 29, 2013Assignee: Sharp Kabushiki KaishaInventor: Junichi Nakai
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Patent number: 8362527Abstract: Provision of a solid-state imaging device of a planarized structure with reduced dark currents, allowing for high sensitivities over a wide wavelength band ranging from visible wavelengths to near-infrared wavelengths, and a fabrication method of the same.Type: GrantFiled: December 8, 2008Date of Patent: January 29, 2013Assignee: Rohm Co., Ltd.Inventors: Osamu Matsushima, Kenichi Miyazaki
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Patent number: 8357956Abstract: A solid-state imaging apparatus, controlling a potential on a semiconductor substrate for an electronic shutter operation, includes: a first semiconductor region of the first conductivity type for forming a photoelectric conversion region; a second semiconductor region of the first conductivity type, formed separately from the photoelectric conversion region, for accumulating carriers; a third semiconductor region of a second conductivity type arranged under the second semiconductor region, for operating as a potential barrier; a fourth semiconductor region of the second conductivity type extending between the first semiconductor region and the semiconductor substrate, and between the third semiconductor region and the semiconductor substrate; and a first voltage supply portion for supplying a voltage to the third semiconductor region; wherein the first voltage supply portion includes a fifth semiconductor region of the second conductivity type arranged in the pixel region, and a first electrode connected toType: GrantFiled: March 11, 2011Date of Patent: January 22, 2013Assignee: Canon Kabushiki KaishaInventors: Masahiro Kobayashi, Yuichiro Yamashita
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Publication number: 20130009068Abstract: The present invention discloses a radiation detector, an imaging device and an electrode structure thereof, and a method for acquiring an image. The radiation detector comprises: a radiation sensitive film, a top electrode on the radiation sensitive film, and an array of pixel units electrically coupled to the radiation sensitive film. Each pixel unit comprises: a pixel electrode (which is configured to collect a charge signal in a pixel area of the radiation sensitive film), a storage capacitor, a reset transistor, a buffer transistor, a column strobe transistor, and a row strobe transistor. The column strobe transistor and the row strobe transistor are connected in series between the buffer transistor and the signal line, and transfer the voltage signal of the corresponding pixel unit in response to a column strobe signal and a row strobe signal. The radiation detector may be used for, for example, X-ray digital imaging.Type: ApplicationFiled: June 30, 2011Publication date: January 10, 2013Applicant: NUCTECH COMPANY LIMITEDInventors: Lan Zhang, Zhiqiang Chen, Ziran Zhao, Wanlong Wu, Yuanjing Li, Zhi Deng, Xiaocui Zheng
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Publication number: 20130001651Abstract: A semiconductor light detecting element is provided with a silicon substrate having a semiconductor layer, and an epitaxial semiconductor layer grown on the semiconductor layer and having a lower impurity concentration than the semiconductor layer; and conductors provided on a surface of the epitaxial semiconductor layer. A photosensitive region is formed in the epitaxial semiconductor layer. Irregular asperity is formed at least in a surface opposed to the photosensitive region in the semiconductor layer. The irregular asperity is optically exposed.Type: ApplicationFiled: February 22, 2011Publication date: January 3, 2013Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Mitsuhito Mase, Akira Sakamoto, Takashi Suzuki, Tomohiro Yamazaki, Yoshimaro Fujii
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Publication number: 20130001650Abstract: The present invention provides a solid-state imaging device in which high S/N is achieved. A solid-state imaging device includes a photodiode, a transfer transistor, a floating diffusion, a floating diffusion wiring, an amplifying transistor, a power line, and first output signal lines, in which the first output signal lines are formed one on each side of the floating diffusion wiring in a layer having the floating diffusion wiring formed on a semiconductor substrate, and the power line is formed above the floating diffusion wiring.Type: ApplicationFiled: September 12, 2012Publication date: January 3, 2013Applicant: PANASONIC CORPORATIONInventor: Hirohisa Ohtsuki
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Patent number: 8344432Abstract: A solid state imaging device includes: a light receiving section performing photoelectric conversion; a transfer register formed in a semiconductor base; a transfer electrode formed of a semiconductor layer on the transfer register; a charge transfer section which formed of the transfer register and the transfer electrode and transferring a signal charge accumulated in the light receiving section; a bus line electrically connected to a portion of the transfer electrode to supply a driving pulse to the transfer electrode and formed of a metal layer; and a barrier metal layer formed near an interface between the transfer electrode and the bus line in a contact section that connects the transfer electrode and the bus line with each other and having a work function of the size between a work function of the semiconductor layer of the transfer electrode and a work function of the metal layer of the bus line.Type: GrantFiled: April 20, 2010Date of Patent: January 1, 2013Assignee: Sony CorporationInventor: Fuminobu Saiho
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Patent number: 8319291Abstract: Provided is a non-volatile memory device including at least one horizontal electrode, at least one vertical electrode, at least one data storage layer and at least one reaction prevention layer. The least one vertical electrode crosses the at least one horizontal electrode. The at least one data storage layer is located in regions in which the at least one vertical electrode crosses the at least one horizontal electrode, and stores data by varying its electrical resistance. The at least one reaction prevention layer is located in the regions in which the at least one vertical electrode crosses the at least one horizontal electrode.Type: GrantFiled: September 11, 2009Date of Patent: November 27, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Deok-kee Kim, June-mo Koo, Ju-chul Park, Kyoung-won Na, Dong-seok Suh, Bum-seok Seo, Yoon-dong Park
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Patent number: 8319878Abstract: A solid-state imaging device of the type having photoelectric conversion elements formed in a matrix pattern on a semiconductor substrate, vertical transfer elements each of which reads signal charges from the photoelectric conversion elements arranged in the column direction and transfers the signal charges in the vertical direction, and a horizontal transfer element which transfers in the horizontal direction the signal charges sent from each of the vertical transfer elements, the horizontal transfer element includes: a charge transfer channel; a first transfer electrode; a second transfer electrode; and an interelectrode insulating film; with the first transfer electrode and the second transfer electrode being at the same potential.Type: GrantFiled: March 12, 2010Date of Patent: November 27, 2012Assignee: Sony CorporationInventors: Takashi Terada, Keisuke Hatano
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Patent number: 8313977Abstract: Provided are an image sensor and a method for manufacturing the same. The image sensor comprises a semiconductor substrate, an interconnection and an interlayer dielectric, a lower electrode layer, an image sensing device, a first via hole, a barrier pattern, a second via hole, and a metal contact. The semiconductor substrate comprises a readout circuitry. The interconnection and the interlayer dielectric are formed on the semiconductor substrate. The lower electrode layer is disposed over the interlayer dielectric. The image sensing device is disposed on the lower electrode layer. The first via hole is formed through the image sensing device. The barrier pattern is formed on a sidewall of the first via hole. The second via hole is formed through the lower electrode layer and the interlayer dielectric under the first via hole. The metal contact is formed in the first and second via holes.Type: GrantFiled: November 24, 2009Date of Patent: November 20, 2012Assignee: Dongbu Hitek Co., Ltd.Inventor: Tae Gyu Kim
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Patent number: 8300125Abstract: A method and apparatus for using TFT transistors or MIS capacitors as light-sensing elements in charge mapping arrays. A bias stress may be applied to a plurality of pixels in a charge map array. As a result, charge carriers may be trapped in each of the plurality of pixels responsive to the bias stress, which may be observed as a value shift such as a threshold voltage VT shift. Light may then be transmitted toward the plurality of pixels in the charge map array causing some of the pixels to absorb the light. The trapped charge carriers are released in the pixels that absorbed the light and not released in the pixels that did not absorb the light. The value shift in each of the pixels can be compared to determine which of the pixels absorbed the light.Type: GrantFiled: September 22, 2008Date of Patent: October 30, 2012Assignee: Palo Alto Research Center IncorporatedInventors: Tse Nga Ng, Sanjiv Sambandan, William S. Wong
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Patent number: 8299505Abstract: Pixel sensor cells, methods of fabricating pixel sensor cells, and design structures for a pixel sensor cell. The pixel sensor cell has a gate structure that includes a gate dielectric and a gate electrode on the gate dielectric. The gate electrode includes a layer with first and second sections that have a juxtaposed relationship on the gate dielectric. The second section of the gate electrode is comprised of a conductor, such as doped polysilicon or a metal. The first section of the gate electrode is comprised of a metal having a higher work function than the conductor comprising the second section so that the gate structure has an asymmetric threshold voltage.Type: GrantFiled: February 17, 2011Date of Patent: October 30, 2012Assignee: International Business Machines CorporationInventors: Brent A. Anderson, Andres Bryant, William F. Clark, Jr., John Joseph Ellis-Monaghan, Edward J. Nowak
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Publication number: 20120267692Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein. and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.Type: ApplicationFiled: July 3, 2012Publication date: October 25, 2012Applicant: Sony CorporationInventors: Ryoji Suzuki, Keiji Mabuchi, Tomonori Mori
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Publication number: 20120267691Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein. and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.Type: ApplicationFiled: July 3, 2012Publication date: October 25, 2012Applicant: Sony CorporationInventors: Ryoji Suzuki, Keiji Mabuchi, Tomonori Mori
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Publication number: 20120267690Abstract: The present invention relates to a solid-state image pickup device. The device includes a first substrate including a photoelectric conversion element and a transfer gate electrode configured to transfer charge from the photoelectric conversion element, a second substrate having a peripheral circuit portion including a circuit configured to read a signal based charge generated in the photoelectric conversion element, the first and second substrates being laminated. The device further includes a multilayer interconnect structure, disposed on the first substrate, including an aluminum interconnect and a multilayer interconnect structure, disposed on the second substrate, including a copper interconnect.Type: ApplicationFiled: December 22, 2010Publication date: October 25, 2012Applicant: CANON KABUSHIKI KAISHAInventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
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Patent number: 8294185Abstract: A solid-state imaging device includes: a photoelectric conversion portion that receives an incident light from a back surface side of a silicon layer to perform photoelectric conversion on the incident light; and a pixel transistor portion that outputs signal charges generated in the photoelectric conversion portion towards a front surface side of the silicon layer, wherein a gettering layer having internal stress is provided on the front surface side of the silicon layer at a position to overlap the photoelectric conversion portion on a plan view layout thereof.Type: GrantFiled: February 12, 2010Date of Patent: October 23, 2012Assignee: Sony CorporationInventor: Chiaki Sakai
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Patent number: 8274101Abstract: An image sensor includes a device wafer substrate of a device wafer, a device layer of the device wafer, and optionally a heat control structure and/or a heat sink. The device layer is disposed on a frontside of the device wafer substrate and includes a plurality of photosensitive elements disposed within a pixel array region and peripheral circuitry disposed within a peripheral circuits region. The photosensitive elements are sensitive to light incident on a backside of the device wafer substrate. The heat control structure is disposed within the device wafer substrate and thermally isolates the pixel array region from the peripheral circuits region to reduce heat transfer between the peripheral circuits region and the pixel array region. The heat sink conducts heat away from the device layer.Type: GrantFiled: August 9, 2010Date of Patent: September 25, 2012Assignee: OmniVision Technologies, Inc.Inventors: Vincent Venezia, Duli Mao, Hsin-Chih Tai, Yin Qian, Howard E. Rhodes
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Patent number: 8274100Abstract: A pixel array in an image sensor includes multiple pixels. The pixel array includes vertical shift registers for shifting charge out of the pixel array. The vertical shift registers can be interspersed between the pixels, such as in an interline image sensor, or the photosensitive areas in the pixels can operate as vertical shift registers. The pixels are divided into blocks of pixels. One or more electrodes are disposed over each pixel. Conductive strips are disposed over the electrodes. Contacts are used to connect selected electrodes to respective conductive strips. The contacts in at least one block of pixels are positioned according to one contact pattern while the contacts in one or more other blocks are positioned according to a different contact pattern. The different contact patterns reduce or eliminate visible patterns in the contact locations.Type: GrantFiled: July 29, 2010Date of Patent: September 25, 2012Assignee: Truesense Imaging, Inc.Inventor: Shen Wang
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Publication number: 20120211804Abstract: A photosite may include, in a semi-conductor substrate, a photodiode pinched in the direction of the depth of the substrate including a charge storage zone, and a charge transfer transistor to transfer the stored charge. The charge storage zone may include a pinching in a first direction passing through the charge transfer transistor defining a constriction zone adjacent to the charge transfer transistor.Type: ApplicationFiled: February 16, 2012Publication date: August 23, 2012Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SAInventors: Julien MICHELOT, Francois Roy, Frederic Lalanne
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Patent number: 8247848Abstract: An n-type region as a charge storage region of a photodiode is buried in a substrate. The interface between silicon and a silicon oxide film is covered with a high concentration p-layer and a lower concentration p-layer is formed only in the portion immediately below a floating electrode for signal extraction. Electrons generated by light are stored in the charge storage region, thereby changing the potential of the portion of the p-layer at the surface of the semiconductor region. The change is transmitted through a thin insulating film to the floating electrode by capacitive coupling and read out by a buffer transistor. Initialization of charges is executed by adding a positive high voltage to the gate electrode of a first transfer transistor such that the electrons stored in the charge storage region are transferred to the n+ region and generation of reset noise is protected.Type: GrantFiled: October 19, 2010Date of Patent: August 21, 2012Assignee: National University Corporation Shizuoka UniversityInventor: Shoji Kawahito
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Patent number: 8247823Abstract: A light-emitting element includes a semiconductor laminated structure including a first semiconductor layer, a light-emitting layer and a second semiconductor layer, an insulation layer provided on the semiconductor laminated structure, a first wiring including a first vertical conducting portion and a first planar conducting portion and being electrically connected to the first semiconductor layer, the first vertical conducting portion extending inside the insulation layer, the light-emitting layer and the second semiconductor layer in a vertical direction and the first planar conducting portion extending inside the insulation layer in a planar direction, and a second wiring including a second vertical conducting portion and a second planar conducting portion and being electrically connected to the second semiconductor layer, the second vertical conducting portion extending inside the insulation layer in a vertical direction and the second planar conducting portion extending inside the insulation layer in aType: GrantFiled: September 17, 2010Date of Patent: August 21, 2012Assignee: Toyoda Gosei Co., Ltd.Inventors: Kosuke Yahata, Naoki Nakajo, Masao Kamiya
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Publication number: 20120199883Abstract: An N-type semiconductor region and a floating diffusion region are disposed in an active region. A transfer gate electrode for transferring charges from a PD to an FD is disposed on a semiconductor substrate through an insulator. A part of the N-type semiconductor region constituting the PD and a part of the transfer gate electrode are overlapped with each other. A P-type semiconductor region is disposed in the active region. The P-type semiconductor region and the portion overlapped with the transfer gate electrode of the N-type semiconductor region are disposed adjacent to each other in the direction parallel to the interface of the semiconductor substrate and the insulator. The position of the impurity concentration peak of the N-type semiconductor region and the position of the impurity concentration peak of the P-type semiconductor region are different from each other in depth.Type: ApplicationFiled: January 27, 2012Publication date: August 9, 2012Applicant: CANON KABUSHIKI KAISHAInventor: Masahiro Kobayashi
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Publication number: 20120200841Abstract: A first photoelectric conversion element, which detects light and converts the light into photoelectrons has: one first MOS diode having a first electrode formed on a semiconductor base body with an insulator therebetween; and a plurality of second MOS diodes, each of which has a second electrode formed on the semiconductor base body with the insulator therebetween. The first electrode of the first MOS diode has, when viewed from the upper surface, a comb-like shape wherein a plurality of branch portions are branched from one electrode portion. Each second electrode of each of the second MOS diodes is, when viewed from the upper surface, separated from the first electrode, and is disposed to nest between the branch portions of the first electrode.Type: ApplicationFiled: October 1, 2010Publication date: August 9, 2012Applicant: HONDA MOTOR CO., LTD.Inventors: Tomoyuki Kamiyama, Keisuke Korekado
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Publication number: 20120193683Abstract: The invention relates to time-delay and signal-integration linear image sensors (or TDI sensors). According to the invention, a pixel comprises a succession of several insulated gates covering a semiconducting layer, the gates of one pixel being separated from one another and separated from the gates of an adjacent pixel of another line by narrow uncovered gaps of a gate and comprising a doped region of a second type of conductivity covered by a doped superficial region of the first type; the superficial regions are kept at one and the same reference potential; the width of the narrow gaps between adjacent gates is such that the internal potential of the region of the second type is modified in the whole width of the narrow gap when a gate sustains the alternations of potential necessary for the transfer of charges from one pixel to the following one.Type: ApplicationFiled: January 26, 2012Publication date: August 2, 2012Applicant: E2V SEMICONDUCTORSInventor: Frederic MAYER
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Patent number: 8227844Abstract: A CMOS active pixel sensor (APS) cell structure includes at least one transfer gate device and method of operation. A first transfer gate device comprises a diodic or split transfer gate conductor structure having a first doped region of first conductivity type material and a second doped region of a second conductivity type material. A photosensing device is formed adjacent the first doped region for collecting charge carriers in response to light incident thereto, and, a diffusion region of a second conductivity type material is formed at or below the substrate surface adjacent the second doped region of the transfer gate device for receiving charges transferred from the photosensing device while preventing spillback of charges to the photosensing device upon timed voltage bias to the diodic or split transfer gate conductor structure.Type: GrantFiled: January 14, 2008Date of Patent: July 24, 2012Assignee: International Business Machines CorporationInventors: James W. Adkisson, Andres Bryant, John J. Ellis-Monaghan
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Publication number: 20120181582Abstract: A manufacturing method of a photoelectric conversion device comprises a first step of forming a gate electrode, a second step of forming a semiconductor region of a first conductivity type, a third step of forming an insulation film, and a fourth step of forming a protection region of a second conductivity type, which is the opposite conductivity type to the first conductivity type, by implanting ions in the semiconductor region using the gate electrode of the transfer transistor and a portion covering a side face of the gate electrode of the transfer transistor of the insulation film as a mask in a state in which the semiconductor substrate and the gate electrode of the transfer transistor are covered by the insulation film, and causing a portion of the semiconductor region of the first conductivity type from which the protection region is removed to be the charge accumulation region.Type: ApplicationFiled: March 27, 2012Publication date: July 19, 2012Applicant: CANON KABUSHIKI KAISHAInventors: Ryuichi Mishima, Mineo Shimotsusa, Hiroaki Naruse
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Patent number: 8222709Abstract: A solid-state imaging device includes a pixel array area in which an unit pixel including a photoelectric conversion element converting optical signals to signal charges and a transfer gate transferring the signal charges which have been photoelectrically converted in the photoelectric conversion element is two-dimensionally arranged in a matrix form, a supply voltage control means for supplying plural first control voltages sequentially to a control electrode of the transfer gate, and a driving means for performing driving of reading out signal charges transferred by the transfer gate when the plural first control voltages are sequentially applied twice and more.Type: GrantFiled: October 23, 2006Date of Patent: July 17, 2012Assignee: Sony CorporationInventors: Yusuke Oike, Atsushi Toda
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Publication number: 20120175685Abstract: An image sensor based on a depth pixel structure is provided. The image sensor may include a pixel including a photodiode, and the photodiode may include a transfer gate to transfer, to a floating diffusion node, an electron generated by a light reflected from an object.Type: ApplicationFiled: January 5, 2012Publication date: July 12, 2012Applicant: Samsung Electronics Co., Ltd.Inventors: Seong Jin KIM, Sang Wook Han, Albert Theuwissen
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Publication number: 20120175686Abstract: A solid-state imaging device including: a substrate; a light-receiving part; a second-conductivity-type isolation layer; a detection transistor; and a reset transistor.Type: ApplicationFiled: March 21, 2012Publication date: July 12, 2012Applicant: SONY CORPORATIONInventor: Isao Hirota
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Publication number: 20120175636Abstract: According to example embodiments, a photodiode system may include a substrate, and at least one photodiode in the substrate, and a wideband gap material layer on a first surface of the substrate. The at least one photodiode may be between an insulating material in a horizontal plane. According to example embodiments, a back-side-illumination (BSI) CMOS image sensor and/or a solar cell may include a photodiode device. The photodiode device may include a substrate, at least one photodiode in the substrate, a wide bandgap material layer on a first surface of the substrate, and an anti-reflective layer (ARL) on the wide bandgap material layer.Type: ApplicationFiled: November 21, 2011Publication date: July 12, 2012Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: Hisanori Ihara
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Patent number: 8217427Abstract: A memory circuit includes a plurality of bit line structures, a plurality of word line structures intersecting the plurality of bit line structures to form a plurality of cell locations; and a plurality of cells located at the plurality of cell locations. Each of the cells is selectively coupled to a corresponding one of the bit line structures under control of a corresponding one of the word line structures, and each of the cells in turn includes a logical storage element having at least a first n-type field effect transistor and at least a first p-type field effect transistor. The at least first n-type field effect transistor is formed with a relatively thick buried oxide layer sized to reduce capacitance of the bit line structures, and the at least first p-type field effect transistor is formed with a relatively thin buried oxide layer.Type: GrantFiled: October 2, 2007Date of Patent: July 10, 2012Assignee: International Business Machines CorporationInventors: Ching-Te K. Chuang, Fadi H. Gebara, Keunwoo Kim, Jente Benedict Kuang, Hung C. Ngo
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Publication number: 20120168825Abstract: A charged coupled device (CCD) module fixed between a lens assembly and a main board having a first plate surface is disclosed. The CCD module comprises a hard PCB having a first surface and a second surface, a CCD component, and at least one fixed member. The first surface of the hard PCB faces the first plate surface of the main board. The CCD component facing the lens assembly is located on the second surface of the hard PCB. The fixed member is used for combining the hard PCB and the main board. The hard PCB and the fixed member can be used as a buffer to reduce possible damages to the CCD component and/or the main board.Type: ApplicationFiled: June 1, 2011Publication date: July 5, 2012Applicant: ALTEK CORPORATIONInventor: Tzu-Chih Lin
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Publication number: 20120154650Abstract: A solid-state image sensor includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type that is arranged to contact a lower face of the first semiconductor region and functions as a charge accumulation region, a third semiconductor region including side faces surrounded by the second semiconductor region, a fourth semiconductor region of the second conductivity type that is arranged apart from the second semiconductor region, and a transfer gate that forms a channel to transfer charges accumulated in the second semiconductor region to the fourth semiconductor region. The third semiconductor region is one of a semiconductor region of the first conductivity type and a semiconductor region of the second conductivity type whose impurity concentration is lower than that in the second semiconductor region.Type: ApplicationFiled: November 30, 2011Publication date: June 21, 2012Applicant: CANON KABUSHIKI KAISHAInventor: Mahito Shinohara
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Publication number: 20120146100Abstract: A MOS-type solid-state image pickup device is provided on a semiconductor substrate and includes a photoelectric conversion unit having a first semiconductor region, a second semiconductor region, and a third semiconductor region. A transfer gate electrode is disposed on an insulation film and transfers a carrier from the second semiconductor region to a fourth semiconductor region, and an amplifying MOS transistor has a gate electrode connected to the fourth semiconductor region. In addition, a fifth semiconductor region is continuously disposed to the second semiconductor region, under the gate electrode. An entire surface of the third semiconductor region is covered with the insulation film, and a side portion of the third semiconductor region that is laterally opposite to the transfer gate is in contact with the first semiconductor region.Type: ApplicationFiled: February 2, 2012Publication date: June 14, 2012Applicant: CANON KABUSHIKI KAISHAInventors: Toru Koizumi, Shigetoshi Sugawa, Isamu Ueno, Tesunobu Kochi, Katsuhito Sakurai, Hiroki Hiyama
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Publication number: 20120132965Abstract: A plurality of transistors in which ratios of a channel length L to a channel width W, ?=W/L, are different from each other is provided in parallel as output side transistors 105a to 105c in a current mirror circuit 101 which amplifies a photocurrent of a photoelectric conversion device and an internal resistor is connected to each of the output side transistors 105a to 105c in series. The sum of currents which flow through the plurality of transistors and the internal resistor is output, whereby a transistor with large amount of ? can be driven in a linear range with low illuminance, and a transistor with small amount of ? can be driven in a linear range with high illuminance, so that applicable illuminance range of the photoelectric conversion device can be widened.Type: ApplicationFiled: February 3, 2012Publication date: May 31, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hideaki Shishido, Atsushi Hirose
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Publication number: 20120104465Abstract: An image sensor including: a substrate that includes a first surface onto which light is irradiated, a second surface opposite to the first surface, and a light receiving device disposed adjacent to the second surface; a transistor that includes a source region, a drain region, and a gate electrode disposed between the source region and the drain region, wherein the transistor is disposed on the second surface of the substrate; a wiring line that is disposed on the second surface of the substrate; and a plurality of contact plugs that are disposed on the source region, the drain region, or the gate electrode, wherein at least one of the plurality of contact plugs is connected to the wiring line.Type: ApplicationFiled: September 23, 2011Publication date: May 3, 2012Inventors: Jin-ho Kim, Chang-rok Moon