Schottky Barrier Patents (Class 257/471)
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Patent number: 7276771Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.Type: GrantFiled: June 23, 2006Date of Patent: October 2, 2007Assignee: Fuji Electric Co., Ltd.Inventors: Tatsuhiko Fujihira, Yasushi Miyasaka
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Patent number: 7274082Abstract: Electron-hole production at a Schottky barrier has recently been observed experimentally as a result of chemical processes. This conversion of chemical energy to electronic energy may serve as a basic link between chemistry and electronics and offers the potential for generation of unique electronic signatures for chemical reactions and the creation of a new class of solid state chemical sensors. Detention of the following chemical species was established: hydrogen, deuterium, carbon monoxide, and molecular oxygen. The detector (1b) consists of a Schottky diode between an Si layer and an ultrathin metal layer with zero force electrical contacts.Type: GrantFiled: April 29, 2005Date of Patent: September 25, 2007Assignee: Adrena, Inc.Inventors: Eric W. McFarland, W. Henry Weinberg, Hermann Nienhaus, Howard S. Bergh, Brian Gergen, Arunava Mujumdar
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Patent number: 7274083Abstract: A wide bandgap semiconductor device with surge current protection and a method of making the device are described. The device comprises a low doped n-type region formed by plasma etching through the first epitaxial layer grown on a heavily doped n-type substrate and a plurality of heavily doped p-type regions formed by plasma etching through the second epitaxial layer grown on the first epitaxial layer. Ohmic contacts are formed on p-type regions and on the backside of the n-type substrate. Schottky contacts are formed on the top surface of the n-type region. At normal operating conditions, the current in the device flows through the Schottky contacts. The device, however, is capable of withstanding extremely high current densities due to conductivity modulation caused by minority carrier injection from p-type regions.Type: GrantFiled: May 2, 2006Date of Patent: September 25, 2007Assignee: Semisouth Laboratories, Inc.Inventors: Igor Sankin, Joseph Neil Merrett
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Publication number: 20070210401Abstract: A trench type junction barrier rectifier has silicon dioxide spacers at the bottom of trenches in a silicon surface and beneath the bottom of a conductive polysilicon filler in the trench. A Schottky barrier electrode is connected to the tops of the mesas and the tops of the polysilicon fillers. Further oxide spacers may be formed in the length of the polysilicon fillers.Type: ApplicationFiled: March 2, 2007Publication date: September 13, 2007Inventors: Carmelo Sanfilippo, Rossano Carta
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Patent number: 7268407Abstract: Provided are a Schottky barrier tunnel single electron transistor and a method of manufacturing the same that use a Schottky barrier formed between metal and semiconductor by replacing a source and a drain with silicide as a reactant of silicon and metal, instead of a conventional method of manufacturing a single electron transistor (SET) that includes source and drain regions by implanting dopants such that an artificial quantum dot is formed in a channel region. As a result, it does not require a conventional PADOX process to form a quantum dot for a single electron transistor (SET), height and width of a tunneling barrier can be artificially adjusted by using silicide materials that have various Schottky junction barriers, and it is possible to improve current driving capability of the single electron transistor (SET).Type: GrantFiled: August 3, 2005Date of Patent: September 11, 2007Assignee: Electronics and Telecommunications Research InstituteInventors: Moon Gyu Jang, Yark Yeon Kim, Jae Heon Shin, Seong Jae Lee
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Patent number: 7265424Abstract: A fin field effect transistor having a substrate, a fin structure above the substrate, as well as a drain region and a source region outside the fin structure above the substrate. The fin structure serves as a channel between the source region and the drain region. The source and drain regions are formed once the gate has been produced.Type: GrantFiled: January 30, 2004Date of Patent: September 4, 2007Assignee: Infineon Technologies AGInventors: Franz Hofmann, Johannes Kretz, Wolfgang Roesner, Thomas Schulz
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Patent number: 7250666Abstract: Disclosed is a silicon-on-insulator-based Schottky barrier diode with a low forward voltage that can be manufactured according to standard SOI process flow. An active silicon island is formed using an SOI wafer. One area of the island is heavily-doped with an n-type or p-type dopant, one area is lightly-doped with the same dopant, and an isolation structure is formed on the top surface above a junction between the two areas. A metal silicide region contacts the lightly-doped side of the island forming a Schottky barrier. Another discrete metal silicide region contacts the heavily-doped area of the island forming an electrode to the Schottky barrier (i.e., a Schottky barrier contact). The two metal silicide regions are isolated from each other by the isolation structure. Contacts to each of the discrete metal silicide regions allow a forward and/or a reverse bias to be applied to the Schottky barrier.Type: GrantFiled: November 15, 2005Date of Patent: July 31, 2007Assignee: International Business Machines CorporationInventor: Edward J. Nowak
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Patent number: 7220661Abstract: A Schottky barrier rectifier, in accordance with embodiments of the present invention, includes a first conductive layer and a semiconductor. The semiconductor includes a first doped region, a second doped region and a plurality of third doped regions. The second doped region is disposed between the first doped region and the first conductive layer. The plurality of third doped regions are disposed in the second doped region. The first doped region of the semiconductor is heavily doped with a first type of dopant (e.g., phosphorous or arsenic). The second doped region is moderately doped with the first type of dopant. The plurality of third doped regions are moderately to heavily doped with a second type of dopant.Type: GrantFiled: December 22, 2004Date of Patent: May 22, 2007Assignee: Qspeed Semiconductor Inc.Inventors: Ho-Yuan Yu, Chong-Ming Lin
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Patent number: 7208767Abstract: A method and a device for converting energy uses chemical reactions in close proximity to or on a surface to convert a substantial fraction of the available chemical energy of the shorter lived energized products, such as vibrationally excited chemicals and hot electrons, directly into a useful form, such as longer lived charge carriers in a semiconductor. The carriers store the excitation energy in a form that may be converted into other useful forms, such as electricity, nearly monochromatic electromagnetic radiation or carriers for stimulating other surface reactions.Type: GrantFiled: January 17, 2002Date of Patent: April 24, 2007Assignee: NeoKismet LLCInventors: Anthony C. Zuppero, Jawahar M. Gidwani
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Patent number: 7199442Abstract: A SiC Schottky barrier diode (SBD) is provided having a substrate and two or more epitaxial layers, including at least a thin, lightly doped N-type top epitaxial layer, and an N-type epitaxial layer on which the topmost epitaxial layer is disposed. Multiple epitaxial layers support the blocking voltage of the diode, and each of the multiple epitaxial layers supports a substantial portion of the blocking voltage. Optimization of the thickness and dopant concentrations of at least the top two epitaxial layers results in reduced capacitance and switching losses, while keeping effects on forward voltage and on-resistance low. Alternatively, the SBD includes a continuously graded N-type doped region whose doping varies from a lighter dopant concentration at the top of the region to a heavier dopant concentration at the bottom.Type: GrantFiled: July 15, 2004Date of Patent: April 3, 2007Assignee: Fairchild Semiconductor CorporationInventor: Praveen M. Shenoy
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Patent number: 7193250Abstract: A light-emitting element including a light-emitting thyristor and a schottky barrier diode is provided. A schottky barrier diode is formed by contacting a metal terminal to a gate layer of a three-terminal light-emitting thyristor consisting of a PNPN-structure. A self-scanning light-emitting element array may be driven at 3.0 V by using such a schottky barrier diode as a coupling diode of a diode-coupled self-scanning light-emitting element array.Type: GrantFiled: February 21, 2003Date of Patent: March 20, 2007Assignee: Nippon Sheet Glass Company, LimitedInventor: Seiji Ohno
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Patent number: 7187054Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.Type: GrantFiled: March 4, 2005Date of Patent: March 6, 2007Assignee: Fuji Electric Holdings Co., Ltd.Inventors: Tatsuhiko Fujihira, Yasushi Miyasaka
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Patent number: 7187055Abstract: An electronic device or signal processing device consists of a rectifier and capacitor which share common elements facilitating the construction and application of the device to various types of substrates and, particularly, flexible substrates. Components of the device may be fabricated from organic conductors and semiconductors.Type: GrantFiled: July 28, 2005Date of Patent: March 6, 2007Assignee: Precision Dynamics CorporationInventor: Michael L. Beigel
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Patent number: 7176537Abstract: A semiconductor device having a metal/metal silicide gate and a Schottky source/drain and a method of forming the same are provided. The semiconductor device includes a gate dielectric overlying a semiconductor substrate, a metal or metal silicide gate electrode having a work function of less than about 4.3 eV or greater than about 4.9 eV overlying the gate dielectric, a spacer having a thickness of less than about 100 ? on a side of the gate electrode, and a Schottky source/drain having a work function of less than about 4.3 eV or greater than about 4.9 eV wherein the Schottky source/drain region overlaps the gate electrode. The Schottky source/drain region preferably has a thickness of less than about 300 ?.Type: GrantFiled: May 23, 2005Date of Patent: February 13, 2007Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wen-Chin Lee, Chung-Hu Ke, Min-Hwa Chi
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Nitride semiconductor light emitting device having electrostatic discharge (ESD) protection capacity
Patent number: 7173288Abstract: A nitride semiconductor light emitting device including a light emitting diode and a diode formed on a single substrate, in which the light emitting diode and the diode use a common electrode. According to the present invention, an active layer and a p-type nitride semiconductor layer are each divided into a first region and a second region by an insulative isolation layer, and an ohmic contact layer is formed on the p-type nitride semiconductor layer contained in the first region. A p-type electrode is formed on the ohmic contact layer and is extended to the p-type nitride semiconductor layer contained in the second region. An n-type electrode is formed on the p-type nitride semiconductor layer contained in the second region, passes through the p-type nitride semiconductor layer and the active layer contained in the second region, and is connected to the first n-type nitride semiconductor layer.Type: GrantFiled: February 10, 2005Date of Patent: February 6, 2007Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Kyu Han Lee, Hyun Kyung Kim, Je Won Kim, Dong Joon Kim -
Patent number: 7148535Abstract: The present invention is an apparatus and system for reducing bondpad capacitance of an integrated circuit. Circuitry of the present invention may produce a negative capacitance approximately equal in magnitude to the capacitance associated with the bondpad and thereby effectively eliminate the bondpad capacitance. Values of the components of the circuitry may be selectively and independently chosen to synthesize a variable range of negative capacitance and thus produce a negative capacitance approximately equal in magnitude to a unique capacitance associated with the bondpad of a variety of integrated circuits.Type: GrantFiled: August 25, 2003Date of Patent: December 12, 2006Assignee: LSI Logic CorporationInventor: Prashant K. Singh
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Patent number: 7141860Abstract: An LDMOS transistor has a Schottky diode inserted at the center of a doped region of the LDMOS transistor. A Typical LDMOS transistor has a drift region in the center. In this case a Schottky diode is inserted at the center of this drift region which has the effect of providing a Schottky diode connected from source to drain in the forward direction so that the drain voltage is clamped to a voltage that is lower than the PN junction threshold, thereby avoiding forward biasing the PN junction. An alternative is to insert the Schottky diode at the well in which the source is formed, which is on the periphery of the LDMOS transistor. In such case the Schottky diode is formed differently but still is connected from source to drain in the forward direction to achieve the desired voltage clamping at the drain.Type: GrantFiled: June 23, 2004Date of Patent: November 28, 2006Assignee: Freescale Semiconductor, Inc.Inventors: Vishnu K. Khemka, Vijay Parthasarathy, Ronghua Zhu, Amitava Bose
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Patent number: 7109408Abstract: A solid-state energy converter with a semiconductor or semiconductor-metal implementation is provided for conversion of thermal energy to electric energy, or electric energy to refrigeration. In n-type heat-to-electricity embodiments, a highly doped n* emitter region made of a metal or semiconductor injects carriers into an n-type gap region. A p-type layer is positioned between the emitter region and gap region, allowing for discontinuity of corresponding Fermi-levels and forming a potential barrier to sort electrons by energy. Additional p-type layers can optionally be formed on the collector side of the converter. One type of these layers with higher carrier concentration (p*) serves as a blocking layer at the cold side of the converter, and another layer (p**) with carrier concentration close to the gap reduces a thermoelectric back flow component. Ohmic contacts on both sides of the device close the electrical circuit through an external load to convert heat to electricity.Type: GrantFiled: March 15, 2004Date of Patent: September 19, 2006Assignee: Eneco, Inc.Inventors: Yan R. Kucherov, Peter L. Hagelstein
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Patent number: 7102179Abstract: A power semiconductor device includes a first semiconductor layer, a second semiconductor layer of a first conductivity type, first and second main electrodes, a control electrode and a third semiconductor layer. The second semiconductor layer is formed on the first semiconductor layer. The first and second main electrodes are formed on the second semiconductor layer separately from each other. The control electrode is formed on the second semiconductor layer between the first and second main electrodes. The third semiconductor layer is formed on the second semiconductor layer between the control electrode and the second main electrode.Type: GrantFiled: November 12, 2004Date of Patent: September 5, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Wataru Saito, Ichiro Omura, Hiromichi Ohashi
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Patent number: 7084475Abstract: A lateral conduction Schottky diode includes multiple mesa regions upon which Schottky contacts are formed and which are at least separated by ohmic contacts to reduce the current path length and reduce current crowding in the Schottky contact, thereby reducing the forward resistance of a device. The multiple mesas may be isolated from one another and have sizes and shapes optimized for reducing the forward resistance. Alternatively, some of the mesas may be finger-shaped and intersect with a central mesa or a bridge mesa, and some or all of the ohmic contacts are interdigitated with the finger-shaped mesas. The dimensions of the finger-shaped mesas and the perimeter of the intersecting structure may be optimized to reduce the forward resistance. The Schottky diodes may be mounted to a submount in a flip chip arrangement that further reduces the forward voltage as well as improves power dissertation and reduces heat generation.Type: GrantFiled: February 17, 2004Date of Patent: August 1, 2006Assignee: Velox Semiconductor CorporationInventors: Bryan S. Shelton, Linlin Liu, Alex D. Ceruzzi, Michael Murphy, Milan Pophristic, Boris Peres, Richard A. Stall, Xiang Gao, Ivan Eliashevich
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Patent number: 7078780Abstract: A power Schottky rectifier device having a plurality of first trenches filled in with an un-doped polycrystalline silicon layer and each first trenches also has a p-region beneath the bottom of said first trenches to block out reverse current while a reverse biased is applied and to reduce minority carrier while forward biased is applied. Thus, the power Schottky rectifier device can provide first fast switch speed. The power Schottky rectifier device is formed with termination region at an outer portion of the substrate. The manufacture method is also provided.Type: GrantFiled: April 19, 2004Date of Patent: July 18, 2006Assignees: Chip Integration Tech., Co., Ltd.Inventor: Shye-Lin Wu
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Patent number: 7071525Abstract: A Merged P-i-N Schottky device in which the oppositely doped diffusions extend to a depth and have been spaced apart such that the device is capable of absorbing a reverse avalanche energy comparable to a Fast Recovery Epitaxial Diode having a comparatively deeper oppositely doped diffusion region.Type: GrantFiled: January 27, 2004Date of Patent: July 4, 2006Assignee: International Rectifier CorporationInventors: Davide Chiola, Kohji Andoh, Silvestro Fimiani
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Patent number: 7064407Abstract: A JFET controlled Schottky barrier diode includes a p-type diffusion region integrated into the cathode of the Schottky diode to form an integrated JFET where the integrated JFET provides on-off control of the Schottky barrier diode. The p-type diffusion region encloses a portion of the forward current path of the Schottky barrier diode where the p-type diffusion region forms the gate of the JFET and the enclosed portion of the forward current path forms the channel region of the JFET. By applying a reverse biased potential to the gate of the JEFT with respect to the anode of the Schottky diode, the forward current of the Schottky diode can be pinched off, thereby providing on-off control over the Schottky diode forward current.Type: GrantFiled: February 4, 2005Date of Patent: June 20, 2006Assignee: Micrel, Inc.Inventor: Shekar Mallikarjunaswamy
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Patent number: 7064408Abstract: A power Schottky rectifier device having pluralities of trenches are disclosed. The Schottky barrier rectifier device includes field oxide region having p-doped region formed thereunder to avoid premature of breakdown voltage and having a plurality of trenches formed in between field oxide regions to increase the anode area thereto increase forward current capacity or to shrinkage the planar area for driving the same current capacity. Furthermore, the trenches have rounded corners to alleviate current leakage and LOCOS region in the active region to relief stress during the bonding process. The processes for power Schottky barrier rectifier device including termination region formation need only three masks and thus can gain the benefits of cost down.Type: GrantFiled: December 10, 2003Date of Patent: June 20, 2006Assignees: Chip Integration Tech Co., Ltd.Inventor: Shye-Lin Wu
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Patent number: 7037808Abstract: The invention includes a semiconductor construction. The construction has a semiconductor material die with a front surface, a back surface in opposing relation to the front surface, and a thickness of less than 400 microns between the front and back surfaces. The construction also has circuitry associated with the die and over the front surface of the die, and a layer touching the back surface of the die. The layer can correspond to getter-inducing material and/or to a stress-inducing material. The layer can have a composition which includes silicon dioxide and/or silicon nitride. The composition can include one or more hydrogen isotopes, and the hydrogen isotopes can have a higher abundance of deuterium than the natural abundance of deuterium.Type: GrantFiled: August 3, 2005Date of Patent: May 2, 2006Assignee: Micron Technology, Inc.Inventors: Tongbi Jiang, Zhiping Yin
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Patent number: 7034376Abstract: A Schottky barrier diode in which a p+-type semiconductor layer is provided in an n?-type epitaxial layer can realize lowering the forward voltage VF without considering leak current IR. However, when compared with a normal Schottky barrier diode, the forward voltage VF is generally high. When a Schottky metal layer is suitably selected, although the forward voltage VF can be reduced, there is a limit in further reduction. On the other hand, when the resistivity of the n?-type semiconductor layer is reduced, although the forward voltage VF can be realized, there is a problem that breakdown voltage is deteriorated. In a semiconductor device of the invention, a second n?-type semiconductor layer having a low resistivity is laminated on a first n?-type semiconductor layer capable of securing a specified breakdown voltage. P+-type semiconductor regions are made to have depths equal to or slightly deeper than the second n?-type semiconductor layer.Type: GrantFiled: September 30, 2004Date of Patent: April 25, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Tetsuya Okada, Hiroaki Saito
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Patent number: 7023030Abstract: A metal insulator semiconductor field effect transistor (MISFET) is disclosed comprising a source layer being made with a material having a source band-gap (EG2) and a source mid-gap value (EGM2), the source layer having a source Fermi-Level (EF2). A drain layer has a drain Fermi-Level (EF4). A channel layer is provided between the source layer and the drain layer, the channel layer being made with a material having a channel band-gap (EG3) and a channel mid-gap value (EGM3), the channel layer having a channel Fermi-Level (EF3). A source contact layer is connected to the source layer opposite the channel layer, the source contact layer having a source contact Fermi-Level (EF1). A gate electrode has a gate electrode Fermi-Level (EF6). The source band-gap is substantially narrower (EG2) than the channel band-gap (EG3).Type: GrantFiled: December 1, 2003Date of Patent: April 4, 2006Assignee: Quantum Semiconductor, LLCInventor: Carlos Augusto
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Patent number: 6998694Abstract: A power Schottky rectifier device and its fabrication method are disclosed. The method comprises the following steps: First, a semiconductor substrate having a relatively heavily doped n+ doped layer and a lightly doped is provided. A buried p region is then formed in the epi layer by ion implantation. Afterward, a first oxide layer and a nitride layer are then successively formed on the epi layer. The result structure is then patterned to form trenches. Subsequently, a thermal oxidation step is performed to recover etch damage. A wet etch is then performed to remove the thin oxide layer in the trench to expose the silicon in the sidewall. After that, a silicidation process is then performed to form silicide layer on the n-epi-layer in the trenches. After a removal of un-reacted metal layer, a top metal layer is then formed on the silicide layer and on the first oxide layer or nitride layer. The top metal layer on the termination region portion is then patterned to define anode.Type: GrantFiled: August 5, 2003Date of Patent: February 14, 2006Assignees: Chip Integration Tech. Co., Ltd.Inventor: Shye-Lin Wu
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Patent number: 6998678Abstract: The present invention relates to a semiconductor arrangement with a MOS transistor which has a gate electrode (40), arranged in a trench running in the vertical direction of a semiconductor body (100), and a Schottky diode which is connected in parallel with a drain-source path (D-S) and is formed by a Schottky contact between a source electrode and the semiconductor body.Type: GrantFiled: May 16, 2002Date of Patent: February 14, 2006Assignee: Infineon Technologies AGInventors: Wolfgang Werner, Franz Hirler, Joachim Krumrey, Walter Rieger
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Patent number: 6998693Abstract: Electron-hole production at a Schottky barrier has recently been observed experimentally as a result of chemical processes. This conversion of chemical energy to electronic energy may serve as a basic link between chemistry and electronics and offers the potential for generation of unique electronic signatures for chemical reactions and the creation of a new class of solide state chemical sensors. Detection of the following chemical species was established: hydrogen, deuterium, carbon monoxide, molecular oxygen. The detector (1b) consists of a Schottky diode between an Si layer and an ultrathin metal layer with zero force electrical contacts.Type: GrantFiled: September 2, 2003Date of Patent: February 14, 2006Assignee: Adrena, Inc.Inventors: Eric W. McFarland, Henry W. Weinberg, Hermann Nienhaus, Howard S. Bergh, Brian Gergen, Arunava Mujumdar
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Patent number: 6987292Abstract: Various methods for forming semiconductor devices are provided that include the step of implanting dopants into the devices to achieve doping concentrations that allow complementary n- and p-channel SJT behavior with devices of substantially equal gate length and gate width. Moreover, complementary SJT devices are provided that include n- and p-channel devices that have approximately equal gate lengths and widths. SJT devices may be appropriately doped and configured such that input current and the output current both vary substantially exponentially with a gate-source voltage in the sub-threshold mode, and such that the drain current varies substantially linearly with the gate current through a substantially constant current gain that is given by a ratio of the drain current to the gate current.Type: GrantFiled: July 20, 2004Date of Patent: January 17, 2006Assignee: Arizona State UniversityInventor: Trevor J. Thornton
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Patent number: 6979863Abstract: Silicon carbide semiconductor devices and methods of fabricating silicon carbide semiconductor devices have a silicon carbide DMOSFET and an integral silicon carbide Schottky diode configured to at least partially bypass a built in diode of the DMOSFET. The Schottky diode may be a junction barrier Schottky diode and may have a turn-on voltage lower than a turn-on voltage of a built-in body diode of the DMOSFET. The Schottky diode may have an active area less than an active area of the DMOSFET.Type: GrantFiled: April 24, 2003Date of Patent: December 27, 2005Assignee: Cree, Inc.Inventor: Sei-Hyung Ryu
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Patent number: 6979874Abstract: A plurality of p anode regions are formed at one surface of an n? substrate. A trench is formed in each p anode region. An ohmic junction region is formed between an anode metallic electrode and the p anode region. The p anode region has a minimum impurity concentration at a portion near the ohmic junction region which enables ohmic contact. A cathode metallic electrode is formed at the other surface of the n? substrate with an n+ cathode region interposed. Accordingly, a semiconductor device which has an improved withstand voltage and in which the reverse recovery current is reduced can be obtained.Type: GrantFiled: October 30, 2002Date of Patent: December 27, 2005Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Masana Harada
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Patent number: 6979861Abstract: A power device having vertical current flow through a semiconductor body of one conductivity type from a top electrode to a bottom electrode includes at least one gate electrode overlying a gate insulator on a first surface of the body, a channel region of second conductivity type in the surface of the body underlying all of the gate electrode, a first doped region of the second conductivity type contiguous with the channel region and positioned deeper in the body than the channel region and under a peripheral region of the gate electrode, and a second doped source/drain region in the surface of the body abutting the channel region and adjacent to the gate electrode. When the gate is forward biased, an inversion region extends through the channel region and electrically connects the first electrode and the second electrode with a small Vf near to the area between adjacent P bodies being flooded with electrons and denuded of holes. Therefore, at any forward bias this area conducts as an N-type region.Type: GrantFiled: May 30, 2002Date of Patent: December 27, 2005Assignee: APD Semiconductor, Inc.Inventors: Vladimir Rodov, Paul Chang, Gary M. Hurtz, Geeng-Chuan Chern, Jianren Bao
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Patent number: 6979865Abstract: A cellular MOSFET device has a cellular area (CA) comprising active MOSFET cells, and one or more Schottky diode areas (SA) accommodated within a deep end region (15) at a lateral boundary of this cellular area (CA). This deep end region (150) is laterally divided so as to accommodate the diode area (SA) therein. A diode portion (14d) of the first conductivity type of the drain region (14) extends upwardly through the laterally-divided deep end region (150) that is of the second conductivity type. The Schotty barrier (100) formed with this diode portion (14d) terminates laterally in the laterally-divided portions (150deep end region (150) which serve as a guard region and field-relief region for the Schottky diode.Type: GrantFiled: January 23, 2003Date of Patent: December 27, 2005Assignee: Koninklijke Philips Electronics N.V.Inventors: Steven Thomas Peake, Christopher Martin Rogers
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Patent number: 6977208Abstract: A trench schottky diode which includes a thin insulation layer on the sidewalls of its trenches and a relatively thicker insulation layer at the bottoms of its trenches.Type: GrantFiled: January 27, 2004Date of Patent: December 20, 2005Assignee: International Rectifier CorporationInventor: Davide Chiola
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Patent number: 6975013Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least 1/100 of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.Type: GrantFiled: October 2, 2002Date of Patent: December 13, 2005Assignee: Fuji Electric Co., Ltd.Inventors: Tatsuhiko Fujihira, Yasushi Miyasaka
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Patent number: 6963121Abstract: A three-terminal semiconductor transistor device comprises a base region formed by a semiconductor material of a first conductivity type at a first concentration, the base region being in contact with a first electrical terminal via a semiconductor material of the second conductivity type at a second concentration, wherein the second concentration is lower than the first concentration. The three-terminal semiconductor transistor device also includes a conductive emitter region in contact with the semiconductor base region, forming a first Schottky barrier junction at the interface of the conductive emitter region and the semiconductor base region. The conductive emitter region is in contact with a second electrical terminal. The three-terminal semiconductor transistor device further includes a conductive collector region in contact with the semiconductor base region, which forms a second Schottky barrier junction at the interface of the conductive collector region and the semiconductor base region.Type: GrantFiled: February 18, 2004Date of Patent: November 8, 2005Inventor: Koucheng Wu
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Patent number: 6956274Abstract: A metallization stack is provided for use as a contact structure in an integrated MEMS device. The metallization stack comprises a titanium-tungsten adhesion and barrier layer formed with a platinum layer formed on top. The platinum feature is formed by sputter etching the platinum in argon, followed by a wet etch in aqua regia using an oxide hardmask. Alternatively, the titanium-tungsten and platinum layers are deposited sequentially and patterned by a single plasma etch process with a photoresist mask.Type: GrantFiled: January 11, 2002Date of Patent: October 18, 2005Assignee: Analog Devices, Inc.Inventors: Susan A. Alie, Bruce K. Wachtmann, David S. Kneedler, Scott Limb, Kieran Nunan
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Patent number: 6949401Abstract: A method for producing a semiconductor component with adjacent Schottky (5) and pn (9) junctions positions in a drift area (2, 10) of a semiconductor material. According to the method, a silicon carbide substrate doped with a first doping material of at least 1018 cm?3 is provided, and a silicon carbide layer with a second doping material of the same charge carrier type in the range of 1014 and 1017 cm?3 is homo-epitaxially deposited on the substrate. A third doping material with a complimentary charge carrier is inserted, and structured with the aid of a diffusion and/or ion implantation, on the silicon carbide layer surface that is arranged far from the substrate to form pn junctions. Subsequently the component is subjected to a first temperature treatment between 1400° C. and 1700° C. Following this temperature treatment, a first metal coating is deposited on the implanted surface in order to form a Schottky contact and then a second metal coating is deposited in order to form an ohmic contact.Type: GrantFiled: September 9, 2002Date of Patent: September 27, 2005Assignee: Daimler Chrysler AGInventors: Nando Kaminski, Raban Held
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Patent number: 6946717Abstract: A compound semiconductor device is comprising a compound semiconductor substrate (219) having a ground plane (205); an active element (201) disposed on the substrate; a passive element (211) disposed on the substrate and electrically coupled to the active element; and an insulating layer (202) adjacent the substrate and interposed between the passive device and ground surface such that there is no resistive ground path from the passive device to the ground surface.Type: GrantFiled: January 30, 2002Date of Patent: September 20, 2005Assignee: M/A-Com, Inc.Inventors: David Russell Hoag, Timothy Edward Boles, Daniel G. Curcio
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Patent number: 6936905Abstract: A power Schottky rectifier device and method of making the same are disclosed. The Schottky rectifier device including a LOCOS structure and two p-type doping regions, which are positioned one above another therein to isolate cells so as to avoid premature of breakdown voltage. The Schottky rectifier device comprises: an n? drift layer formed on an n+ substrate; a cathode metal layer formed on a surface of the n+ substrate opposite the n? drift layer; a pair of field oxide regions and termination region formed into the n? drift layer and each spaced from each other by the mesas, where the mesas have metal silicide layer formed thereon. A top metal layer formed on the field oxide regions and termination region and contact with the silicide layer.Type: GrantFiled: April 24, 2003Date of Patent: August 30, 2005Assignees: Chip Integration Tech Co., Ltd.Inventor: Shye-Lin Wu
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Patent number: 6921957Abstract: A new low forward voltage drop Schottky barrier diode and its manufacturing method are provided. The method includes steps of providing a substrate, forming plural trenches on the substrate, and forming a metal layer on the substrate having plural trenches thereon to form a barrier metal layer between the substrate and the surface metal layer for forming the Schottky barrier diode.Type: GrantFiled: December 31, 2002Date of Patent: July 26, 2005Assignees: Pyramis Corporation, Delta Electronics, Inc.Inventors: Jun Zeng, Ming-Jiang Zhou, Tzong-Shiann Wu
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Patent number: 6903413Abstract: The invention relates to a vertical-type single-pole component, comprising regions (34) with a first type of conductivity (P) which are embedded in a thick layer (32) with a second type of conductivity (N). Said regions are distributed over at least one same horizontal level and are independent of each other. The regions also underlie an insulating material (70).Type: GrantFiled: December 21, 2000Date of Patent: June 7, 2005Assignee: STMicroelectronics S.A.Inventor: Frédéric Lanois
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Patent number: 6903433Abstract: Electron-hole production at a Schottky barrier has recently been observed experimentally as a result of chemical processes. This conversion of chemical energy to electronic energy may serve as a basic link between chemistry and electronics and offers the potential for generation of unique electronic signatures for chemical reactions and the creation of a new class of solide state chemical sensors. Detection of the following chemical species was established: hydrogen, deuterium, carbon monoxide, molecular oxygen. The detector (1b) consists of a Schottky diode between an Si layer and an ultrathin metal layer with zero force electrical contacts.Type: GrantFiled: January 19, 2000Date of Patent: June 7, 2005Assignee: Adrena, Inc.Inventors: Eric W. McFarland, Henry W. Weinberg, Hermann Nienhaus, Howard S. Bergh, Brian Gergen, Arunava Mujumdar
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Patent number: 6897507Abstract: The present invention extends the above referenced continuation-in-part application by in addition creating high quality electrical components, such as inductors, capacitors or resistors, on a layer of passivation or on the surface of a thick layer of polymer. In addition, the process of the invention provides a method for mounting discrete electrical components at a significant distance removed from the underlying silicon surface.Type: GrantFiled: November 25, 2002Date of Patent: May 24, 2005Assignee: Megic CorporationInventor: Mou-Shiung Lin
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Patent number: 6894360Abstract: A filter having a thin-film resonator fabricated on a semiconductor substrate and a method of making the same are disclosed. The filter has a bonding pad connected to the resonator and in contact with the substrate to form a Schottky diode with the substrate to protect the resonator from electrostatic discharges.Type: GrantFiled: July 30, 2002Date of Patent: May 17, 2005Assignee: Agilent Technologies, Inc.Inventor: Paul D. Bradley
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Patent number: 6888243Abstract: To improve the radiation property without inhibiting miniaturization of the device, heat generated at a heat generating layer (5) is radiated to a substrate (1) via plugs (7, 17), wiring layers (8, 18), and plugs (9, 19). A cross sectional along the principal plane of the substrate (1) of the plugs (7, 9, 17, 19) is set to be a rectangle, and the long sides of the rectangle are parallel to the direction perpendicular to the direction connecting one end and the other end of the heat generating layer (5). Between the plugs (9, 19) and the semiconductor layer (2) is interposed n-type semiconductor layers (3, 13).Type: GrantFiled: September 28, 2001Date of Patent: May 3, 2005Assignee: Renesas Technology Corp.Inventor: Yasuo Yamaguchi
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Patent number: 6861723Abstract: The invention relates to a Schottky diode in which p-doped regions (4, 5) are incorporated in the Schottky contact area. At least one (5) of these regions (4, 5) has a greater minimum extent, in order to initiate a starting current.Type: GrantFiled: December 19, 2003Date of Patent: March 1, 2005Assignee: Infineon Technologies AGInventor: Armin Willmeroth
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Patent number: 6855999Abstract: A method for fabricating a Schottky diode using a shallow trench contact to reduce leakage current in the fabrication of an integrated circuit device is described. An insulating layer is deposited over a thermal oxide layer provided overlying a silicon semiconductor substrate. A contact opening is etched through the insulating layer and the thermal oxide layer to the silicon substrate. The contact opening is overetched whereby a shallow trench is formed within the silicon substrate underlying the contact opening wherein the shallow trench has a bottom and sidewalls comprising the silicon substrate. A first metal layer is deposited over the insulating layer and within the contact opening and within the shallow trench.Type: GrantFiled: September 6, 2002Date of Patent: February 15, 2005Assignee: Taiwan Semiconductor Manufacturing Co.Inventors: Jei-Fung Hwang, Ruey-Hsing Liou, Chih-Kang Chiu