Abstract: The present invention provides a semiconductor device structure and an easy-to-use method for manufacturing thereof enabling to suppress wafer contamination and to form the semiconductor device superior in control and uniformity of the film thickness in the semiconductor device including plural kinds of transistors provided with a gate insulator film with different film thickness. According to the method, plural kinds of transistors with gate insulator films having different electric film thickness are formed in the steps of forming an insulating film layer including a lamination structure of at least first insulating film 104 constituted of first high-dielectric insulating material and second insulating film 103 constituted of second high-dielectric insulating material on the same silicon substrate 101, selectively etching and removing the upper insulating film 103 on the part of region 105 by use of mask 107 and utilizing multi-oxide process while reducing leak electric current.

Abstract: A transistor gate selective re-oxidation process includes the steps of introducing into the vacuum chamber containing the semiconductor substrate a process gas that includes oxygen while maintaining a vacuum pressure in the chamber. An oxide insulating layer on the order of several Angstroms in thickness is formed by generating a plasma in a plasma generation region within the vacuum chamber during successive “on” times, and allowing ion energy of the plasma to decay during successive “off” intervals separating the successive “on” intervals, the “on” and “off” intervals defining a controllable duty cycle. During formation of the oxide insulating layer, the duty cycle is limited so as to limit formation of ion bombardment-induced defects in the insulating layer, while the vacuum pressure is limited so as to limit formation of contamination-induced defects in the insulating layer.

Abstract: Various embodiments of the invention described herein reduce contact resistance to a silicon-containing material using a first refractory metal material overlying the silicon-containing material and a second refractory metal material overlying the first refractory metal material. Each refractory metal material is a conductive material containing a refractory metal and an impurity. The first refractory metal material is a metal-rich material, containing a level of its impurity at less than a stoichiometric level. The second refractory metal material has a lower affinity for the impurities than does the first refractory metal material. The second refractory metal material can thus serve as an impurity donor during an anneal or other exposure to heat.

Abstract: MOS transistor formed on a semiconductor substrate of a first conductivity type and method of fabrication are provided. The device includes (a) an interfacial layer formed on the substrate; (b) a high dielectric constant layer covering the interfacial layer that comprises a material that is selected from the group consisting of Ta2O5, Ta2(O1?xNx)5 wherein x ranges from greater than 0 to 0.6, a solid solution of (Ta2O5)r—(TiO2)1?r wherein r ranges from about 0.9 to less than 1, a solid solution (Ta2O5)s—(Al2O3)1?s wherein s ranges from 0.9 to less than 1, a solid solution of (Ta2O5)t—(ZrO2)1?t wherein t ranges from about 0.9 to less than 1, a solid solution of (Ta2O5)u—(HfO2)1?u wherein u ranges from about 0.9 to less than 1, and mixtures thereof wherein the interfacial layer separates the high dielectric constant layer from the substrate; (b) a gate electrode having a width of less than 0.