Abstract: A method of semiconductor device fabrication includes providing a substrate having a hardmask layer thereover. The hardmask layer is patterned to expose the substrate. The substrate is etched through the patterned hardmask layer to form a first fin element and a second fin element extending from the substrate. An isolation feature between the first and second fin elements is formed, where the isolation feature has a first etch rate in a first solution. A laser anneal process is performed to irradiate the isolation feature with a pulsed laser beam. A pulse duration of the pulsed laser beam is adjusted based on a height of the isolation feature. The isolation feature after performing the laser anneal process has a second etch rate less than the first etch rate in the first solution.

Abstract: In one aspect of the invention, a method to create an advanced through silicon via structure is described. A high aspect ratio through substrate via in a substrate is provided. The through substrate via has vertical sidewalls and a horizontal bottom. A metallic barrier layer is deposited on the sidewalls of the through substrate via. A nitridation process is performed to convert a surface portion of the metallic barrier layer to a nitride surface layer. The nitride surface layer enhances the nucleation of subsequent depositions. A metal is deposited to fill the through substrate via. Another aspect of the invention is a device created by the method.

Abstract: Microelectromechanical systems (MEMS) such as digital micromirror devices (DMD) are manufactured in arrays. Covers, packages, and lids are placed around each device and a liquid such as epoxy resin is dispensed around the packaged device. The epoxy resin acts as a sealant to form a hermetic seal. A nozzle comprises multiple orifices along a sidewall of the nozzle to dispense the epoxy resin horizontally and parallel to the plane of the wafer substrate. The distal ends of the nozzle are enclosed.

Abstract: There are provided a method of manufacturing a semiconductor device, a substrate processing apparatus, and a semiconductor device. The method allows rapid formation of a conductive film, which has a low concentration of impurities permeated from a source owing to its dense structure, and a low resistivity. The method is performed by simultaneously supplying two or more kinds of sources into a processing chamber to form a film on a substrate placed in the processing chamber. The method comprises: performing a first source supply process by supplying at least one kind of source into the processing chamber at a first supply flow rate; and performing a second source supply process by supplying the at least one kind of source into the processing chamber at a second supply flow rate different from the first supply flow rate.

Abstract: Interconnect structures including a selective via post disposed on a top surface of a lower level interconnect feature, and fabrication techniques to selectively form such a post. Following embodiments herein, a minimum interconnect line spacing may be maintained independent of registration error in a via opening. In embodiments, a selective via post has a bottom lateral dimension smaller than that of a via opening within which the post is disposed. Formation of a conductive via post may be preferential to a top surface of the lower interconnect feature exposed by the via opening. A subsequently deposited dielectric material backfills portions of a via opening extending beyond the interconnect feature where no conductive via post was formed. An upper level interconnect feature is landed on the selective via post to electrically interconnect with the lower level feature.

Abstract: A technique for forming nanostructures including a definition of a charge pattern on a substrate and introduction of charged molecular scale sized building blocks (MSSBBs) to a region proximate the charge pattern so that the MSSBBs adhere to the charge pattern to form the feature.

Abstract: Systems and methods are provided for reducing a contact resistivity associated with a semiconductor device structure. A substrate including a semiconductor region is provided. One or more dielectric layers are formed on the semiconductor region, the one or more dielectric layers including an element. A gaseous material is applied on the one or more dielectric layers to change a concentration of the element in the one or more dielectric layers. A contact layer is formed on the one or more dielectric layers to generate a semiconductor device structure. The semiconductor device structure includes the contact layer, the one or more dielectric layers, and the semiconductor region. A contact resistivity associated with the semiconductor device structure is reduced by changing the concentration of the element in the one or more dielectric layers.

Abstract: To form an insulating film with extremely low concentration of impurities such as carbon, hydrogen, nitrogen, chlorine, etc in a film. There are provided the steps of forming a specific element-containing layer on a substrate by supplying source gas containing a specific element into a processing container in which the substrate is accommodated; changing the specific element-containing layer into a nitride layer, by activating and supplying gas containing nitrogen into the processing container; and changing the nitride layer into an oxide layer or an oxynitride layer, by activating and supplying gas containing oxygen into the processing container; with this cycle set as one cycle and performed for at least one or more times.

Abstract: Exemplary embodiments provide materials and methods for forming a metal silicide layer and/or an NMOS transistor. The metal silicide layer can be formed by heating a metal layer containing at least a tellurium element on a semiconductor substrate. The metal silicide layer can thus contain at least the tellurium element on the semiconductor substrate. The metal silicide layer can be formed in an NMOS transistor. With the addition of tellurium element in the metal silicide layer, Schottky barrier height between the metal silicide layer and the underling semiconductor substrate can be reduced. Contact resistance of the NMOS transistor can also be reduced.

Abstract: Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about ?600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers of doped or undoped silicon carbide using multiple densifying plasma post-treatments in a PECVD process chamber. In some embodiments, a hardmask film includes a high-hardness boron-containing film selected from the group consisting of SixByCz, SixByNz, SixByCzNw, BxCy, and BxNy. In some embodiments, a hardmask film includes a germanium-rich GeNx material comprising at least about 60 atomic % of germanium. These hardmasks can be used in a number of back-end and front-end processing schemes in integrated circuit fabrication.

Abstract: A semiconductor device manufacture method has the steps of: (a) coating a low dielectric constant low-level insulating film above a semiconductor substrate formed with a plurality of semiconductor elements; (b) processing the low-level insulating film to increase a mechanical strength of the low-level insulating film; (c) coating a low dielectric constant high-level insulating film above the low-level insulating film; and (d) forming a buried wiring including a wiring pattern in the high-level insulating film and a via conductor in the low-level insulating film. The low-level insulating film and high-level insulating film are made from the same material. The process of increasing the mechanical strength includes an ultraviolet ray irradiation process or a hydrogen plasma applying process.

Abstract: A method of processing a substrate includes performing a first exposure that comprises generating a plasma containing reactive gas ions in a plasma chamber and generating a bias voltage between the substrate and the plasma chamber. The method also includes providing a plasma sheath modifier having an aperture disposed between the plasma and substrate and operable to direct the reactive gas ions toward the substrate, and establishing a pressure differential between the plasma chamber and substrate region while the reactive gas ions are directed onto the substrate.

Abstract: Exemplary embodiments provide materials and methods for forming a metal silicide layer and/or an NMOS transistor. The metal silicide layer can be formed by heating a metal layer containing at least a tellurium element on a semiconductor substrate. The metal silicide layer can thus contain at least the tellurium element on the semiconductor substrate. The metal silicide layer can be formed in an NMOS transistor. With the addition of tellurium element in the metal silicide layer, Schottky barrier height between the metal silicide layer and the underling semiconductor substrate can be reduced. Contact resistance of the NMOS transistor can also be reduced.

Abstract: To form an insulating film with extremely low concentration of impurities such as carbon, hydrogen, nitrogen, chlorine, etc in a film. There are provided the steps of forming a specific element-containing layer on a substrate by supplying source gas containing a specific element into a processing container in which the substrate is accommodated; changing the specific element-containing layer into a nitride layer, by activating and supplying gas containing nitrogen into the processing container; and changing the nitride layer into an oxide layer or an oxynitride layer, by activating and supplying gas containing oxygen into the processing container; with this cycle set as one cycle and performed for at least one or more times.

Abstract: A method of manufacturing a semiconductor device, in which an amorphous silicon layer is formed into a shape of a gate electrode of a MOS transistor, and then impurity is implanted to a surface of a silicon substrate from a diagonal direction using the amorphous silicon layer as a mask.

Abstract: Embodiments of the invention provide a method for depositing tungsten-containing materials. In one embodiment, a method includes forming a tungsten nucleation layer over an underlayer disposed on the substrate while sequentially providing a tungsten precursor and a reducing gas into a process chamber during an atomic layer deposition (ALD) process and depositing a tungsten bulk layer over the tungsten nucleation layer, wherein the reducing gas contains hydrogen gas and a hydride compound (e.g., diborane) and has a hydrogen/hydride flow rate ratio of about 500:1 or greater. In some examples, the method includes flowing the hydrogen gas into the process chamber at a flow rate within a range from about 1 slm to about 20 slm and flowing a mixture of the hydride compound and a carrier gas into the process chamber at a flow rate within a range from about 50 sccm to about 500 sccm.

Abstract: A method of forming a material over a substrate includes performing at least one iteration of the following temporally separated ALD-type sequence. First, an outermost surface of a substrate is contacted with a first precursor to chemisorb a first species onto the outermost surface from the first precursor. Second, the outermost surface is contacted with a second precursor to chemisorb a second species different from the first species onto the outermost surface from the second precursor. The first and second precursors include ligands and different central atoms. At least one of the first and second precursors includes at least two different composition ligands. The two different composition ligands are polyatomic or a lone halogen. Third, the chemisorbed first species and the chemisorbed second species are contacted with a reactant which reacts with the first species and with the second species to form a reaction product new outermost surface of the substrate.

Abstract: The description relates to a bonding pad for a semiconductor device deposited. The first region comprising aluminum deposited at a high temperature having a large grain size. The second region comprising aluminum deposited at a lower temperature having a smaller grain size.

Abstract: The present invention provides a method and apparatus for manufacturing a semiconductor device using a PVD method and enabling achievement of a desired effective work function and reduction in leak current without increasing an equivalent oxide thickness. A method for manufacturing a semiconductor device in an embodiment of the present invention includes the steps of: preparing a substrate on which an insulating film having a relative permittivity higher than that of a silicon oxide film is formed; and depositing a metal nitride film on the insulating film. The metal nitride depositing step is a step of sputtering deposition in an evacuatable chamber using a metal target and a cusp magnetic field formed over a surface of the metal target by a magnet mechanism in which magnet pieces are arranged as grid points in such a grid form that the adjacent magnet pieces have their polarities reversed from each other.

Abstract: Embodiments of the invention provide a method for depositing tungsten-containing materials. In one embodiment, a method includes forming a tungsten nucleation layer over an underlayer disposed on the substrate while sequentially providing a tungsten precursor and a reducing gas into a process chamber during an atomic layer deposition (ALD) process and depositing a tungsten bulk layer over the tungsten nucleation layer, wherein the reducing gas contains hydrogen gas and a hydride compound (e.g., diborane) and has a hydrogen/hydride flow rate ratio of about 500:1 or greater. In some examples, the method includes flowing the hydrogen gas into the process chamber at a flow rate within a range from about 1 slm to about 20 slm and flowing a mixture of the hydride compound and a carrier gas into the process chamber at a flow rate within a range from about 50 sccm to about 500 sccm.

Abstract: Methods and precursors are provided for deposition of elemental manganese films on surfaces using metal coordination complexes comprising an eta-3-bound monoanionic four-electron donor ligands selected from amidinate, mixed ene-amido and allyl, or eta-2 bound amidinate ligand. The ligands are selected from amidinate, ene-amido, and allyl.

Abstract: Top-down methods of increasing reflectivity of tungsten films to form films having high reflectivity, low resistivity and low roughness are provided. The methods involve bulk deposition of tungsten followed by a removing a top portion of the deposited tungsten. In particular embodiments, removing a top portion of the deposited tungsten involve exposing it to a fluorine-containing plasma. The methods produce low resistivity tungsten bulk layers having lower roughness and higher reflectivity. The smooth and highly reflective tungsten layers are easier to photopattern than conventional low resistivity tungsten films. Applications include forming tungsten bit lines.

Abstract: Embodiments of the current invention include methods of forming a strontium titanate (SrTiO3) film using atomic layer deposition (ALD). More particularly, the method includes forming a plurality of titanium oxide (TiO2) unit films using ALD and forming a plurality of strontium oxide (SrO) unit films using ALD. The combined thickness of the TiO2 and SrO unit films is less than approximately 5 angstroms. The TiO2 and SrO units films are then annealed to form a strontium titanate layer.

Abstract: A substrate processing apparatus includes a processing chamber configured to process a substrate having a front surface including a dielectric, a substrate support member provided within the processing chamber to support the substrate, a microwave supplying unit configured to supply a microwave to a front surface side of the substrate supported on the substrate support member; and a conductive substrate cooling unit which is provided at a rear surface side of the substrate supported on the substrate support member and has an opposing surface facing the rear surface of the substrate. A distance between the top of the substrate support member and the opposing surface of the substrate cooling unit corresponds to an odd multiple of ¼ wavelength of the microwave supplied when the substrate is processed.

Abstract: A method includes an act of providing a crystalline substrate with a diamond-type lattice and an exposed substantially (111)-surface. The method also includes an act of forming a graphene layer or a graphene-like layer on the exposed substantially (111)-surface.

Abstract: Semiconductor devices of embodiments include a plurality of solder bumps electrically connected on a plurality of electrode pads disposed on a semiconductor substrate in parallel at a pitch of 40 ?m or less via under bump metals. The ratio of the diameter (the top diameter) of the portion of each solder bump most away from the semiconductor substrate and the diameter (the bottom diameter) of the bottom side of each solder bump is 1:1 to 1:4.

Abstract: A semiconductor device, which suppresses formation of an organic impurity layer and has excellent adhesiveness to a copper film and a metal to be a base, is manufactured. A substrate (wafer W) coated with a barrier metal layer (base film) 13 formed of a metal having a high oxidation tendency, such as titanium, is placed in a processing chamber. At the time of starting to supply water vapor or after that, a material gas containing an organic compound of copper (for instance, Cu(hfac)TMVS) is supplied, and a copper film is formed on the surface of the barrier metal layer 13 whereupon the oxide layer 13a is formed by the water vapor. Then, heat treatment is performed on the wafer W, and the oxide layer 13a is converted into an alloy layer 13b of a metal and copper which constitute the barrier metal layer 13.

Abstract: The methods described herein relate to deposition of low resistivity, highly conformal tungsten nucleation layers. These layers serve as a seed layers for the deposition of a tungsten bulk layer. The methods are particularly useful for tungsten plug fill in which tungsten is deposited in high aspect ratio features. The methods involve depositing a nucleation layer by a combined PNL and CVD process. The substrate is first exposed to one or more cycles of sequential pulses of a reducing agent and a tungsten precursor in a PNL process. The nucleation layer is then completed by simultaneous exposure of the substrate to a reducing agent and tungsten precursor in a chemical vapor deposition process. In certain embodiments, the process is performed without the use of a borane as a reducing agent.

Abstract: A technique for forming nanostructures including a definition of a charge pattern on a substrate and introduction of charged molecular scale sized building blocks (MSSBBs) to a region proximate the charge pattern so that the MSSBBs adhere to the charge pattern to form the feature.

Abstract: The present invention provides a substrate processing method and a substrate processing apparatus, which are capable of forming a high-k dielectric film with few trapping levels due to oxygen deficiencies and hot carriers by a sputtering method in one and the same vacuum vessel. The substrate processing method according to a first embodiment of the present invention includes: a first step of heating a to-be-processed substrate (102) arranged in a film forming treatment chamber (100) and depositing a metal film on the to-be-processed substrate (102) by physical vapor deposition using a target (106); and a second step of supplying a gas containing elements for oxidizing a metal film in the film forming treatment chamber (100) to oxidize the metal film by a thermal oxidation reaction.

Abstract: A silicon film formation method includes a first film formation operation, an etching operation, and a second film formation operation. In the first film formation operation, a first silicon film is formed to fill the groove of the object to be processed. In the etching operation, an opening of the groove is widened by etching the first silicon film formed in the first film formation operation. In the second film formation operation, a second silicon film is formed on the groove having the opening widened in the etching operation to fill the groove. Accordingly, a silicon film is formed on a groove of an object to be processed having the groove provided thereon.

Abstract: Thin films are formed by formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of impurity sources are introduced during the cyclical process. A graded gate dielectric is thereby provided, even for extremely thin layers. The gate dielectric as thin as 2 nm can be varied from pure silicon oxide to oxynitride to silicon nitride. Similarly, the gate dielectric can be varied from aluminum oxide to mixtures of aluminum oxide and a higher dielectric material (e.g., ZrO2) to pure high k material and back to aluminum oxide. In another embodiment, metal nitride (e.g., WN) is first formed as a barrier for lining dual damascene trenches and vias. During the alternating deposition process, copper can be introduced, e.g.

Abstract: Techniques for low temperature ion implantation are provided to improve throughput. Specifically, the pressure of the backside gas may temporarily, continually or continuously increase before the starting of the implant process, such that the wafer may be quickly cooled down from room temperature to be essentially equal to the prescribed implant temperature. Further, after the vacuum venting process, the wafer may wait an extra time in the load lock chamber before the wafer is moved out the ion implanter, in order to allow the wafer temperature to reach a higher temperature quickly for minimizing water condensation on the wafer surface. Furthermore, to accurately monitor the wafer temperature during a period of changing wafer temperature, a non-contact type temperature measuring device may be used to monitor wafer temperature in a real time manner with minimized condensation.

Abstract: Embodiments of the invention provide a method for depositing tungsten-containing materials. In one embodiment, a method includes forming a tungsten nucleation layer over an underlayer disposed on the substrate while sequentially providing a tungsten precursor and a reducing gas into a process chamber during an atomic layer deposition (ALD) process and depositing a tungsten bulk layer over the tungsten nucleation layer, wherein the reducing gas contains hydrogen gas and a hydride compound (e.g., diborane) and has a hydrogen/hydride flow rate ratio of about 500:1 or greater. In some examples, the method includes flowing the hydrogen gas into the process chamber at a flow rate within a range from about 1 slm to about 20 slm and flowing a mixture of the hydride compound and a carrier gas into the process chamber at a flow rate within a range from about 50 sccm to about 500 sccm.

Abstract: An array substrate of a liquid crystal display and a method of fabrication for the same are disclosed. The method of fabrication includes: forming a gate electrode on a first region of a substrate, where the substrate is divided into first and second regions, forming a lower storage electrode, including a transparent conductive material, on the second region of the substrate, and forming a gate insulating layer on the substrate, where the gate insulating layer includes first, second and third gate insulating sub-layers.

Abstract: Methods and compositions for depositing metal films are disclosed herein. In general, the disclosed methods utilize precursor compounds comprising gold, silver, or copper. More specifically, the disclosed precursor compounds utilize pentadienyl ligands coupled to a metal to increase thermal stability. Furthermore, methods of depositing copper, gold, or silver are disclosed in conjunction with use of other precursors to deposit metal films. The methods and compositions may be used in a variety of deposition processes.

Abstract: Embodiments of the current invention include methods of forming a strontium titanate (SrTiO3) film using atomic layer deposition (ALD). More particularly, the method includes forming a plurality of titanium oxide (TiO2) unit films using ALD and forming a plurality of strontium oxide (SrO) unit films using ALD. The combined thickness of the TiO2 and SrO unit films is less than approximately 5 angstroms. The TiO2 and SrO units films are then annealed to form a strontium titanate layer.

Abstract: There is provided an apparatus for manufacturing a semiconductor device including a chamber in which a wafer is loaded; a gas supply mechanism for supplying process gas into the chamber; a gas discharge mechanism for discharging gas from the chamber; a heater having a slit and for heating the wafer to a predetermined temperature; a push-up base on which the wafer is mounted in an lifted state and housed in the slit in a lower state; a vertical rotation drive control mechanism for moving the push-up base up/down and rotating the push-up base in an lifted state; and a rotating member for rotating the wafer in a predetermined position and a rotation drive control mechanism connected to the rotating member.

Abstract: Silicon precursors for forming silicon-containing films in the manufacture of semiconductor devices, such as low dielectric constant (k) thin films, high k gate silicates, low temperature silicon epitaxial films, and films containing silicon nitride (Si3N4), siliconoxynitride (SiOxNy) and/or silicon dioxide (SiO2). The precursors of the invention are amenable to use in low temperature (e.g., <500° C.) chemical vapor deposition processes, for fabrication of ULSI devices and device structures.

Abstract: Formation of a boron (B) compound is suppressed on the inner wall of a nozzle disposed in a high-temperature region of a process chamber. A semiconductor device manufacturing method comprises forming a boron (B)-doped silicon film by simultaneously supplying at least a gas containing boron (B) as a constituent element and a gas containing chlorine (Cl) as a constituent element to a gas supply nozzle installed in a process chamber in a manner such that concentration of chlorine (Cl) is higher than concentration of boron (B) in the gas supply nozzle.

Abstract: Structures, in various embodiments, are provided using capacitive techniques to reduce noise in high speed interconnections, such as in CMOS integrated circuits. In an embodiment, a transmission line is disposed on a first layer of insulating material, where the first layer of insulating has a thickness equal to or less than 1.0 micrometer. The transmission line may be structured with a thickness and a width of approximately 1.0 micrometers. A second layer of insulating material is disposed on the transmission line.

Abstract: Titanium nitride (TiN) films are formed in a batch reactor using titanium chloride (TiCl4) and ammonia (NH3) as precursors. The TiCl4 is flowed into the reactor in temporally separated pulses. The NH3 can also be flowed into the reactor in temporally spaced pulses which alternate with the TiCl4 pulses, or the NH3 can be flowed continuously into the reactor while the TiCl4 is introduced in pulses. The resulting TiN films exhibit low resistivity and good uniformity.

Abstract: There is provided a method of manufacturing a semiconductor device, including the following steps: flowing a first precursor gas to the semiconductor substrate within the ALD chamber to form a first discrete monolayer on the semiconductor substrate; flowing an inert purge gas to the semiconductor substrate within the ALD chamber; flowing a second precursor gas to the ALD chamber to react with the first precursor gas which has formed the first monolayer, thereby forming a first discrete compound monolayer; and flowing an inert purge gas; and forming a second discrete compound monolayer above the semiconductor substrate by the same process as that for forming the first discrete compound monolayer. There is also provided a semiconductor device in which the charge trapping layer is a dielectric layer containing the first and second discrete compound monolayers formed by the ALD method.

Abstract: A method of forming a gate dielectric layer includes forming a first dielectric layer over a semiconductor substrate using a first plasma, performing a first in-situ plasma nitridation of the first dielectric layer to form a first nitrided dielectric layer, forming a second dielectric layer over the first dielectric layer using a second plasma, performing a second in-situ plasma nitridation of the second dielectric layer to form a second nitrided dielectric layer; and annealing the first nitrided dielectric layer and the second nitrided dielectric layer, wherein the gate dielectric layer comprises the first nitrided dielectric layer and the second nitrided dielectric layer. In other embodiments, the steps of forming a dielectric layer using a plasma and performing an in-situ plasma nitridation are repeated so that more than two nitrided dielectric layers are formed and used as the gate dielectric layer.

Abstract: A liquid injector is used to vaporize and inject a silicon precursor into a process chamber to form silicon-containing layers during a semiconductor fabrication process. The injector is connected to a source of silicon precursor, which preferably comprises liquid trisilane in a mixture with one or more dopant precursors. The mixture is metered as a liquid and delivered to the injector, where it is then vaporized and injected into the process chamber.

Abstract: A method of forming a Ta—Ru metal liner layer for Cu wiring includes: (i) conducting atomic deposition of Ta X times, each atomic deposition of Ta being accomplished by a pulse of hydrogen plasma, wherein X is an integer such that a surface of an underlying layer is not covered with Ta particles; (ii) after step (i), conducting atomic deposition of Ru Y times, each atomic deposition of Ru being accomplished by a pulse of hydrogen plasma, wherein Y is an integer such that the Ta particles are not covered with Ru particles; and (iii) repeating steps (i) and (ii) Z times, thereby forming a Ta—Ru metal liner layer on a Cu wiring substrate.

Abstract: A thin film transistor comprises a substrate; a semiconductor layer disposed on the substrate, the semiconductor layer having a source region, a drain region, and a channel region between the source region and the drain region; a gate insulating layer disposed on the semiconductor layer and on the substrate; a gate electrode disposed on the insulating layer over the channel region; an passivation layer disposed on the gate electrode and the gate insulating layer; a source electrode disposed in contact with upper, lower and side surfaces of the source region via a first contact hole through passivation layer, the gate insulating layer and the semiconductor layer; and a drain electrode disposed in contact with upper, lower and side surfaces of the drain region via a second contact hole through the passivation layer, the gate insulating layer and the semiconductor layer.

Abstract: Methods and compositions for depositing rare earth metal-containing layers are described herein. In general, the disclosed methods deposit the precursor compounds comprising rare earth-containing compounds using deposition methods such as chemical vapor deposition or atomic layer deposition. The disclosed precursor compounds include a cyclopentadienyl ligand having at least one aliphatic group as a substituent and an amidine ligand.

Abstract: A substrate-supporting device has a top surface for placing a substrate thereon composed of a plurality of surfaces separated from each other and defined by a continuous concavity being in gas communication with at least one through-hole passing through the substrate-supporting device in its thickness direction. The continuous concavity is adapted to allow gas to flow in the continuous concavity and through the through-hole under a substrate placed on the top surface.

Abstract: Provided is a substrate processing apparatus. The substrate processing apparatus comprises a reaction tube; a heating device configured to heat the reaction tube; and a manifold installed outward as compared with the heating device and made of a nonmetallic material. A first thickness of the manifold defined in a direction perpendicular to a center axis of the reaction tube is greater than a second thickness of the manifold defined at a position adjacent to the reaction tube in a direction parallel to the center axis of the reaction tube. The manifold comprises a protrusion part of which at least a portion protrudes inward more than an inner wall of the reaction tube, and a gas supply unit disposed at at least the protrusion part for supplying gas to an inside of the reaction tube.