Abstract: An integrated infrared (IR) and full color complementary metal oxide semiconductor (CMOS) imager array is provided. The array is built upon a lightly doped p doped silicon (Si) substrate. Each pixel cell includes at least one visible light detection pixel and an IR pixel. Each visible light pixel includes a moderately p doped bowl with a bottom p doped layer and p doped sidewalls. An n doped layer is enclosed by the p doped bowl, and a moderately p doped surface region overlies the n doped layer. A transfer transistor has a gate electrode overlying the p doped sidewalls, a source formed from the n doped layer, and an n+ doped drain connected to a floating diffusion region. The IR pixel is the same, except that there is no bottom p doped layer. An optical wavelength filter overlies the visible light and IR pixels.

Abstract: A pixel circuit of an image sensor includes a sense node for storing a charge transferred from one or more photodiodes, a source follower transistor having its gate coupled to the sense node and its source node coupled to an output line of the pixel circuit via a read transistor, wherein a body contact of the source follower transistor is connected to the output line.

Abstract: A solid-state imaging device includes a photoelectric conversion section which is provided for each pixel and which converts light incident on a first surface of a substrate into signal charges, a circuit region which reads signal charges accumulated by the photoelectric conversion section, a multilayer film including an insulating film and a wiring film, the multilayer film being disposed on a second surface of the substrate opposite to the first surface, and a transmission-preventing film disposed at least between the wiring film in the multilayer film and the substrate.

Abstract: A solid-state imaging device includes a photoelectric conversion section which is provided for each pixel and which converts light incident on a first surface of a substrate into signal charges, a circuit region which reads signal charges accumulated by the photoelectric conversion section, a multilayer film including an insulating film and a wiring film, the multilayer film being disposed on a second surface of the substrate opposite to the first surface, and a transmission-preventing film disposed at least between the wiring film in the multilayer film and the substrate.

Abstract: A novel CMOS image sensor Active Pixel Sensor (APS) cell structure and method of manufacture. Particularly, a CMOS image sensor APS cell having a predoped transfer gate is formed that avoids the variations of Vt as a result of subsequent manufacturing steps. According to the preferred embodiment of the invention, the CMOS image sensor APS cell structure includes a doped p-type pinning layer and an n-type doped gate. There is additionally provided a method of forming the CMOS image sensor APS cell having a predoped transfer gate and a doped pinning layer. The predoped transfer gate prevents part of the gate from becoming p-type doped.

Abstract: A CMOS image sensor is disclosed. The CMOS imager includes a lightly doped semiconductor substrate of a first conductivity type. At least one CMOS pixel of a second conductivity type is formed in the semiconductor substrate. The semiconductor substrate is configured to receive a bias voltage applied for substantially depleting the semiconductor substrate and for forming a depletion edge within the semiconductor substrate. A well of the second conductivity type substantially surrounds the at least one CMOS pixel to form a depletion region about the at least one CMOS pixel operable to form a minimum predetermined barrier to the depletion edge within the semiconductor substrate to pinch off substrate bias in proximity to the return contact.

Abstract: A method of manufacturing a CMOS image sensor is disclosed. A silicon-on-insulator substrate is provided, which includes providing a silicon-on-insulator substrate including a mechanical substrate, an insulator layer substantially overlying the mechanical substrate, and a seed layer substantially overlying the insulator layer. A semiconductor substrate is epitaxially grown substantially overlying the seed layer. The mechanical substrate and at least a portion of the insulator layer are removed. An ultrathin oxide layer is formed substantially underlying the semiconductor substrate. A mono layer of metal is formed substantially underlying the ultrathin oxide layer.

Abstract: A bipolar junction transistor having an emitter, a base, and a collector includes a stack of one or more layer sets adjacent the collector. Each layer set includes a first material having a first band gap, wherein the first material is highly doped, and a second material having a second band gap narrower than the first band gap, wherein the second material is at most lightly doped.

Abstract: Apparatuses capable of and techniques for detecting the visible light spectrum are provided.

Abstract: This invention provides a photo-FET, in which a FET part and photodiode part are stacked, and the FET part and photodiode part are optimized independently in design and operational bias conditions. The semiconductor layer serving as a photo-absorption layer (41) is formed on the cathode semiconductor layer (10) of a photodiode part (50). An electron barrier layer (40) with a wider bandgap semiconductor than a photo-absorption layer (41), which also serves as an anode layer of a photodiode part (50), is formed on a photo-absorption layer (41). The channel layer (15) which constitutes the channel regions of the FET part is formed with a narrower bandgap semiconductor than an electron barrier layer (40) on an electron barrier layer (40). The hole barrier layer (16) with a bandgap wider than the semiconductor which constitutes a channel layer (15) is formed on a channel layer (15). The source electrode (30) and drain electrode (32) which are separated each others, are formed on a hole barrier layer (16).

Abstract: Apparatuses capable of and techniques for detecting long wavelength radiation are provided.

Abstract: An apparatus includes a pixel region having disposed therein in a matrix form a plurality of conversion components, an amplifier transistor which amplifies a signal from the plurality of conversion components, a reset transistor which sets the potential of an input portion of the amplifier transistor to a reset potential, and a select transistor which is connected in series to the amplifier transistor and selects and reads the amplified signal, and well contact regions which are provided within the pixel region. Each of the well contact regions is neighboring to a drain region of the reset transistor, and the drain region of the reset transistor has a lower impurity concentration than the impurity concentration in the source and drain regions of the select transistor.

Abstract: A Light Modulating sensing MOSFET transistor includes: a substrate receiving light radiation, the substrate having two source and drain areas separated by a channel extending along a first direction; a gate conductive beam extending along a second direction being substantially perpendicular to the first direction, the beam being fixed at each of its two opposite ends on at least one supporting area and being located above the channel area, the gate beam being substantially opaque and flexible so as to perform progressive modulation of the light reaching the channel in accordance with its bending controlled by the difference of voltage between the gate and the bulk and causing the beam to bend and to come closer to the surface of the channel. A process for manufacturing a light Modulating sensing MOSFET transistor is also provided.

Abstract: Embodiments relate to a Complementary Metal Oxide Semiconductor (CMOS) image sensor, and to a method for manufacturing the same, that improves the low-light level characteristics of the CMOS image sensor. The CMOS image sensor has a photosensor unit and a signal processing unit, and may include a semiconductor substrate having a device isolating implant area provided with a first ion implant area and a complementary second ion implant area within the first ion implant area; a device isolating layer in the signal processing unit; a photodiode in the photosensor unit; and transistors in the signal processing unit. A crystal defect zone neighboring the photodiode may be minimized using the device isolating implant area between adjacent photodiodes so that a source of dark current can be reduced and the occurrence of interface traps can be prevented, making it possible to improve the low-light level characteristics of the image sensor.

Abstract: Embodiments of a pixel that includes a photosensitive region, a floating diffusion region, and a transistor transfer gate disposed between the photosensitive region and the floating diffusion region. The transfer gate includes first and second transfer gate elements, the first transfer gate element having a different doping than the second transfer gate element. By controlling the doping of the first and second transfer gate elements a transfer gate can be provided with a greater threshold voltage near the photosensitive region and a lesser threshold voltage near the floating diffusion region. Other embodiments, including process embodiments, are disclosed and claimed.

Abstract: A light detecting system is disclosed. The system comprises an arrangement of quantum dots forming an optically active region, a channel region and a charge carrier extractor between the active region and the channel region. The charge carrier extractor is characterized by a set of gradually decreasing energy levels between a characteristic excited energy level of the active region and a characteristic conductance energy level of the channel region.

Abstract: An imaging device formed as a CMOS semiconductor integrated circuit includes a nitrogen containing insulating material beneath a photogate. The nitrogen containing insulating material, preferably be one of a silicon nitride layer, an ONO layer, a nitrode/oxide layer and an oxide/nitrode layer. The nitrogen containing insulating layer provides an increased capacitance in the photogate region, higher breakdown voltage, a wider dynamic range and an improved signal to noise ratio. The invention also provides a method for fabricating a CMOS imager containing the nitrogen containing insulating layer.

Abstract: An image sensing device and packaging method thereof is disclosed. The packaging method includes the steps of a) providing an image sensing module, having a light-receiving region exposed, on a first substrate; b) forming a plurality of first contacts around the light-receiving region on the image sensing module; c) providing a second substrate, having a plurality of second contacts corresponding to the plurality of first contacts and an opening for allowing the light-receiving region to be exposed while the second substrate is placed over the image sensing module, the plurality of second contacts being disposed around the opening; d) connecting the plurality of first contacts and the plurality of second contacts; and e) disposing a transparent lid above the light-receiving region, on a side of the second substrate which is opposite to the plurality of second contacts.

Abstract: A field effect transistor includes a first semiconductor layer made of a multilayer of a plurality of semiconductor films and a second semiconductor layer formed on the first semiconductor layer. A source electrode and a drain electrode are formed on the second semiconductor layer to be spaced from each other. An opening having an insulating film on its inner wall is formed in a portion of the second semiconductor layer sandwiched between the source electrode and the drain electrode so as to expose the first semiconductor layer therein. A gate electrode is formed in the opening to be in contact with the insulating film and the first semiconductor layer on the bottom of the opening.

Abstract: A pixel of an image sensor includes a polysilicon layer, and an active region which needs to be electrically coupled with the polysilicon layer, wherein the polysilicon layer extends over a portion of the active region, such that the polysilicon layer and the active region are partially overlapped, and the polysilicon layer and the active region are coupled through a buried contact structure.

Abstract: A pixel space is narrowed without increasing PN junction capacitance. A photoelectric conversion device includes a plurality of pixels arranged therein, each including a first impurity region of a first conductivity type forming a photoelectric conversion region, a second impurity region of a second conductivity type forming a signal acquisition region arranged in the first impurity region, a third impurity region of the first conductivity type and a fourth impurity region of the first conductivity type are arranged in a periphery of each pixel for isolating the each pixel, the fourth impurity region is disposed between adjacent pixels, and an impurity concentration of the fourth impurity region is smaller than an impurity concentration of the third impurity region.

Abstract: A solid-state image capturing element according to the present invention includes a one conductivity type semiconductor substrate; an opposite conductivity type well region formed on the one conductivity type semiconductor substrate; a photodiode section formed on the opposite conductivity type well region, constituted of a plurality of one conductivity type regions with successively different impurity concentrations for complete electric charge transferring; a one conductive drain region capable of reading out signal charges from the photodiode section; and a transfer gate formed above a substrate between the one conductivity drain region and the photodiode section.

Abstract: The present invention discloses a method for manufacturing a display device comprising the steps of forming a first film pattern using a photosensitive material over a substrate, forming a second film pattern in such a way that the first film pattern is exposed by being irradiated with a laser beam, modifying a surface of the second film pattern into a droplet-shedding surface, forming a source electrode and a drain electrode by discharging a conductive material to an outer edge of the droplet-shedding surface by a droplet-discharging method, and forming a semiconductor region, a gate-insulating film, and a gate electrode over the source electrode and the drain electrode.

Abstract: The invention provides a method for forming a semiconductor structure. A plurality of first type well regions is formed in the first type substrate. A plurality of second type well regions and a plurality of second type bar doped regions are formed in the first type substrate by a doping process using a mask. The second type bar doped regions are diffused to form a second type continuous region by annealing. The second type continuous region is adjoined with the first type well regions. A second type dopant concentration of the second type continuous region is smaller than a second type dopant concentration of the second type bar doped regions. A second type source/drain region is formed in the second type well region.

Abstract: Disclosed herein is a solid-state imaging device including, active elements configured to handle the charge captured in a photoreceiving region, an element isolation region configured to isolate regions of the active element, a first impurity region configured to surround the element isolation region, and a second impurity region including an impurity region lower in impurity concentration than the first impurity region, the second impurity region being provided between the first impurity region and active elements.

Abstract: A solid-state image device is provided which includes: a photoelectric conversion portion which obtains a signal charge by photoelectric conversion of incident light; a pixel transistor portion which outputs a signal charge generated by the photoelectric conversion portion; a peripheral circuit portion which is provided at the periphery of a pixel portion including the photoelectric conversion portion and the pixel transistor portion and which has an NMOS transistor and a PMOS transistor; a first stress liner film which has a compressive stress and which is provided on the PMOS transistor; and a second stress liner film which has a tensile stress and which is provided on the NMOS transistor. In the solid-state image device described above, the photoelectric conversion portion, the pixel transistor portion, and the peripheral circuit portion are provided in and/or on a semiconductor substrate.

Abstract: An image sensor includes a semiconductor substrate, a guard ring structure in the substrate, and at least one pixel surrounded by the guard ring structure. The guard ring structure is implanted in the substrate by high-energy implantation.

Abstract: In an embodiment, an image sensor includes an isolation layer disposed in a semiconductor substrate to define a first active region and a second active region extending from the first active region. A photodiode is disposed in a portion of the first active region. A floating diffusion region is provided in the second active region at a position spaced apart from the photodiode. A transfer gate electrode is disposed on the second active region between the photodiode and the floating diffusion region. The transfer gate electrode is disposed to cover both sidewalls and an upper portion of the second active region. The transfer gate electrode has a region extending onto the first active region and overlapping the photodiode. The photodiode has a protrusion into the second active region at the portion adjacent to the transfer gate electrode. A deep n-impurity region of the photodiode extends in the protrusion.

Abstract: A solid-state imaging device including: light-receiving units which are formed in rows and columns; a transfer channel formed in each column; first and second transfer electrodes that are formed in the same layer and deposited alternately above the transfer channel; insulating regions each formed above the transfer channel and between one of the first transfer electrodes and one of the second transfer electrodes which are adjacent to each other; an antireflection film formed above the light-receiving units, and formed on the insulating regions to cover the insulating regions; a first wire formed in each row in a layer upper than the antireflection film, and electrically connected to second transfer electrodes; and a light-shielding film which is formed in a layer upper than the first wire, covers the transfer channel, and has an opening above each of the light-receiving units.

Abstract: A photodetector/imaging device comprises a layer of photoconductive material converting incident electromagnetic radiation into electrical charges, the layer of photoconductive material being capable of avalanche multiplication when an electric field of sufficient magnitude is applied thereacross; a readout layer detecting the electrical charge; and at least one interface layer between the layer of photoconductive material and the readout layer, the interface layer coupling electrical charge to or from the layer of photoconductive material and being configured to inhibit uncontrolled rises in current in the photoconductive material during avalanche multiplication.

Abstract: Disclosed is a method for manufacturing a back side illumination image sensor. The method includes defining a pixel area by forming a first isolation area in a first substrate; forming a photo detecting unit buried in the pixel area; forming an ion implantation layer on the photo detecting unit; growing a second substrate on the first substrate having the ion implantation layer; forming a logic unit electrically connected to the first substrate on the second substrate; forming an insulting layer and an interconnection on the second substrate; and exposing the photo detecting unit by grinding a backside of the first substrate.

Abstract: Trenches are formed in a substrate or layer and a solid source doped with one or more dopants is deposited over the image sensor such that the solid source fills the one or more trenches and is disposed on the surface of the substrate. The surface of the image sensor is then planarized so that the solid source remains only in the trenches. A thermal drive operation is performed to cause at least a portion of the one or more dopants in the solid source to diffuse into the portions of the substrate or layer that are immediately adjacent to and surround the sidewall and bottom surfaces of the trenches. The diffused dopant or dopants form passivation regions that passivate the interface between the substrate or layer and the sidewall and bottom surfaces of the trenches.

Abstract: The invention provides a semiconductor apparatus provided with at least one set of buried channel type first conductive type MOS transistor and surface channel type first conductive type MOS transistor on the same substrate, in which a first conductive type impurity region is provided below a gate electrode of the buried channel type and surface channel type MOS transistors and between source drain regions. Further, the invention provides a solid state image pickup device having a photoelectric conversion portion and a pixel including a plurality of transistors formed in correspondence to the photoelectric conversion portion, in a substrate, wherein the plurality of transistors includes a buried channel type first conductive type MOS transistor and a surface channel type first conductive type MOS transistor, and a first conductive type impurity region is provided below a gate electrode of the buried channel type and surface channel type MOS transistors and between source drain regions.

Abstract: Thin film transistors including an oxide semiconductor containing indium, gallium, and zinc are easily arranged in a matrix over a large substrate and have small characteristic variations. With amplifier circuits and driver circuits of display elements which include the thin film transistors including an oxide semiconductor containing indium, gallium, and zinc with small characteristic variations, intensity distribution of light received by the photodiodes arranged in a matrix is converted into electrical signals with high reproducibility and output, and the display elements arranged in a matrix can be uniformly driven.

Abstract: A solid-state imaging device includes a photoelectric conversion section which is disposed on a semiconductor substrate and which photoelectrically converts incident light into signal charges, a pixel transistor section which is disposed on the semiconductor substrate and which converts signal charges read out from the photoelectric conversion section into a voltage, and an element isolation region which is disposed on the semiconductor substrate and which isolates the photoelectric conversion section from an active region in which the pixel transistor section is disposed. The pixel transistor section includes a plurality of transistors. Among the plurality of transistors, in at least one transistor in which the gate width direction of its gate electrode is oriented toward the photoelectric conversion section, at least a photoelectric conversion section side portion of the gate electrode is disposed within and on the active region with a gate insulating film therebetween.

Abstract: An active pixel using a transfer gate that has a polysilicon gate doped with indium. The pixel includes a photosensitive element formed in a semiconductor substrate and an n-type floating node formed in the semiconductor substrate. An n-channel transfer transistor having a transfer gate is formed between the floating node and the photosensitive element. The pixel substrate has a laterally doping gradient doped with an indium dopant.

Abstract: A solid-state imaging device includes a substrate, a plurality of photodiodes arranged in the substrate in a depth direction of the substrate, a vertical readout gate electrode for reading signal charges in the photodiodes, the vertical readout gate electrode being embedded in the substrate such that the readout gate electrode extends in the depth direction of the substrate, a dark-current suppressing area which covers a bottom portion and a side surface of the readout gate electrode, the dark-current suppressing area including a first-conductivity-type semiconductor area having a uniform thickness on the side surface of the readout gate electrode, and a reading channel area disposed between the first-conductivity-type semiconductor area and the photodiodes, the reading channel area including a second-conductivity-type semiconductor area.

Abstract: A solid-state imaging device includes: a pixel part having a photoelectric conversion part photoelectrically converting incident light to obtain signal charge; and a peripheral circuit part formed on a periphery of the pixel part on a semiconductor substrate. The pixel part having a vertical transistor that reads out the signal charge from the photoelectric conversion part and a planar transistor that processes the signal charge read out by the vertical transistor. The vertical transistor has a groove part formed on the semiconductor substrate; a gate insulator film formed on an inner surface of the groove part; a conducting layer formed on a surface of the gate insulator film on the semiconductor substrate within and around the groove part; a filling layer filling an interior of the groove part via the gate insulator film and the conducting layer; and an electrode layer connected to the conducting layer on the filling layer.

Abstract: In a light sensing element having simplified structure, an array substrate having the light sensing element and an LCD apparatus having the light sensing element, the light sensing element includes a first electrode, a control electrode and a second electrode. An alternating bias voltage is applied to the first electrode. An off voltage is applied to the control electrode. The second electrode outputs a light-induced leakage current based on an externally provided light and the bias voltage. Therefore, the array substrate includes one light sensing switching element corresponding to one pixel so that structure of the array substrate is simplified and opening ratio is increased.

Abstract: An integrated infrared (IR) and full color complementary metal oxide semiconductor (CMOS) imager array is provided. The array is built upon a lightly doped p doped silicon (Si) substrate. Each pixel cell includes at least one visible light detection pixel and an IR pixel. Each visible light pixel includes a moderately p doped bowl with a bottom p doped layer and p doped sidewalls. An n doped layer is enclosed by the p doped bowl, and a moderately p doped surface region overlies the n doped layer. A transfer transistor has a gate electrode overlying the p doped sidewalls, a source formed from the n doped layer, and an n+ doped drain connected to a floating diffusion region. The IR pixel is the same, except that there is no bottom p doped layer. An optical wavelength filter overlies the visible light and IR pixels.

Abstract: Provided is a backside-illuminated solid-state image pickup device capable of allowing peripheral circuits to produce stable waveforms and thereby achieving image characteristics with less noise, the device including: a first-conductivity-type semiconductor layer having a first principal surface and a second principal surface opposed to the first principal surface and also having a pixel area and an analog circuit area; a first P type area formed to lie between the second principal surface and the first principal surface in the analog circuit area; a metal layer formed at least partially on the second principal surface of the first P type area; a VSS electrode electrically connected to the metal layer; a photo-conversion area formed in the pixel area and used to accumulate electric charges generated by photoelectric conversion; and a microlens provided on the second principal surface in the pixel area so as to correspond to the photo-conversion area.

Abstract: An image sensor includes a semiconductor layer, and first and second photoelectric converting units including first and second impurity regions in the semiconductor layer that are spaced apart from each other and that are at about an equal depth in the semiconductor layer, each of the impurity regions including an upper region and a lower region. A width of the lower region of the first impurity region may be larger than a width of the lower region of the second impurity region, and widths of upper regions of the first and second impurity regions are equal.

Abstract: A method for fabricating an LCD device includes forming an active layer having a source region, a drain region and a channel region on the first substrate; forming first and second conductive layers on the first substrate; forming a gate electrode, a gate line and a pixel electrode by patterning the first and second conductive layers, the gate electrode and the gate line being formed as a dual layer having the first and second conductive layers and the pixel electrode being formed of the first conductive layer; forming a contact hole exposing a portion of the source and drain regions; forming a source and drain electrodes electrically connected to the source and drain regions through the contact hole; and forming a liquid crystal layer between the first and second substrates.

Abstract: A solid-state imaging device includes a semiconductor substrate including a pixel portion having a photoelectric conversion portion and a peripheral circuit portion; a first sidewall composed of a sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the pixel portion; a second sidewall composed of the sidewall film and disposed on each sidewall of gate electrodes of MOS transistors in the peripheral circuit portion; a first silicide blocking film composed of the sidewall film and disposed on the photoelectric conversion portion and a part of the MOS transistors in the pixel portion; and a second silicide blocking film disposed on the MOS transistors in the pixel portion so as to overlap with a part of the first silicide blocking film, wherein the MOS transistors in the pixel portion are covered with the first and second silicide blocking films.

Abstract: Methods, systems and apparatuses for an imager that improve the quality of a captured image. The imager includes a pixel having a photosensor that generates charge in response to receiving electromagnetic radiation and a storage region that stores the generated charge. A protection region assists in keeping undesirable charge from reaching the storage region.

Abstract: An image sensor includes a photoelectric conversion portion generating signal charges, a voltage conversion portion for converting the signal charges to a voltage, a charge increasing portion for increasing the number of the signal charges stored in the photoelectric conversion portion, a first light shielding film formed to cover at least one part of the charge increasing portion and a second light shielding film provided separately from the first light shielding film and formed to cover the voltage conversion portion.

Abstract: Disclosed are a CMOS sensor and a method of fabricating the CMOS sensor. The method includes the steps of: forming a first USG layer on an entire surface of a semiconductor substrate including a cell area and a scribe area; masking the cell area, and then removing the first USG layer formed on the scribe area; forming a SiN layer on the entire surface of the semiconductor substrate; masking the cell area, and then removing the SiN layer formed on the scribe area; forming a second USG layer on the entire surface of the semiconductor substrate; and masking the scribe area, and then removing the second USG layer formed on the cell area. The USG layer is only formed on the scribe layer without the SiN layer, so that SiN particles do not drop onto the USG layer during the sintering process.

Abstract: Imager pixels with low-level interconnect sections, methods of assembling imager pixels with low-level interconnect sections, and systems containing imager pixels with low-level interconnect sections. Imager pixels are formed such that specific interconnections between transistors and other components of an imager array are removed from one or more upper level metallization sections and placed on a low-level interconnect section closer to the photodetector, such that one upper metallization section is eliminated.

Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.

Abstract: A photo sensor has an insulator layer for covering a diode stack, and the insulator layer is made of photoresist to reduce a side leakage current.