Abstract: A method and an apparatus for verifying or testing test substrates, i.e. wafers and other electronic semiconductor components, in a prober under defined thermal conditions. Such a verifying apparatus, known to the person skilled in the art as a prober, has a housing having at least two housing sections, in one housing section of which, designated hereinafter as test chamber, the test substrate to be verified is held by a chuck and is set to a defined temperature, and in the other housing section of which, designated hereinafter as probe chamber, probes are held. For verification purposes, the test substrate and the probes are positioned relative to one another by means of at least one positioning device and the probes subsequently make contact with the test substrate.

Abstract: Methods and apparatus for a package on package (POP) thermal forcing device. A thermal interposer includes a test probe guide and insulator top, a thermal conductor, the test probe guide and insulator top affixed to a top surface of the thermal conductor, a test probe, and a test probe guide and insulator bottom affixed to a bottom surface of the thermal conductor, the test probe guide and insulator bottom configured in a ring-like shape to enable the thermal conductor to pass through and make contact with a bottom of a package on package (PoP) integrated circuit (IC).

Abstract: A test station for testing at least one of fluidic component arranged on a substrate, each fluidic component having a fluidic port, comprises a carrier device for holding the substrate with the at least one fluidic component, a connecting device for fluidically connecting the fluidic port of the at least one fluidic component located in a testing position to a first adapter element of the connecting device, and a displacement device configured to displace the substrate and the connecting device relative to each other, and to bring the substrate into the testing position.

Abstract: Provided is an apparatus including a frame a conduit coupled to the frame. The conduit is configured to adjustably extend from the frame, thereby providing a channel between the frame and a side of the server rack. The channel is configured to substantially thermally isolate a flow of gas through the channel.

Abstract: A measurement device includes a stage for carrying an object to be measured, an insulating board having a through hole, a probe fixed on the undersurface of the insulating board, a side wall section in a shape surrounding the probe, a pressurizing section provided on the top surface of the insulating board, the pressuring section supplying a gas below the insulating board via the through hole, and a measurement section electrically connected to the probe to control the pressurizing section, wherein the measurement section measures an electric property of the object to be measured via the probe in a state where the pressurizing section is controlled to supply a gas to a measurement space located below the insulating board to increase a pressure in the measurement space, the measurement space surrounded by the stage, the side wall section, and the insulating board.

Abstract: A high frequency probe card for probing a photoelectric device includes a substrate having a first opening and at least one first through hole, an interposing plate disposed on the substrate and having a second opening and at least one second through hole, a circuit board disposed on the interposing plate and having a third opening and at least one third through hole, and a probe module mounted to the substrate and having at least one ground probe and at least one high-frequency impedance matching probe having a signal transmitting structure and a grounding structure passing through the at least one first, second and third through holes and being electrically connected with a signal pad and a ground pad of the circuit board, respectively. The first, second and third openings are communicated with each other for light transmission.

Abstract: A handling system for testing electronic components comprises a rotary turret and pick heads mounted on the rotary turret, each pick head being configured to hold a respective electronic component provided by a supply source. A carrier system which is positionable adjacent to the rotary turret is configured to carry a plurality of electronic components. The carrier system is receivable by a testing station that is operative to simultaneously test a plurality of the electronic components which have been arranged on the carrier system. The pick heads or other transfer mechanism may transfer the electronic components onto the carrier system prior to testing the same at the testing station and remove electronic components from the carrier system after testing the same at the testing station.

Abstract: A method for applying stress conditions to integrated circuit device samples during accelerated stress testing may include partitioning each of the integrated circuit device samples into a first region having a first functional element, partitioning each of the integrated circuit device samples into at least one second region having at least one second functional element, applying a first stress condition to the first region having the first element, applying a second stress condition to the at least one second region having the at least one second element, determining a first portion of the integrated circuit device samples that functionally failed based on the first stress condition, and determining a second portion of the integrated circuit device samples that functionally failed based on the second stress condition. An acceleration model parameter is derived based on the determining of the first and second portion of the integrated circuit samples that functionally failed.

Abstract: In accordance with one aspect of the present description, an interface between an integrated circuit device and a test controller for testing the integrated circuit device includes a plurality of boards coupled together. In one embodiment, the test interface includes a plurality of interchangeable auxiliary boards, each having test circuitry, which may be coupled to a primary board and reused as appropriate to test various integrated circuits. Other aspects are described.

Abstract: A test apparatus includes a test site, a buffer carrying device, a transport carrying device, a handling mechanism and a dry air flow guide mechanism. The test site performs a test procedure on the objects. The buffer carrying device is disposed close to a side of the test site, holds the objects and performs a temperature conditioning process. The transport carrying device is disposed close to another side of the test site, moves back and forth along a transporting direction, transports the objects into and out of the test site, and heats up the objects. The handling mechanism carries the objects among the buffer carrying device, the test site and the transport carrying device. The dry air flow guide mechanism guides a dry air to surround the test site, the buffer carrying device, the transport carrying device and the handling mechanism and generates a dry environment to prevent dew condensation.

Abstract: The invention relates to a device for the detection of defects in a recess, comprising a longitudinal hollow body (107), a movement conversion means (109) housed in said body (107) and installed free to move along the longitudinal direction, and at least one sensor (11) coupled to said body (107) and to said conversion means (109) such that longitudinal translation of the conversion means will move said sensor (11) in transverse translation between a retracted position and an extended position.

Abstract: An integrated circuit device comprising at least one self-test component arranged to execute self-testing within at least one self-test structure during a self-test execution phase of the IC device, and at least one clock control component arranged to provide at least one clock signal to the at least one self-test component at least during the self-test execution phase of the IC device. The at least one clock control component is further arranged to receive at least one indication of at least one power dissipation parameter for at least a part of the IC device, and modulate the at least one clock signal provided to the at least one self-test component based at least partly on the received at least one power dissipation parameter for at least a part of the IC device.

Abstract: A handler includes first and second cooling channels, and first and second supply channels. The first and second cooling channels correspond to housing pockets that are respectively heated by heaters. A first throttle valve controls the flow of refrigerant such that the amount of refrigerant flowing through the second cooling channel is larger than the amount of the refrigerant flowing through the first cooling channel. Temperature sensors detect the temperature of the respective housing pockets, and a control device controls the valve and the heaters so that a target temperature is maintained.

Abstract: A handler for testing a semiconductor device which is used when testing the fabricated semiconductor device. The handler for testing a semiconductor device includes a stacker to supply and accommodate a customer tray and a position selecting device to move the stacker and select a position of the stacker. By efficiently operating the stacker, the handler is able to continuously handle a large amount of semiconductor devices in a same testing process or continuously handle semiconductor devices in different lots, and equipment is prevented from becoming larger or having more complex designs so that required space, production costs and manpower are reduced and operating rates are improved.

Abstract: A probe card for an electric test of a device under test on a working table incorporating a heat source includes a circuit base plate including conductive paths connected to a tester, a probe base plate including conductive paths corresponding to the conductive paths and provided with probes connected to the conductive paths, and a heat expansion adjusting member bonded to the probe base plate, having a different linear expansion coefficient from that of the probe base plate to restrain heat expansion of the probe base plate, and constituting a composite body with the probe base plate. In a case where, when the device under test is at two measuring temperatures, the composite body is at corresponding achieving temperatures, expansion changing amounts of the device under test and the composite body under temperature differences between the respective measuring temperatures and the corresponding achieving temperatures are set to be approximately equal.

Abstract: A semiconductor system includes a controller and a semiconductor device. The controller receives a temperature code signal and responsively generates a mode set signal operable to adjust a level variation and a voltage variation rate of a temperature voltage signal, wherein the temperature voltage signal level varies according to temperature when a logic level combination of the temperature code signal is different from a predefined logic level combination. The semiconductor device generates the temperature voltage signal from a drivability and a resistance value set by the mode set signal. The semiconductor device generates the temperature code signal based on a comparison of the temperature voltage signal and a reference voltage signal.

Abstract: This disclosure relates to temperature stabilization of at least a portion of an amplifier, such as a logarithmic amplifier, and/or a band gap reference circuit. In one aspect, one or more stages of an amplifier, a heater, and a temperature sensor are included in a semiconductor material and surrounded by thermally insulating sidewalls.

Abstract: A method for producing a radio frequency identification transponder includes forming a first groove in a conductive sheet such that a portion of said conductive sheet surrounds the first groove, attaching an RFID chip to the conductive sheet after the first groove has been formed such that the first groove is located between a first connecting element of the chip and a second connecting element of the chip, and forming a second groove in the conductive sheet after the chip has been attached so as to form an antenna element of said transponder.

Abstract: In a semiconductor carrier lifetime measuring apparatus A1 of the present invention, at least two types of light having mutually different wavelengths are irradiated onto a semiconductor X to be measured, a predetermined measurement wave is irradiated onto the semiconductor X to be measured, a reflected wave of the measurement wave that has been reflected by the semiconductor X to be measured or a transmitted wave of the measurement wave that has transmitted through the semiconductor X to be measured is detected, and the carrier lifetime in the semiconductor X to be measured is obtained based on the detection results so as to minimize the error. Accordingly, the semiconductor carrier lifetime measuring apparatus A1 configured as described above can more accurately measure the carrier lifetime.

Abstract: A method for electrical testing of a 3-D integrated circuit chip stack is described. The 3-D integrated circuit chip stack comprises at least a first integrated circuit chip and a second integrated circuit chip. The first integrated circuit chip and the second integrated circuit chip are not soldered together for performing electrical testing.

Abstract: An optical transmitting device includes: a laser diode to which a first or second driving current is provided; a controller to provide the laser diode with the first driving current to transmit an optical signal and with a plurality of second driving currents, to emit light, different from each other in magnitude during a stop of providing the first driving current; a measuring unit to measure an intensity of the light emitted by the laser diode; a calculator to calculate a threshold current of the laser diode, based on the intensities corresponding to the plurality of second driving currents measured by the measuring unit and magnitudes of the plurality of second driving currents; and a determination unit to determine a precursor of a sudden-death of the laser diode, based on an amount of variation in the threshold current calculated by the calculator during a specific period.

Abstract: A miniature temperature control structure for an electric heating piece contains a miniature temperature controller. The miniature temperature controller includes a circuit board on which a plurality of electronic parts are arranged, and the plurality of electronic parts at least has a microprocessor and an electrical contact portion disposed on the circuit board, the microprocessor has a thermostat program for setting a temperature value of each of a starting heating and a stopping heating based on requirement of an electric heating piece and for setting a heating time or a heating cycle time of the electric heating piece. Thereby, a size of the circuit board of the miniature temperature controller is decreased greatly to lower production cost of the electric heating piece and to carry the electric heating piece easily.

Abstract: An electrical connector includes a base and an elastic terminal. The base has a recess. The elastic terminal is connected to the base and extends to the recess. The elastic terminal has a fixed end and a free end, the fixed end is connected to the base, and the free end is located at the recess and is curved. When the contact moves towards the recess, the contact is capable of pushing the contact protrusion to bend towards the bottom of the recess so that the free end leans against the bottom of the recess. The electrical connector may further include a contact protrusion connected to the elastic terminal. When the contact moves towards the recess, the contact is capable of pushing the contact protrusion to make the elastic terminal bend towards the bottom portion of the recess so that the free end leans against the bottom of the recess.

Abstract: An optical module includes a circuit board, an optical element on the circuit board, a semiconductor circuit element thereon and electrically coupled with the optical element, an optical connection member formed on a back surface of the circuit board and including an optical fiber receiving groove, and a pressing plate disposed on a side opposite to the circuit board of the optical connection member so as to fix the optical fiber. The semiconductor circuit element is mounted nearer a tip side of the circuit board in relation to the optical element such that the circuit board, the optical connection member and a tip part of the optical fiber are sandwiched between the semiconductor circuit element and the pressing plate. The circuit board includes a plurality of electrodes to be electrically coupled with an equipment side circuit board formed on a tip part of a back surface of the circuit board.

Abstract: Aspects of the disclosure provide an integrated circuit (IC) chip that includes a heating element and a heating control circuit. The heating element is configured to be controllable to generate heat. The heating control circuit is configured to be operable when an IC chip temperature is below a threshold. The heating control circuit is configured to receive a signal indicative of a sensed temperature and control the heating element to generate heat to raise the IC chip temperature when the sensed temperature is below the threshold.

Abstract: A method for detecting a semiconductor device property is provided. First, a semiconductor device is provided. Thereafter, a detecting current is applied and the semiconductor device is heated, and temperatures and voltages of the semiconductor device are measured, so as to establish a relationship between the temperatures and the voltages of the semiconductor device. Accordingly, a temperature sensitive parameter (TSP) is calculated. An apparatus for detecting a semiconductor device property is also provided.

Abstract: A probing apparatus includes a rotating device having a plurality of platforms for supporting DUTs, a probe device having a lifting stage movable between first and second positions, and a heating device mounted to the lifting stage so as to move along with it. The platforms are synchronously revolvable in a way that the platforms move to a test position sequentially The heating device is configured in a manner that when the lifting stage moves to the first position, the heating device is located away from the platform at the test position, and when the lifting stage moves to the second position, the heating device contacts and heats the platform at the test position. Therefore, the heating device and the probe device are movable simultaneously for heating up the platform and testing the DUT respectively.

Abstract: Provided are a semiconductor inspection system and a method for preventing condensation at an interface part. The inspection system is characterized by being equipped with: a probe apparatus configured to bring a probe into contact with a target object whose temperature is controlled so that the probe is electrically connected with the target object; a tester configured to inspect the target object by supplying an inspection signal to the target object and detect an output signal outputted from the target object; an interface part which electrically connects the probe with the tester; a vacuum seal mechanism configured to seal the interface part in an airtight state; a gas exhaust unit configured to evacuate the interior of the interface part to a depressurized atmosphere; and a dry gas supply unit configured to supply a dry gas into the evacuated interface part while controlling a flow rate of the dry gas.

Abstract: Implementations are presented herein that include a plurality of on-chip monitor circuits and a controller. Each of the plurality of on-chip monitor circuits is configured to measure a parameter of a semiconductor chip. The controller is coupled to the plurality of on-chip monitor circuits. The controller is configured to receive a measurement result from at least one of the plurality of on-chip monitor circuits and to control a calibration of another one of the plurality of on-chip monitor circuits in accordance with the measurement result.

Abstract: A semiconductor device includes a substrate, a first land formed in a first surface of the substrate, a second land formed in a second surface of the substrate, a first terminal coupled to the second land, a line coupled to the first land and the second land, a second terminal formed in the second surface of the substrate and a branch line coupled to the line and the second terminal. The second terminal is coupled to the first land and the second land and is not coupled to other lands in the first surface. The second surface is different surface from the first surface.

Abstract: Disclosed herein are methods of preventing freezing of relays in electrical components operated in specific atmospheric conditions. One such method described herein comprises monitoring a temperature of a relay with a thermocouple located on a contact of the relay while monitoring ambient temperature within the relay. Operation of the electrical component is simulated in a sub-zero temperature and high humidity condition. A freeze potential of the relay is determined by plotting a temperature cross-over curve, wherein both the ambient temperature and the contact temperature are plotted during the operation and cool down period. If the high freeze potential is determined, one or both of the relay and the electrical component are modified with a modification configured to decrease the high freeze potential.

Abstract: Provided is a handler apparatus which can connect devices under test to sockets of a test apparatus quickly and with low power consumption. The handler apparatus for conveying and connecting a plurality of devices under test to a plurality of sockets provided on a test head of a test apparatus, includes a position adjusting section that moves each of the plurality of devices under test on the test tray and adjusts the position thereof to a corresponding one of the plurality of sockets; and a device mounting section that mounts the plurality of devices under test whose positions have been adjusted by the position adjusting section, to the plurality of sockets.

Abstract: A prober includes: a wafer chuck having a conductive support surface; a movement rotation mechanism which moves and rotates the wafer chuck; a head stage which holds a probe holding portion; a stage member which has a conductive stage surface that is formed in parallel to the support surface and electrically connected with the support surface, and can move integrally with the wafer chuck; and a contactor which is fixed to a position facing the stage member and whose tip can electrically come into contact with the stage surface, wherein the stage member is separated from the wafer chuck as a separate body, and the stage surface and the support surface are electrically connected through a wiring member; and a back-surface electrode of a chip is electrically connected with a tester through the wafer chuck, a wiring, the stage member and the contactor.

Abstract: In a method for thermal stabilization of a probe card, a probe card is adjusted to a prescribed temperature in a short time by making a heat source directly contact the probe card and is accurately determined whether the probe card is thermally stable. A heat transfer substrate is mounted on a mounting table. The temperature of the heat transfer substrate is adjusted through the mounting table. The mounting table is raised, and a plurality of probes is brought into contact with the heat transfer substrate at a prescribed target load. The contact load between the heat transfer substrate and the probes, which changes according to the thermal changes in the probe card, is detected. The mounting table is controlled vertically through a vertical drive mechanism such that the contact load becomes the target load until the probe card is thermally stable.

Abstract: The present invention relates to systems and methods for preventing over pressurization in a fluid management system used in an integrated circuit (IC) device tester. The prevention of the over pressurization in the fluid management system is based on the use of a pressure relief valve coupled to the fluid management system.

Abstract: A hard disk drive system including a controller and a plurality of slave testing modules located in respective components of the hard disk drive system. The controller is arranged on a printed circuit board of the hard disk drive system and is configured to transmit information from the hard disk drive system to a host device, receive information from the host device, and, using a master testing module located in the controller, provide test configuration data corresponding to the information received from the host device. Each of the plurality of slave testing modules is configured to receive the test configuration data from the master testing module and test operation of the respective component of the hard disk drive system using the test configuration data.

Abstract: An integrated circuit (IC) device tester maintains a set point temperature on an IC device under test (DUT) having a die attached to a substrate. The tester includes a thermal control unit and a fluid management system configured to supply the thermal control unit with fluids for pneumatic actuation, cooling, and condensation abating. The tester can includes a box enclosing the thermal control unit thereby providing a substantially isolated dry environment during low humidity testing of the DUT. The heat exchange plate may include an inner structure for thermal conductivity enhancement.

Abstract: An IDDQ test system and method that, in one embodiment, includes 1) an empirical extraction subsystem operable to generate an IDDQ versus temperature model for a given semiconductor device design, 2) an automatic test equipment (ATE) test subsystem operable to obtain a measured IDDQ value (IDDQm) at a measured temperature (Tm) for a specific semiconductor device embodying the given semiconductor device design, the measured temperature (Tm) obtained within 5 seconds of obtaining the measured IDDQ value (IDDQm), and 3) a scaling subsystem operable to scale the measured IDDQ value (IDDQm) at the measured temperature (Tm) to a compensated IDDQ value (IDDQc) at a desired temperature (Td) using the IDDQ versus temperature model.

Abstract: A heating system is described for generating heat and bringing heat to a semiconductor device under test. The heating system comprises a conduction heating unit comprising a heating resistor, a thermal contact area for thermally contacting the semiconductor device under test, and a thermally conductive and electrically insulating connection between the heating resistor and the thermal contact area. The heating resistor is operable to generate a user-defined amount of heat and arranged to provide a part of the heat generated by the heating resistor to the thermal contact area via the thermally conductive and electrically insulating connection. It is also described that the heating system may further comprise a convection heating chamber operable to provide a user-defined heat-controlled convection to the semiconductor device under test. A method of testing a semiconductor device using a heating system is also described.

Abstract: A device tester for an IC device under test (DUT), the DUT having a substrate and an attached die. The device tester includes a thermal control unit and a test socket assembly which conforms to the DUT's profile. The thermal control unit includes a pedestal assembly, a heater having a fuse coupled to a heating element, a substrate pusher, and a force distributor for distributing force between the pedestal assembly and the substrate pusher. The test socket assembly includes a socket insert that supports and also conforms to the DUT's profile.

Abstract: A method and apparatus for temperature sensor calibration is disclosed. In one embodiment, an integrated circuit (IC) is tested at a first known temperature corresponding to a first temperature threshold. During the test, a first temperature reading is obtained from a temperature sensor. A first offset is calculated by determining the difference between the first known temperature and the first temperature reading. The first offset is recorded in a storage unit for later use during operation of the IC. During operation, the first offset may be added to temperature readings obtained from a temperature sensing unit to produce an adjusted temperature value. The adjusted temperature value may be compared to one or more temperature thresholds. Based on the comparisons, a power management unit may perform power control actions.

Abstract: An integrated circuit device includes component devices (that include primary and alternate devices) and storage elements connected to the component devices. The storage elements store different sets of repair addresses indicating which of the primary devices and alternate devices are to be enabled. Further, a controller is connected to the storage elements, and a temperature sensor is connected to the controller. The temperature sensor senses the temperature. The controller selects one of the different storage elements to select at least one of the sets of repair addresses based on the temperature sensed by the temperature sensor. The sets of repair addresses share use of at least one of the alternate devices and at least one of the primary devices.

Abstract: Methods and systems for compensating for temperature variation in the performance of electronic circuits and systems are disclosed. In some embodiments, the systems are configured to store compensation parameters determined in calibration, where the compensation parameters are used by the systems to modify performance. In some embodiments, the systems are part of an automatic test equipment (ATE) system.

Abstract: Methods and systems for compensating for temperature variation in the performance of electronic circuits and systems are disclosed. In some embodiments, the systems are configured to store compensation parameters determined in calibration, where the compensation parameters are used by the systems to modify performance. In some embodiments, the systems are part of an automatic test equipment (ATE) system.

Abstract: Methods and systems for compensating for temperature variation in the performance of electronic circuits and systems are disclosed. In some embodiments, the systems are configured to store compensation parameters determined in calibration, where the compensation parameters are used by the systems to modify performance. In some embodiments, the systems are part of an automatic test equipment (ATE) system.

Abstract: Methods and systems for compensating for temperature variation in the performance of electronic circuits and systems are disclosed. In some embodiments, the systems are configured to store compensation parameters determined in calibration, where the compensation parameters are used by the systems to modify performance. In some embodiments, the systems are part of an automatic test equipment (ATE) system.

Abstract: Methods and systems for compensating for temperature variation in the performance of electronic circuits and systems are disclosed. In some embodiments, the systems are configured to store compensation parameters determined in calibration, where the compensation parameters are used by the systems to modify performance. In some embodiments, the systems are part of an automatic test equipment (ATE) system.

Abstract: A coaxial socket useful in association with an integrated circuit (IC) device tester and having a conducting pin surrounded by an insulating layer and embedded in a conducting base. This coaxial pin configuration allows for good thermal conductivity and better electrical signal transmission specially for testing high-speed integrated circuits.

Abstract: An apparatus includes a wiring base plate arranged on an upper side of a chuck top and having a wiring path connected to a tester, a probe card having a probe board spaced from the wiring base plate with a first surface thereof opposed to the wiring base plate and having a wiring path corresponding to the wiring path and probes provided on a second surface of the probe board to be connected to the wiring path and enabling to respectively contact connection pads of a semiconductor wafer on the chuck top, and an electric connector connecting the wiring base plate to the probe board by low heat conduction supporting members and decreasing heat conduction therebetween and electrically connecting the wiring paths.

Abstract: An apparatus includes a probe card having a probe board with a conductive path electrically connected to a tester and probes enabling to respectively contact connection pads of a semiconductor wafer on a chuck top and moving relatively to the chuck top, and an elastic heat conducting member arranged between a working surface of the chuck top or the semiconductor wafer on the working surface and the probe board. The elastic heat conducting member can abut on the working surface of the chuck top or the semiconductor wafer on the working surface and the probe board when the probes do not abut on the respective corresponding connection pads and is elastically deformable not to prevent abutment between the probes and the respective corresponding connection pads.