Thermal Preconditioning Or Temperature Control Patents (Class 324/750.03)
  • Publication number: 20140043052
    Abstract: Some aspects of the present disclosure relate to an apparatus that includes an integrated chip having a bandgap reference circuit and one or more heating elements. The bandgap reference circuit is located within a subset of the integrated chip and outputs a reference voltage having a temperature dependence. The one or more of the heating elements vary the temperature of the subset of the integrated chip.
    Type: Application
    Filed: August 9, 2012
    Publication date: February 13, 2014
    Applicant: Infineon Technologies AG
    Inventors: Christian Lindholm, Henrik Hassander
  • Publication number: 20140028337
    Abstract: In a method and a device for testing a test substrate under defined thermal conditions, a substrate that is to be tested is held by a temperature-controllable chuck and is set to a defined temperature; the test substrate is positioned relative to test probes by at least one positioning device; and the test probes make contact with the test substrate for testing purposes. At least one component of the positioning device that is present in the vicinity of the temperature-controlled test substrate is set to a temperature that is independent of the temperature of the test substrate by a temperature-controlling device, and this temperature is held constant.
    Type: Application
    Filed: July 29, 2013
    Publication date: January 30, 2014
    Applicant: Cascade Microtech, Inc.
    Inventors: Joerg Kiesewetter, Stojan Kanev, Michael Teich, Karsten Stoll, Axel Schmidt
  • Publication number: 20140021973
    Abstract: Provided is a power cycle test apparatus that eliminates the need to measure a thermal resistance in a power cycle test and that pursues power saving in the evaluation of IGBT reliability by exactly applying a required thermal stress through the automatic adjustment of a stress current. The power cycle test apparatus performs a power cycle test for an IGBT to be tested by applying a thermal stress to the IGBT to be tested through the intermittent application of a stress current thereto. The apparatus applies the stress current to the IGBT to be tested and thereafter applies a current for measurement to the IGBT to be tested to measure a collector-emitter voltage of the IGBT to be tested. The apparatus further obtains a junction temperature of the IGBT to be tested from the measured collector-emitter voltage and a temperature coefficient of the IGBT to be tested.
    Type: Application
    Filed: July 17, 2013
    Publication date: January 23, 2014
    Inventor: Michiya Kusaka
  • Publication number: 20140021974
    Abstract: Provided are a power cycle test apparatus and a power cycle test method that can efficiently reproduce nearly a level of stress that may occur in failure mode in actual environments, the apparatus which is a test apparatus for performing a power cycle test for a power semiconductor device to be tested by applying a thermal stress to the power semiconductor device through the application of a stress current thereto in predefined ON/OFF cycles executes a thermal cycle test in temperature rise-fall cycles longer than the ON/OFF cycles by using an apparatus configured to change an external environmental temperature and further executes the power cycle test while executing the thermal cycle test in synchronization with execution phases of the thermal cycle test.
    Type: Application
    Filed: July 18, 2013
    Publication date: January 23, 2014
    Inventor: Katsumasa SUYAMA
  • Publication number: 20140021972
    Abstract: A test socket assembly, useful in association with a thermal control unit (TCU) used to maintain a set point temperature on an IC device under test, has alignment holes with bushings that are secured within the alignment holes by using retaining pins. The retaining pins can be easily screwed in and out of the socket. This provision allows the bushings to be replaced easily as they get worn out or deformed from repeated testing.
    Type: Application
    Filed: July 12, 2013
    Publication date: January 23, 2014
    Applicant: Essai, Inc.
    Inventors: Nasser Barabi, Chee Wah Ho, Joven R. Tienzo, Oksana Kryachek, Elena V. Nazarov
  • Publication number: 20140015556
    Abstract: A test socket assembly, useful in association with a thermal control unit used to maintain a set point temperature on an IC device under test, has at least one compliant pedestal is configured to facilitate the testing of integrated circuits where the device under test comprises a substrate having multiple IC chips with different heights and testing requirements.
    Type: Application
    Filed: July 3, 2013
    Publication date: January 16, 2014
    Inventors: Nasser Barabi, Chee Wah Ho, Joven R. Tienzo, Oksana Kryachek, Elena V. Nazarov
  • Publication number: 20140015557
    Abstract: A method and apparatus for extracting the contents (39) of voids (13) and/or pores present in a semiconductor device to obtain information indicative of the nature of the voids and/or pores, e.g. to assist with metrology measurements. The method includes heating the semiconductor wafer to expel the contents of the voids and/or pores, collecting the expelled material (41) in a collector, and measuring a consequential change in mass of the semiconductor wafer (29) and/or the collector (37), to extract information indicative of the nature of the voids. This information may include information relating to the distribution of the voids and/or pores, and/or the sizes of the voids and/or pores, and/or the chemical contents of the voids and/or pores. The collector may include a condenser having a temperature-controlled surface (e.g. in thermal communication with a refrigeration unit) for condensing the expelled material.
    Type: Application
    Filed: April 5, 2012
    Publication date: January 16, 2014
    Applicant: METRYX LIMITED
    Inventor: Adrian Kiermasz
  • Patent number: 8624613
    Abstract: A printed circuit board of a hard disk drive system includes a first component and a plurality of second components of the hard disk drive system. The first component is configured to transmit information to, and receive information from, a host device via a communication interface of the printed circuit board. The first component includes a first testing module operating as a master testing module. Each of the plurality of second components includes a respective second testing module operating as a slave testing module. The first component is connected to each of the plurality of second components and is configured to provide test configuration data to each of the respective second testing modules. The test configuration data corresponds to the information received from the host device, and the test configuration data enables each of the respective second testing modules to test operation of the plurality of second components.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: January 7, 2014
    Assignee: Marvell International Ltd.
    Inventors: Saeed Azimi, Son Hong Ho
  • Publication number: 20130342230
    Abstract: Measuring current-voltage (I-V) characteristics of a solar cell using a lamp that emits light, a substrate that includes a plurality of solar cells, a positive electrode attached to the solar cells, and a negative electrode peripherally deposited around each of the solar cells and connected to a common ground, an articulation platform coupled to the substrate, a multi-probe switching matrix or a Z-stage device, a programmable switch box coupled to the multi-probe switching matrix or Z-stage device and selectively articulating the probes by raising the probes until in contact with at least one of the positive electrode and the negative electrode and lowering the probes until contact is lost with at least one of the positive electrode and the negative electrode, a source meter coupled to the programmable switch box and measuring the I-V characteristics of the substrate.
    Type: Application
    Filed: August 20, 2013
    Publication date: December 26, 2013
    Applicant: Intermolecular, Inc
    Inventors: Yun Wang, Tony P. Chiang, Chi-I Lang
  • Publication number: 20130307572
    Abstract: A battery simulation circuit simulates a rechargeable battery. The battery simulation circuit includes an integrated amplifier, a voltage adjustment unit, a current limitation unit, and a feedback unit. The voltage adjustment unit provides a reference voltage for the integrated amplifier; the current limitation unit provides a reference current for the integrated amplifier and the feedback unit provides a negative feedback signal for the integrated amplifier to control the integrated amplifier working in a linear state. The integrated amplifier outputs an output signal according to the reference voltage and the reference current; the battery simulation circuit supplies power for an electronic device. When the output terminal is connected to a DC power source and a voltage of the DC power source is greater than the output voltage of the output terminal, the battery simulation circuit simulates a battery being recharged by the DC power source via the output terminal.
    Type: Application
    Filed: May 15, 2013
    Publication date: November 21, 2013
    Applicants: Hon Hai Precision Industry Co., Ltd., Fu Tai Hua Industry (Shenzhen) Co., Ltd.
    Inventors: QI-LONG YU, TSUNG-JEN CHUANG, JUN ZHANG, SHIH-FANG WONG, JUN-WEI ZHANG, JIAN-JUN ZHOU
  • Patent number: 8586982
    Abstract: A semiconductor test device including a plurality of conductive layers, each of the layers comprising integrated circuit devices, a plurality of insulating layers between the conductive layers, a plurality of heat generating structures positioned between the insulating layers and the conductive layers, each of the heat generating structures being sized and positioned to only heat a predetermined limited area of the plurality of layers, a plurality of thermal monitors positioned within each of the plurality of layers, a control unit operatively connected to the heat generating structures and the thermal monitors, the control unit individually cycling the heat generating structures on and off for multiple heat cycles, such that different areas of the layers are treated to different heat cycles.
    Type: Grant
    Filed: August 25, 2010
    Date of Patent: November 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Luke D. LaCroix, Janak G. Patel, Peter Slota, Jr., David B. Stone
  • Patent number: 8581533
    Abstract: A controller controls switching of IGBT devices of an inverter according to the desired output of the permanent magnet motor. The controller includes: a magnet temperature detection device that detects the magnet temperature of the permanent magnet motor based on the output of a temperature sensor; a setting device that sets a threshold value of the magnet temperature corresponding to the desired output of the permanent magnet motor, based on a predetermined relation between the output from the permanent magnet motor and a critical temperature, up to which demagnetization in the permanent magnet motor is not caused; and a carrier frequency control device that, when the magnet temperature detected by the magnet temperature detection device exceeds the threshold value, changes the carrier frequency, at which the IGBT devices are switched, such that a ripple current superimposed on a motor current that flows through the permanent magnet motor is reduced.
    Type: Grant
    Filed: October 8, 2009
    Date of Patent: November 12, 2013
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Kazuhito Hayashi, Masayoshi Suhama
  • Publication number: 20130285684
    Abstract: An inspection apparatus includes a probe substrate, a socket secured to the probe substrate, a heating element wire wound around the socket, a probe tip detachably connected to the socket, a stage on which an object to be measured is mounted, and a heating unit for heating the stage.
    Type: Application
    Filed: January 14, 2013
    Publication date: October 31, 2013
    Inventors: Akira OKADA, Hajime AKIYAMA, Kinya YAMASHITA
  • Publication number: 20130278279
    Abstract: In a method for thermal stabilization of a probe card, a probe card is adjusted to a prescribed temperature in a short time by making a heat source directly contact the probe card and is accurately determined whether the probe card is thermally stable. A heat transfer substrate is mounted on a mounting table. The temperature of the heat transfer substrate is adjusted through the mounting table. The mounting table is raised, and a plurality of probes is brought into contact with the heat transfer substrate at a prescribed target load. The contact load between the heat transfer substrate and the probes, which changes according to the thermal changes in the probe card, is detected. The mounting table is controlled vertically through a vertical drive mechanism such that the contact load becomes the target load until the probe card is thermally stable.
    Type: Application
    Filed: December 9, 2011
    Publication date: October 24, 2013
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Kazunari Ishii, Tetsuji Watanabe, Shinya Koizumi, Koichi Matsuzaki
  • Publication number: 20130271169
    Abstract: A method and apparatus for preparing electronic samples for a subsequent treatment, e.g., application of a failure analysis treatment. In one embodiment, an electronic device is mounted on a thermally controlled plate and a select temperature is applied thereto. While maintaining the select temperature applied to the thermally controlled plate, a sample preparation process is performed on the electronic device, such as, e.g., performing polishing, thinning, milling, lapping or extracting one or more semiconductor dies that form the electronic device.
    Type: Application
    Filed: April 10, 2013
    Publication date: October 17, 2013
    Inventor: James B. Colvin
  • Patent number: 8558553
    Abstract: Methods and apparatus selecting settings for circuits according to various aspects of the present invention may operate in conjunction with a measurement element connected to the circuit. The circuit may include a voltage source adapted to supply a voltage to the measurement element. The voltage may be substantially independent of the characteristics of the measurement element. The circuit may further include a measurement sensor responsive to a current in the measurement element. The measurement sensor may generate a control signal according to the current in the measurement element.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: October 15, 2013
    Assignee: Infineon Technologies Austria AG
    Inventors: Kenneth A. Ostrom, Richard Pierson, Benjamim Tang, Clark Custer, Scott Southwell, Felix Kim
  • Patent number: 8552754
    Abstract: The invention provides a method of testing reliability of a semiconductor device, wherein the semiconductor device has negative bias temperature instability NBTI.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: October 8, 2013
    Assignee: Peking University
    Inventors: Xiaoyan Liu, Jiaqi Yang, Jinfeng Kang, Jingfeng Yang, Bing Chen
  • Publication number: 20130257421
    Abstract: A method and system for testing a read transducer are described. The read transducer includes a read sensor fabricated on a wafer. A system includes a test structure that resides on the wafer. The test structure includes a test device and a heater. The test device corresponds to the read sensor. The heater is in proximity to the test device and is configured to heat the test device substantially without heating the read sensor. Thus, the test structure allows for on-wafer testing of the test device at a plurality of temperatures above an ambient temperature.
    Type: Application
    Filed: March 30, 2012
    Publication date: October 3, 2013
    Applicant: WESTERN DIGITAL (FREMONT), LLC
    Inventors: CHANGHE SHANG, DANIELE MAURI, KUOK SAN HO
  • Patent number: 8547122
    Abstract: A plurality of devices under test (DUT) are arranged in a strip tester having a temperature controlled heater block. Each DUT has a respective set of electrical test probes and a thermally conductive test probe for electrically and thermally coupling, respectively, of the strip tester to the DUTs. Temperature measurement of each of the plurality of DUTs is performed by a temperature measuring device. The temperature measuring device can be part of the test board of the strip tester and will be in thermal communications with the DUT through the thermally conductive test probe, or temperature of the DUT can be measurement with an RTD embedded in the thermally conductive test probe, thereby providing faster thermal response time.
    Type: Grant
    Filed: July 11, 2011
    Date of Patent: October 1, 2013
    Assignee: Microchip Technology Incorporated
    Inventors: Ronaldo Francisco, Chi Lung Wong, Tim Messang, Ezana Haile Aberra
  • Patent number: 8547123
    Abstract: A test slot assembly is provided for testing a storage device. The test slot assembly is configured to receive and support a storage device, or a storage device supported by a storage device transporter. The test slot assembly also includes a conductive heating assembly. The conductive heating assembly is arranged to heat a storage device by way of thermal conduction.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: October 1, 2013
    Assignee: Teradyne, Inc.
    Inventors: Brian S. Merrow, Larry W. Akers
  • Publication number: 20130249577
    Abstract: Methods and apparatus for performing an accelerated lifetime test on a photovoltaic device are provided. The method can include positioning a first photovoltaic device in a first holder adjacent to a light guide such that a transparent surface of the photovoltaic device faces the light guide, directing light emitted from a first light source into the light guide, and redirecting the light emitted from the first light source within the light guide to illuminate the transparent surface of the photovoltaic device.
    Type: Application
    Filed: March 21, 2012
    Publication date: September 26, 2013
    Applicant: PrimeStar Solar, Inc.
    Inventors: Jeffrey Todd Knapp, Samuel Demtsu, Scott L. French
  • Publication number: 20130234744
    Abstract: A method performs a diagnosis of a lambda sensor of a “UEGO” type of an exhaust system for an internal-combustion engine. The lambda sensor includes a series of pins. The diagnosis method comprises steps of: heating the lambda sensor to cause the lambda sensor to reach an inner temperature that is higher than about 600° C.; polarizing a first one of the pins by connecting the first pin to a supply voltage through a first limiting resistance; measuring a voltage of all of the pins while the first pin is connected to the supply voltage; and diagnosing a presence of a short circuit to an electrical ground if the voltage of at least one of the pins is lower than a predetermined threshold. A control unit performs the diagnosis.
    Type: Application
    Filed: November 28, 2012
    Publication date: September 12, 2013
    Applicant: MAGNETI MARELLI S.P.A.
    Inventors: Piero Maria Carbonaro, Marco Ceroni
  • Patent number: 8508245
    Abstract: Thermal control units (TCU) for maintaining a set point temperature on an IC device under test (DUT) are provided. The units include a pedestal assembly comprising a heat-conductive pedestal, a fluid circulation block, a thermoelectric module (Peltier device) between the heat-conductive pedestal and the block for controlling heat flow between the pedestal and fluid circulation block, and a force distribution block for controllably distributing a z-axis force between different pushers of the TCU. Optionally, a swivelable temperature-control fluid inlet and outlet arms may be provided to reduce instability of the thermal control unit due to external forces exerted on the TCU such as by fluid lines attached to the fluid inlet and outlet arms. Also optionally, an integrated means for abating condensation on surfaces of the TCU during cold tests may be provided.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: August 13, 2013
    Assignee: Essai, Inc.
    Inventors: Nasser Barabi, Elena Nazarov, Joven R. Tienzo, Chee-Wah Ho
  • Patent number: 8497693
    Abstract: In a method and a device for testing a test substrate under defined thermal conditions, a substrate that is to be tested is held by a temperature-controllable chuck and is set to a defined temperature; the test substrate is positioned relative to test probes by at least one positioning device; and the test probes make contact with the test substrate for testing purposes. At least one component of the positioning device that is present in the vicinity of the temperature-controlled test substrate is set to a temperature that is independent of the temperature of the test substrate by a temperature-controlling device, and this temperature is held constant.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: July 30, 2013
    Assignee: Cascade Microtech, Inc.
    Inventors: Joerg Kiesewetter, Stojan Kanev, Michael Teich, Karsten Stoll, Axel Schmidt
  • Patent number: 8493733
    Abstract: A mobile measurement device, particularly for temporary use in or on vehicles, on stationary engines, or on test benches, consists of individual components (2) that might have different working temperatures, disposed in a common housing (1). Furthermore, at least one fan (6) is provided. In order to allow a very broad range of use with regard to the outside temperature range, at the smallest and lightest possible construction, in order to guarantee simple transport and great mobility, and reliable measurements within this range, the housing (1) is structured essentially in gastight manner.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: July 23, 2013
    Assignee: AVL List GmbH
    Inventors: Thomas Schimpl, Martin Dorfner, Volker Pointner
  • Publication number: 20130181732
    Abstract: Disclosed herein are methods of preventing freezing of relays in electrical components operated in specific atmospheric conditions. One such method described herein comprises monitoring a temperature of a relay with a thermocouple located on a contact of the relay while monitoring ambient temperature within the relay. Operation of the electrical component is simulated in a sub-zero temperature and high humidity condition. A freeze potential of the relay is determined by plotting a temperature cross-over curve, wherein both the ambient temperature and the contact temperature are plotted during the operation and cool down period. If the high freeze potential is determined, one or both of the relay and the electrical component are modified with a modification configured to decrease the high freeze potential.
    Type: Application
    Filed: January 13, 2012
    Publication date: July 18, 2013
    Applicant: NISSAN NORTH AMERICA, INC.
    Inventors: Greg Szleszynski, Adrian Dobre, Teofil Barjuca, Ryutaro Mine, Jim Beach, Adam Wehner, Tim Balogh
  • Publication number: 20130181733
    Abstract: Provided is a handler apparatus which can connect devices under test to sockets of a test apparatus quickly and with low power consumption.
    Type: Application
    Filed: November 14, 2012
    Publication date: July 18, 2013
    Applicant: ADVANTEST CORPORATION
    Inventor: ADVANTEST CORPORATION
  • Patent number: 8476914
    Abstract: A concentrator photovoltaic measuring device includes a platform, an enclosing mask, a converging lens, a concentration unit, a first temperature regulation unit, a second temperature regulation unit, a temperature detection unit, a data transmission unit, and an electricity transmission unit. With its temperature regulation function, the concentrator photovoltaic measuring device simulates the effect of seasonal temperature variation on the energy conversion efficiency of a solar cell, so as to be effective in measuring the energy conversion efficiency of the solar cell in real environment and environment having a specific variable. Also, the concentrator photovoltaic measuring device accommodates a single solar cell, so as to be capable of measuring the single solar cell.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: July 2, 2013
    Assignee: Institute of Nuclear Energy Research, Atomic Energy Council, Executive Yuan
    Inventors: Hsueh-Chao Ko, Cheng-Ban Chung, Chii-Neng Ou Yang, Yao-Tung Hsu
  • Patent number: 8471575
    Abstract: Methodologies and test configurations are provided for testing thermal interface materials and, in particular, methodologies and test configurations are provided for testing thermal interface materials used for testing integrated circuits. A test methodology includes applying a thermal interface material on a device under test. The test methodology further includes monitoring the device under test with a plurality of temperature sensors. The test methodology further includes determining whether any of the plurality of temperature sensors increases above a steady state.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: June 25, 2013
    Assignee: International Business Machines Corporation
    Inventors: Dustin Fregeau, David L. Gardell, Laura L. Kosbar, Keith C. Stevens, Grant W. Wagner
  • Patent number: 8466699
    Abstract: A storage device transporter is provided for transporting a storage device and for mounting a storage device within a test slot. The storage device transporter includes a frame that is configured to receive and support a storage device. The storage device transporter also includes a conductive heating assembly that is associated with the frame. The conductive heating assembly is arranged to heat a storage device supported by the frame by way of thermal conduction.
    Type: Grant
    Filed: July 15, 2009
    Date of Patent: June 18, 2013
    Assignee: Teradyne, Inc.
    Inventors: Brian S. Merrow, Larry W. Akers
  • Publication number: 20130141127
    Abstract: The present invention provides a probe assembly for inspecting power semiconductor devices, which comprises (1) a probe block having more than one probe holding hole, (2) more than one probe, each of which is contained in one of the probe holding holes with its outer surface being in contact with the inner surface of the probe holding hole, and which has lower end protruding from the probe block and coming into contact with the power semiconductor device on inspection, and (3) one or more cooling means which cool the probe block. According to the probe assembly and the inspection apparatus having the prove assembly of the present invention, it is possible to inspect characteristics of power semiconductor devices accurately by suppressing temperature rises of the probes as well as the power semiconductor device under test.
    Type: Application
    Filed: December 5, 2012
    Publication date: June 6, 2013
    Applicant: KABUSHIKI KAISHA NIHON MICRONICS
    Inventor: KABUSHIKI KAISHA NIHON MICRONICS
  • Publication number: 20130141126
    Abstract: A simulation test card to simulate a peripheral card to be inserted into a system to be tested includes a board, an edge connector formed on a bottom side of the board, and a first heating circuit. The first heating circuit includes a number of first switches, a number of first resistors, and a heating element. First terminal of the first switches are connected to a power pin of the edge connector. A first terminal of each first switch is connected to a first terminal of the first heating element through a corresponding first resistor. A second terminal of the first heating element is connected to a ground pin of the edge connector. Each of the switches can be selectively switched to make the first heating circuit generate different heat.
    Type: Application
    Filed: December 29, 2011
    Publication date: June 6, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventors: LEI LIU, XIAO-FENG MA
  • Patent number: 8456186
    Abstract: A reliability evaluation test apparatus of this invention includes a wafer storage section which stores a wafer in a state wherein the electrode pads of a number of devices formed on the wafer and the bumps of a contactor are totally in electrical contact with each other. The wafer storage section transmits/receives a test signal to/from a measurement section and has a hermetic and heat insulating structure. The wafer storage section has a pressure mechanism which presses the contactor and a heating mechanism which directly heats the wafer totally in contact with the contactor to a predetermined high temperature. The reliability of an interconnection film and insulating film formed on the semiconductor wafer are evaluated under an accelerated condition.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: June 4, 2013
    Assignees: Tokyo Electron Limited, Ibiden Co., Ltd.
    Inventors: Kiyoshi Takekoshi, Hisatomi Hosaka, Junichi Hagihara, Kunihiko Hatsushika, Takamasa Usui, Hisashi Kaneko, Nobuo Hayasaka, Yoshiyuki Ido
  • Patent number: 8446160
    Abstract: An improved probe card maintenance method is capable of accurately, rapidly, and easily performing the maintenance of a probe card. The probe card is a jig adapted to test the electrical properties of semiconductor integrated circuits. The electrical properties of the semiconductor integrated circuits are tested at a predetermined test temperature. The probe card has a plurality of probes thereon. The probe card maintenance method includes heating the probe card and the probes on the probe card to the same temperature as the test temperature. The method also includes adjusting positions and postures of the defective probes while maintaining the temperature of the probe card and the probes at the test temperature.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: May 21, 2013
    Assignee: Oki Semiconductor Co., Ltd.
    Inventors: Katsuhiro Gunji, Toru Iwasaki, Tatsurou Nagai, Yumi Kodama
  • Patent number: 8446159
    Abstract: A current sensor is disclosed. The current sensor includes a leadframe having a die paddle, a portion of the die paddle being configured as a resistive element through which current can flow, and an integrated circuit (IC) die attached and thermally coupled to the die paddle. The IC die includes a current sensing module configured to measure a voltage drop across the resistive element and convert the voltage drop measurement to a current measurement signal and a temperature compensation module electrically coupled to the current sensing module. The temperature compensation module is configured to adjust the current measurement signal to compensate for temperature-dependent changes in the resistive element. The temperature compensation module includes a temperature-sensitive element, with a portion of the temperature-sensitive element located directly over a portion of the resistive element.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: May 21, 2013
    Assignee: Linear Technology Corporation
    Inventors: Edson Wayne Porter, Robert C. Chiacchia, Wan Wah Loh
  • Publication number: 20130113509
    Abstract: A temperature control system for IC tester, comprising: a test socket; a compressing device including a heat exchanger and a thermoelectric cooler (TEC); and a test head having a temperature sensor. The test head is configured at the front end of the compressing device such that, upon placing at least one device under test (DUT) onto the test socket, the test head coerces tightly one of the DUTs through downward pressure from the compressing device thereby allowing the temperature sensor to detect the surface temperature of the DUT to obtain a temperature signal, and then feed such a temperature signal back to a control processing unit for operations to generate a linear control signal thus that, through the control of the linear control signal, the heat absorption and heat discharge functions of the TEC are enabled to further control the temperature of the DUT within a determined range.
    Type: Application
    Filed: March 12, 2012
    Publication date: May 9, 2013
    Inventors: Xin-Yi WU, Jui-Che Chou, Meng-Kung Lu, Chin-Yi Ou Yang
  • Patent number: 8432176
    Abstract: A test apparatus for testing semiconductor integrated circuits includes a test head, a probe card holder for detachably holding a probe card that probes a semiconductor device, a heater for heating the probe card, and a heater holder that holds the heater in direct contact with the probe card when the probe card is held by the probe card holder. The test apparatus heats the probe card efficiently and thereby reduces test time and cost.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: April 30, 2013
    Assignee: OKI Semiconductor Co., Ltd.
    Inventors: Katsuhiro Gunji, Toru Iwasaki, Takaaki Sasaki
  • Patent number: 8424594
    Abstract: A heat spreader comprising a sheet of transparent diamond with an aperture therein that accommodates a solid-immersion lens (SIL). The heat spreader may be mounted within a clamp which allows the heat spreader to move freely across the Device Under Test (DUT) while maintaining a very high degree of planarity and contact between the diamond and the silicon substrate of the DUT. The DUT is secured to its electrical interface with a low profile clamp, the DUT may be held within the clamp by a mechanism that applies a pressure to the sides of the DUT package.
    Type: Grant
    Filed: December 10, 2007
    Date of Patent: April 23, 2013
    Assignee: Presto Engineering, Inc.
    Inventors: Daniel C. Canfield, John Joseph Harsany, Frank Sauk, William Joseph Yost, III
  • Patent number: 8410802
    Abstract: Systems and methods including testing of electronic components are described. One system relates to a system including a thermal control unit adapted to control the temperature of at least a portion of an electronic component during testing. The system includes at least one conduit extending through a portion of the thermal control unit, the conduit sized to permit the flow of a thermal interface material therethrough, the thermal interface material comprising a liquid. The at least one conduit is positioned so that the thermal interface material can be delivered through the conduit and onto the electronic component. The system also includes a device adapted to control the flow of the thermal interface material through the conduit, wherein the flow can be controlled to deliver the thermal interface material to the electronic component and to remove the thermal interface material from the electronic component. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 24, 2009
    Date of Patent: April 2, 2013
    Assignee: Intel Corporation
    Inventors: Ashish Gupta, James R. Hastings, Nader N. Abazarnia, Suzana Prstic, Jerome L. Garcia
  • Publication number: 20130076382
    Abstract: An apparatus and method for measurement of radiation intensity for testing reliability of a solar cell, and a method for testing the reliability of the solar cell. The apparatus includes a first solar cell receiving a predetermined intensity of radiation or more to generate electricity, a second solar cell receiving a predetermined intensity of radiation or more to generate electricity; a temperature sensor sensing a temperature of the second solar cell; a cooler cooling the first solar cell; and a controller measuring the intensity of radiation applied to the first solar cell, and controlling the cooler to prevent the temperature of the first solar cell from increasing above a predetermined temperature depending on the temperature of the second solar cell sensed by the temperature sensor.
    Type: Application
    Filed: August 3, 2012
    Publication date: March 28, 2013
    Applicant: KOREA INSTITUTE OF ENERGY RESEARCH
    Inventors: Sang-Hyun Park, Jihye Gwak, Sejin Ahn, Kyung-Hoon Yoon, Kee-Shik Shin, SeoungKyu Ahn, Ara Cho, Jae-Ho Yun, Jun-Sik Cho, Jin-Su Yoo, Joo-Hyung Park, Young-Joo Eo
  • Publication number: 20130076381
    Abstract: A method and apparatus for temperature sensor calibration is disclosed. In one embodiment, an integrated circuit (IC) is tested at a first known temperature corresponding to a first temperature threshold. During the test, a first temperature reading is obtained from a temperature sensor. A first offset is calculated by determining the difference between the first known temperature and the first temperature reading. The first offset is recorded in a storage unit for later use during operation of the IC. During operation, the first offset may be added to temperature readings obtained from a temperature sensing unit to produce an adjusted temperature value. The adjusted temperature value may be compared to one or more temperature thresholds. Based on the comparisons, a power management unit may perform power control actions.
    Type: Application
    Filed: September 26, 2011
    Publication date: March 28, 2013
    Inventors: Toshinari Takayanagi, Jung Wook Cho
  • Patent number: 8400173
    Abstract: Embodiments of probe cards and methods for fabricating and using same are provided herein. In some embodiments, an apparatus for testing a device (DUT) may include a probe card configured for testing a DUT; a thermal management apparatus disposed on the probe card to heat and/or cool the probe card; a sensor disposed on the probe card and coupled to the thermal management apparatus to provide data to the thermal management apparatus corresponding to a temperature of a location of the probe card; a first connector disposed on the probe card and coupled to the thermal management apparatus for connecting to a first power source internal to a tester; and a second connector, different than the first connector, disposed on the probe card and coupled to the thermal management apparatus for connecting to a second power source external to the tester.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: March 19, 2013
    Assignee: FormFactor, Inc.
    Inventor: Eric D. Hobbs
  • Patent number: 8384395
    Abstract: A circuit for controlling temperature of a semiconductor chip includes a first heating element that is built into the semiconductor chip. The first heating element generates heat to increase the temperature of the semiconductor chip. The chip also includes a temperature controller that is coupled to the first heating element and built into the semiconductor chip. The temperature controller controls the temperature to enable testing of the semiconductor chip at a desired temperature.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: February 26, 2013
    Assignee: Texas Instrument Incorporated
    Inventors: Ravindra Karnad, Sudheer Prasad, Ram A Jonnavithula
  • Publication number: 20130033277
    Abstract: Timing, power and SPICE analysis are performed on a circuit layout, based on temperature and stress variations or gradient across the circuit layout. Specifically, the temperature and stress values of individual window locations across the layout are used to obtain temperature and stress variation aware resistance/capacitance (RC), timing, leakage and power values. In addition, in 3D integrated circuits (IC), the stress and thermal variations or gradients of one die may be imported to another die located on a different tier.
    Type: Application
    Filed: August 3, 2011
    Publication date: February 7, 2013
    Applicant: QUALCOMM Incorporated
    Inventors: Hongmei Liao, Riko Radojcic
  • Patent number: 8368413
    Abstract: The invention relates to a method for testing several electronic components (1) of a repetitive pattern under defined thermal conditions in a prober, which comprises a chuck (10) for holding the components (1) and special holding devices (15) for holding individual probes (12). For testing, the components (1) are adjusted to a defined temperature, the probes (12) and a first electronic component (1) are positioned relative to each other by means of at least one positioning device, contact pads (3) of the electronic component (1) are subsequently contacted by the probes (12) so that the component (1) can be tested and then the positioning and the contacting can be repeated for testing another component (1) of the repetitive pattern.
    Type: Grant
    Filed: September 1, 2009
    Date of Patent: February 5, 2013
    Inventors: Stojan Kanev, Frank Fehrmann, Jens Fiedler, Claus Dietrich, Jörg Kiesewetter
  • Publication number: 20130027068
    Abstract: An apparatus includes a predetermined function circuit board having a primary area for accepting an electronic module to be tested, a secondary area coupled electrically with the primary area, and one cooperation electronic module installed on the secondary area and coupled electrically to the electronic module to define a predetermined function circuit. A thermal insulation device is installed in the primary area and is formed with a thermal insulation chamber for accepting the electronic module and thermally insulating the electronic module from the cooperation electronic module. A thermal control chip is disposed to control a testing temperature of the insulation chamber TIC, thereby providing a testing environment.
    Type: Application
    Filed: August 25, 2011
    Publication date: January 31, 2013
    Applicant: ATP ELECTRONICS TAIWAN BLVD.
    Inventors: HUNG-DA LI, Chun-Yang Chen, Chien-Chih Huang
  • Patent number: 8358145
    Abstract: Self-heating integrated circuits are provided. In one embodiment, a self-heating integrated circuit comprises a drive circuit configured to drive a device and a controller configured to selectively operate the drive circuit in a first mode or a second mode. In the first mode, the controller is configured to operate the drive circuit to drive the device and, in the second mode, the controller is configured to operate the drive circuit to heat the integrated circuit to a target temperature.
    Type: Grant
    Filed: June 19, 2009
    Date of Patent: January 22, 2013
    Assignee: Western Digital Technologies, Inc.
    Inventors: Timothy A. Ferris, John R. Agness
  • Publication number: 20130015869
    Abstract: A plurality of devices under test (DUT) are arranged in a strip tester having a temperature controlled heater block. Each DUT has a respective set of electrical test probes and a thermally conductive test probe for electrically and thermally coupling, respectively, of the strip tester to the DUTs. Temperature measurement of each of the plurality of DUTs is performed by a temperature measuring device. The temperature measuring device can be part of the test board of the strip tester and will be in thermal communications with the DUT through the thermally conductive test probe, or temperature of the DUT can be measurement with an RTD embedded in the thermally conductive test probe, thereby providing faster thermal response time.
    Type: Application
    Filed: July 11, 2011
    Publication date: January 17, 2013
    Inventors: Ronaldo Francisco, Chi Lung Wong, Tim Messang, Ezana Haile Aberra
  • Patent number: 8344743
    Abstract: A testing system for a PSU includes a test chamber and a control device. The test chamber includes a first partition with the PSU accommodated therein and a second partition with an electric load accommodated therein. The PSU is electrically connected to the electric load. The control device includes a microcontroller unit (MCU). The MCU is connected to a setting circuit and a temperature sensing circuit. The setting circuit is configured to set one of predetermined parameters. The temperature sensing circuit is capable of sensing temperature in the test chamber. The MCU is capable of automatically controlling a predetermined temperature in the test chamber and presetting a test time for testing the PSU.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: January 1, 2013
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventor: Ling-Yu Xie
  • Patent number: 8333083
    Abstract: A system to support the testing of electronic devices and a temperature control unit for the system are disclosed. A temperature controlling method for a chamber of the system is also disclosed. Low or high temperature air is supplied to the inside of the chamber when the electronic devices are tested at low or high temperature. External air is supplied to the inside of the chamber when the electronic devices are tested at room temperature.
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: December 18, 2012
    Assignee: TechWing Co., Ltd.
    Inventors: Yun-Sung Na, Tae-Hung Ku, Cheul-Gyu Boo