Including Differential Amplifier Patents (Class 330/252)
  • Patent number: 9853607
    Abstract: A low-noise amplifier comprises first and second input ports respectively configured to receive a positive and negative input voltages; first and second resonance circuit, first and second transistor; wherein a first voltage output port of the first resonance circuit is connected to the second transistor, and a second voltage output port of the second resonance circuit is connected to the first transistor, the first and second voltage output ports are crossed coupled to a second node of both the first transistor and the second transistor via a first and second capacitor respectively; the second node of the second transistor is connected to both the second input port via a third capacitor and a third node of the first transistor, and the second node of the first transistor is connected to both the first input port via a fourth capacitor and a third node of the second transistor.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: December 26, 2017
    Assignee: BEKEN CORPORATION
    Inventors: Jiazhou Liu, Dawei Guo
  • Patent number: 9837973
    Abstract: A differential input circuit (FIG. 3A) is disclosed. The circuit includes a first input terminal (drain of 310) and a second input terminal (drain of 312). A first input transistor (310) has a first control terminal and has a current path coupled to the first input terminal. A second input transistor (312) has a second control terminal and has a current path coupled to the second input terminal. A third transistor (306) has a third control terminal and has a current path between a first differential input terminal (Vin+) and the first control terminal. A fourth transistor (308) has a fourth control terminal and has a current path between a second differential input terminal (Vin?) and the second control terminal.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: December 5, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Steven Graham Brantley, Vadim Valerievich Ivanov
  • Patent number: 9813032
    Abstract: A negative impedance circuit including: a first and a second bipolar transistors having a common collector, a base of the first transistor being connected to an emitter of the second transistor; a third and a fourth bipolar transistors having a common collector, a base of the third transistor being connected with an emitter of the fourth transistor; and at least one first impedance formed of one or of a plurality of passive components coupling the common collector of the first and second transistors to the common collector of the third and fourth transistors, a base of the second transistor being coupled to the collector of the third and fourth transistors and a base of the fourth transistor being coupled to the collector of the first and second transistors.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: November 7, 2017
    Assignee: Commissariat à l'Energie Atomique et aux Energies Alternatives
    Inventors: Lotfi Batel, Jean-François Pintos, Lionel Rudant
  • Patent number: 9807189
    Abstract: A data transfer device compresses and transfers data according to a priority given to a CPU-constraint process imposing a constraint to a compression processing speed over a NW bandwidth-constraint process imposing a constraint to a transfer processing speed. It is necessary to select a compression algorithm, applied to the CPU-constraint process or the NW bandwidth-constraint process, based on a NW bandwidth, compressibility, and compression processing speed maximizing an effective throughput. When the amount of compressed data held in a temporary hold part is smaller than the predetermined value, the compressed data of the NW bandwidth-constraint process is stored in a temporary hold part. When the amount of compressed data held by the temporary hold part is larger than the predetermined value, the compressed data of the CPU-constraint process is stored in the temporary hold part. Thus, it is possible to improve an effective throughput by effectively using NW bandwidths.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: October 31, 2017
    Assignee: NEC CORPORATION
    Inventor: Masumi Ichien
  • Patent number: 9780838
    Abstract: A data communications receiver including a receiver coil, a first amplification stage coupled to the receiver coil, the first amplification circuitry to differentially amplify at least part of signal received by the receiver coil relative to a threshold, a second amplification stage coupled to receive the differentially amplified signal from the first amplification stage, the second amplification stage comprising a current mirror, and hysteretic level shifting circuitry to shift a level of part of the signal received by the receiver coil, the threshold or part of the signal received by the receiver coil and the threshold such that, in response to the at least part of the signal received by the receiver coil having crossed the threshold, a threshold crossing in the other direction is delayed.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: October 3, 2017
    Assignee: CT-Concept Technologie GmbH
    Inventors: Matthias Peter, Jan Thalheim
  • Patent number: 9774315
    Abstract: Methods and apparatus are described for a differential active inductor load for inductive peaking in which cross-coupled capacitive elements are used to cancel out, or at least reduce, the limiting effect of the gate-to-drain capacitance (Cgd) of transistors in the active inductor load. The cross-coupled capacitive elements extend the range over which the active inductor load behaves inductively and increase the quality factor (Q) of each active inductor. Therefore, the achievable inductive peaking of the load is significantly increased, which leads to providing larger signal swing across the load for a given power or, alternatively, lower power for a given signal swing.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: September 26, 2017
    Assignee: XILINX, INC.
    Inventors: Jinyung Namkoong, Wenfeng Zhang, Parag Upadhyaya
  • Patent number: 9742361
    Abstract: Disclosed here is an apparatus that comprises an amplifier having first and second input nodes, first and second resistors, a first electrostatic discharge protection circuit coupled between the first input node and the first resistor, and a second electrostatic discharge protection circuit coupled between the second input node and the second resistor.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: August 22, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Kazuhiro Yoshida, Hisayuki Nagamine
  • Patent number: 9729179
    Abstract: Systems and methods for interference cancellation in a receiver of wireless signals include receiving a signal comprising an aggressor and a desired signal. The received signal is amplified in a low noise amplifier (LNA) to generate an amplified received signal. The aggressor is extracted from the received signal in a feed-forward path between an input of the LNA and an output of the LNA, to generate an extracted aggressor and the extracted aggressor is subtracted from the amplified received signal to provide the desired signal. An amplify and rotate block in the feed-forward path is used to align a phase of the aggressor to a phase of the amplified received signal in order to enable the subtraction.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: August 8, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Mohammad Emadi, Mazhareddin Taghivand, Yann Ly-Gagnon
  • Patent number: 9722554
    Abstract: When the offsets of the first and second differential units have polarities different from each other, the first and second differential units are both set to a normal connection state, i.e., a state in which the input voltage is supplied to the first input terminal of each of the first and second differential units and the output voltage is supplied to the second input terminal of each of the first and second differential units. When the offsets of the first and second differential units have the same polarity, on the other hand, the first differential unit is set to the above normal connection state and the second differential unit is set to a chopping connection state in which the output voltage is supplied to the first input terminal and the input voltage is supplied to the second input terminal.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: August 1, 2017
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Koji Higuchi
  • Patent number: 9711109
    Abstract: A data processing apparatus includes a compressor and an output interface. The compressor generates a compressed display data by compressing a display data according to a compression algorithm. The output interface appends first indication information in a first output bitstream, appends second indication information in a second output bitstream, and outputs the first output bitstream and the second output bitstream via a display interface. The first output bitstream is derived from the compressed display data. The first indication information is set in response to the compression algorithm employed by the compressor. The first indication information is different from the second indication information. The display interface is arranged for coupling to a driver circuit.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: July 18, 2017
    Assignee: MEDIATEK INC.
    Inventors: Chi-Cheng Ju, Tsu-Ming Liu
  • Patent number: 9705451
    Abstract: An envelope tracking system is employed in a power amplification module that supports multiple frequency bands. The power amplification module includes multiple power amplification circuits, each of which includes: a first transformer to which a radio frequency signal is input; a differential amplification circuit, in which a first radio frequency signal output from transformer is input to a control electrode and in which a second radio frequency signal output from the transformer is input to a control electrode, the differential amplification circuit outputting an amplified signal obtained by amplifying a difference between the first and second radio frequency signals; and a second transformer for supplying, to the first differential amplification circuit, power-supply voltage varying according to the amplitude of the radio frequency signal and to which the first amplified signal is input.
    Type: Grant
    Filed: November 4, 2015
    Date of Patent: July 11, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kiichiro Takenaka, Tsuyoshi Sato, Masahiro Ito, Hidetoshi Matsumoto, Satoshi Tanaka
  • Patent number: 9699551
    Abstract: An analog signal processing circuit of a microphone includes a bias circuit including a first sub-circuit which receives a signal from the microphone to output a first signal and a second sub-circuit which receives a reference voltage to output a second signal. A fully differential circuit receives the first signal and the second signal to output a fully differential signal. Each of the first sub-circuit and the second sub-circuit includes a bias sub-circuit to apply a bias voltage.
    Type: Grant
    Filed: September 14, 2015
    Date of Patent: July 4, 2017
    Assignee: Hyundai Motor Company
    Inventors: Sang-Hyeok Yang, Sang Gyu Park
  • Patent number: 9634609
    Abstract: There is provided a switching circuit for an active mixer. The switching circuit comprises a first pair of parallel switching devices and a second pair of parallel switching devices. The first and second pairs of parallel switching devices are arranged in a stacked configuration between an input node at which an input current comprising a first input frequency signal is received and a pair of differential output nodes. The first pair of switching devices are controlled by a second input frequency signal. The second pair of switching devices are controlled by a phase-shifted counterpart of the second input frequency signal. A common node between the first switching devices of the first and second pairs of switching devices is electrically coupled to a common node between the second switching devices of the first and second pairs of switching devices.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: April 25, 2017
    Assignee: MediaTek Singapore Pte. Ltd
    Inventor: Carl Bryant
  • Patent number: 9635002
    Abstract: A method involving a communication device, which comprises sending a request to a communication device; receiving a response from the communication device over a local communication path; deriving a received data set from said response; determining at least one data set that had been previously transmitted to the communication device over a wireless portion of a second communication path different from the local communication path; and validating the response based on the received data set and the at least one previously transmitted data set.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: April 25, 2017
    Assignee: BCE INC.
    Inventors: Tet Hin Yeap, William G O'Brien, Sean MacLean Murray
  • Patent number: 9595931
    Abstract: An apparatus is disclosed for providing a common mode voltage to the inputs of a first differential amplifier which outputs the difference between two signals. A second differential amplifier receives the output of the first differential amplifier, and the output of the second differential amplifier is fed back to the inputs of the first differential amplifier as a common mode voltage. Since both inputs of the first differential amplifier receive the fed back common mode voltage, the first differential amplifier still outputs only the difference in the two signals, but the presence of the common mode voltage allows the first differential amplifier to operate with lower noise if the voltage levels of the inputs to the first differential amplifier vary. The second differential amplifier may be of significantly lower quality and cost than the first differential amplifier, without affecting the performance of the first differential amplifier.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: March 14, 2017
    Assignee: ESS Technology, Inc.
    Inventor: A. Martin Mallinson
  • Patent number: 9590576
    Abstract: A differential amplifier is disclosed. The differential amplifier includes: a pair of input terminals externally receiving an input signal; a first differential pair including a first transistor, a second transistor, a first resistor, and a second resistor and configured to generate a first signal; a second differential pair including a third transistor, a fourth transistor, a third resistor, and a fourth resistor and configured to generate a second signal; a current source connected to the first, second, third, and fourth resistors and configured to provide a current to the first and second differential pairs; a pair of level shifters configured to generate a shifted signal from the input signal; and a pair of output terminals externally outputting an output signal containing the first and second signals, wherein the first and second transistors receive the input signal and the third and fourth transistors receive the shifted signal.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: March 7, 2017
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Taizo Tatsumi
  • Patent number: 9577581
    Abstract: A system for amplifying a signal with active power management according to one embodiment includes a first digital to analog converter (DAC) circuit configured to provide a modulated carrier signal; a amplifier circuit coupled to the first DAC, where the amplifier circuit is configured to amplify the modulated carrier signal; an output stage circuit coupled to the amplifier circuit, where the output stage circuit is configured to provide the amplified signal to a network; a second DAC circuit configured to provide a full wave rectified envelope of the modulated carrier signal; and a switching regulator circuit including a voltage reference input coupled to the second DAC circuit, where the switching regulator circuit is configured to provide a supply voltage to the output stage circuit and the supply voltage is modulated in response to the envelope received at the voltage reference input.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: February 21, 2017
    Assignee: Intel Corporation
    Inventors: Nicholas P. Cowley, Isaac Ali, William L. Barber
  • Patent number: 9559706
    Abstract: A phase interpolator circuit includes differential pairs of transistors, current source circuits, and a transimpedance amplifier circuit. Each of the current source circuits is coupled to provide current through one of the differential pairs of transistors. The transimpedance amplifier circuit converts the current through the differential pairs of transistors into a voltage signal.
    Type: Grant
    Filed: July 6, 2010
    Date of Patent: January 31, 2017
    Assignee: Altera Corporation
    Inventor: Wilfred Wee Kee King
  • Patent number: 9521218
    Abstract: A method for optimizing migration efficiency of a data file over network is provided. Specifically, a total time of compression time of the data file, transfer time of the data file over the network, and decompression time of the data file, is minimized by adaptively selecting compression methods to compress each data block of the data file. For selecting a compression method for a data block, information entropy of the data block is analyzed, and a real status of computing and system resources is considered. Further, trade-off among the resource usage, compassion speed and compression ratio is made to calculate an optimized transmission solution over the network for each data block of the data file.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: December 13, 2016
    Assignee: International Business Machines Corporation
    Inventors: Liya Fan, Yong Deng Hu, He Yuan Huang, Chen Tian, Jian Wang, Zhe Yan, Ke Zhang
  • Patent number: 9520849
    Abstract: A primary differential input pair of transistors and a secondary differential input pair of transistors are capable of operating in parallel to provide load current. A level-shifting pre-stage to the secondary differential pair downwardly level-shifts rail-to-rail input signals. Doing so prevents the secondary differential pair from entering cut-off. A tail current shunt device provides tail current to the secondary differential pair as the primary differential pair approaches cut-off when a common-mode component of the input signals approaches the positive voltage rail. Consequently, the sum of currents through first differential input transistors associated with the primary and secondary differential input pairs remains constant to the first load. Likewise, the sum of currents through the second differential input transistors associated with the primary and secondary differential input pairs remains constant to the second load.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: December 13, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Saju Mathew Alex
  • Patent number: 9510108
    Abstract: A circuit module for a silicon condenser microphone of the present disclosure includes a transducer, a charge pump, an isolator, a first amplifier, a second amplifier, a reaction circuit, a first bias circuit, and a second bias circuit. The charge pump electrically connects to an input port of the transducer, and an output port of the transducer electrically connects to an input port of the first amplifier via the isolator. An output port of the first amplifier electrically connects to an input port of the second amplifier. The reaction circuit is arranged between the output port of the first amplifier and the input port of the transducer. The isolator isolates the direct-current components of the first electrical signal, and therefore, the oscillations of the direct-current components will not affect the performance of the first amplifier.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: November 29, 2016
    Assignee: AAC Technologies Pte. Ltd.
    Inventors: Dong Han, Chua TiongKee, Roger Tay, Tan Siew Seong
  • Patent number: 9490761
    Abstract: An amplifier includes a pair of transistors connected in a differential stage, and a bias current source connected to a common node of the differential stage. A slew-rate compensation circuit is configured to derive from the common node a dynamic compensation current during a phase in which the voltage of the common node varies.
    Type: Grant
    Filed: January 13, 2015
    Date of Patent: November 8, 2016
    Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Philippe Maige, Pawel Fiedorow
  • Patent number: 9473091
    Abstract: A differential amplifier having a tunable filter is disclosed. The tunable filter may attenuate some common-mode signals while not affecting amplification of differential signals. The tunable filter may include a resonant circuit to select frequencies of common-mode signals to attenuate. The resonant circuit may include a variable capacitor series-coupled to an inductor. A resonant frequency of the resonant circuit may be determined, in part, by a capacitance value of the variable capacitor.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: October 18, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Muhammad Hassan, Bhushan Shanti Asuri, Apsara Ravish Suvarna, Youngchang Yoon
  • Patent number: 9444488
    Abstract: A signal modulation circuit includes a feedback circuit configured to generate the feedback signal for feeding back a drive signal from a driver circuit to an input signal. The feedback circuit includes at least first and second resistors connected together in series, the second resistor having a higher resistance value than that of the first resistor. One end of the first resistor is connected to a subtracter, and one end of the second resistor is connected to the driver circuit. A first line distance as the line length between one end of the first resistor and the subtracter and a second line distance as the line length between one end of the second resistor and the driver circuit are set shorter than a third line distance as the line length between the other end of the first resistor and the other end of the second resistor.
    Type: Grant
    Filed: April 12, 2016
    Date of Patent: September 13, 2016
    Assignee: Onkyo Corporation
    Inventors: Tsuyoshi Kawaguchi, Yoshinori Nakanishi
  • Patent number: 9438176
    Abstract: Provided is a low noise amplifier. The low noise amplifier includes an input transistor receiving and amplifying a signal, an output transistor amplifying the signal amplified by the input transistor, and an inverting unit inverting the signal which is amplified by the input transistor and applying the inverted signal to a gate of the output transistor.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: September 6, 2016
    Assignee: Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Junyoung Jang, Honggul Han, Tae Wook Kim
  • Patent number: 9429972
    Abstract: A low dropout regulator comprises an output transistor with a controlled section between a first supply terminal and an output terminal, and a differential amplifier comprising a feedback input coupled to the output terminal, a reference input receiving a reference voltage, an output connected to a control terminal of the output transistor, and a pair of input transistors connected to a tail current source. A control terminal of a first transistor is connected to the reference input. A control terminal of a second transistor is connected to the feedback input. A first capacitive element is coupled between the output terminal and common connection of the input transistors of one pair with their tail current source. A second capacitive element is coupled between a second supply terminal and the common connection of the input transistors of one pair with their tail current source.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: August 30, 2016
    Assignee: AMS AG
    Inventors: Carlo Fiocchi, Paolo Draghi
  • Patent number: 9344035
    Abstract: In accordance with an embodiment, an oscillator includes a tank circuit and an oscillator core circuit having a plurality of cross-coupled compound transistors coupled to the tank circuit. Each of the plurality of compound transistors includes a bipolar transistor and a field effect transistor (FET) having a source coupled to a base of the bipolar transistor.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: May 17, 2016
    Assignee: Infineon Technologies AG
    Inventors: Andrea Bevilacqua, Marc Tiebout
  • Patent number: 9344048
    Abstract: An operational amplifier comprises an input pair, an aiding unit, an even number of amplification stages, a feeding unit, a first current source, a second current source. Both the input pair and the aiding unit are connected to the first current source. The input pair receives differential input voltage. Both the input pair and the aiding unit are further connected to a first stage of the even number of amplification stages. The even number of amplification stages are connected in series, and the last stage of the amplification stages outputs differential output voltages. The feeding unit is configured to receive a common mode voltage of the differential output voltages, and feeds a voltage on a first node of the feeding unit back to the aiding unit so as to provide bias voltage to the aiding unit. The aiding unit avoids dead lock of the input pair.
    Type: Grant
    Filed: March 1, 2015
    Date of Patent: May 17, 2016
    Assignee: BEKEN CORPORATION
    Inventors: Jiazhou Liu, Dawei Guo
  • Patent number: 9331576
    Abstract: A dual-polarity multiple-output boost converter that includes an inductor coupled in series between a high-side switch and a low-side switch. A first terminal of the inductor is coupled to an output of the high-side switch and the second terminal of the inductor is coupled to an input of the low side switch, with an output of low-side switch being coupled to a reference terminal. A plurality of outputs provide a plurality of output voltages, including a first plurality of outputs to provide a first plurality of different output voltages having a first polarity and at least one second output to provide at least one second output voltage having a second polarity opposite the first polarity. A control circuit is coupled to the high-side switch and the low-side switch to control an on-time of the high-side switch and the low-side switch.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: May 3, 2016
    Assignee: ADVANCED ANALOGIC TECHNOLOGIES INCORPORATED
    Inventor: Richard K. Williams
  • Patent number: 9319186
    Abstract: One embodiment relates to a method performed by on-die instrumentation. Speculative-high and speculative-low error signals are generated using first and second sense amplifiers. The speculative-high and speculative-low error signals are deserialized to generate speculative-high and speculative-low error data. A subset of bits in the speculation-high and speculation-low error data are determined to be invalid based on prior bits in recovered data obtained using a clock-data recovery and decision feedback equalizer circuit. Another embodiment relates to an integrated circuit with on-die instrumentation for obtaining bit error data for an eye-opening diagram. The integrated circuit includes a voltage multiplexer, a clock multiplexer and first and second sense amplifiers. Other embodiments, aspects and features are also disclosed.
    Type: Grant
    Filed: April 4, 2014
    Date of Patent: April 19, 2016
    Assignee: Altera Corporation
    Inventor: Allen K. Chan
  • Patent number: 9236855
    Abstract: A comparator has a differential pair circuit and a current control circuit. The differential pair circuit has first and second comparator transistors, and is arranged to compare a first input and a second input according to a clock signal to generate a result indicating whether a difference of the first and second inputs exceeds an internal offset. The current control circuit is coupled in series with the differential pair circuit, and configured to provide unequal abilities of drawing currents for the first and second comparator transistors. An amplifier circuit is also disclosed, having a differential pair circuit, a current control circuit, an amplification circuit and a reset circuit.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: January 12, 2016
    Assignee: MEDIATEK INC.
    Inventor: Yun-Shiang Shu
  • Patent number: 9236841
    Abstract: An integrated, fully-differential current-feedback transimpedance operational amplifier circuit is disclosed. The circuit can be configured as a class-AB, low-impedance input stage, followed by an inverter-based, rail-to-rail output stage. For enhancing the open-loop transimpedance gain of the amplifier without consuming additional DC power, the same bias current is used both in the input stage and in a gain-enhancement stage serving as its load. The gain-enhancement stage can be either DC- or AC-coupled to the input of the amplifier. In the case of DC coupling, an output common-mode feedback loop can be used to provide the proper operating voltages in the amplifier.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: January 12, 2016
    Assignee: Analog Devices, Inc.
    Inventor: Alexandru A. Ciubotaru
  • Patent number: 9197195
    Abstract: A driver includes a first driver stage having a first T-coil structure. The first T-coil structure includes a first set of inductors each being operable to provide a first inductance. The first T-coil structure further includes a second set of inductors electrically coupled with the first set of inductors, wherein the second set of inductors each are operable to provide a second inductance.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: November 24, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Chieh Huang, Tao Wen Chung, Chan-Hong Chern, Chih-Chang Lin, Yuwen Swei, Chiang Pu
  • Patent number: 9179137
    Abstract: A gate driver and an organic light emitting diode (OLED) display including the gate driver are disclosed. The gate driver includes a shift register block including a plurality of cascade-connected shift registers, a selection block including a plurality of selection units, which are respectively connected to the plurality of shift registers, and a buffer block including a plurality of buffers, which are respectively connected to the plurality of selection units. Each of the shift registers outputs a scan pulse, whose a phase is shifted by one horizontal period, in response to a start voltage, a first clock, a second clock, and a third clock.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: November 3, 2015
    Assignee: LG Display Co., Ltd.
    Inventors: Hyunhaeng Lee, Kisu Park, Joongsun Yoon
  • Patent number: 9103860
    Abstract: A system for measuring electrical charge, comprising a capacitance detector (110) connected to a charge integrator (120) being an operational amplifier with a capacitance feedback (130), in which the input stage (121) of the charge integrator (120) comprises a pair of symmetrically connected JFET-type transistors (T1; T2), having gates connected to the input of the charge integrator (120).
    Type: Grant
    Filed: February 22, 2012
    Date of Patent: August 11, 2015
    Assignee: UNIWERSYTET JAGIELLONSKI
    Inventors: Zbigniew Sosin, Maciej Sosin, Marek Adamczyk
  • Patent number: 9054657
    Abstract: In an amplifier, a first stage receives a differential input voltage, which is formed by first and second input voltages, and outputs a first differential current in response thereto on first and second lines having respective first and second line voltages. A second stage receives the first and second line voltages and outputs a second differential current in response thereto on third and fourth lines having respective third and fourth line voltages. A third stage receives the third and fourth line voltages and outputs an output voltage in response thereto. A slew boost circuit detects a slew condition, in which a threshold difference arises between the first and second input voltages, and outputs a slew current in response thereto for maintaining a slew rate of the output voltage during the slew condition. The first stage includes circuits for reducing a variable difference between the first and second line voltages.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: June 9, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Vaibhav Kumar, Vadim Valerievich Ivanov
  • Publication number: 20150130539
    Abstract: A quasi-differential amplifier with an input port and an output port. The amplifier has a phase shifter network with a first port connected to the input port, a second port, and a third port. A first amplifier has an input connected to the second port of the phase shifter network, and an output, and a second amplifier has an input connected to the third port of the phase shifter network, and an output. A balun circuit includes a first differential port connected to an output of the first amplifier, a second differential port connected to an output of the second amplifier, and a single-ended port. An output matching network is connected to the single-ended port of the balun circuit and to the output port.
    Type: Application
    Filed: November 12, 2014
    Publication date: May 14, 2015
    Inventor: OLEKSANDR GORBACHOV
  • Publication number: 20150130536
    Abstract: A mixer comprising a ladder having at least two resistances arranged in series and an input configured to receive an input signal and apply it across the ladder, said ladder including an output arrangement comprising at least three branches, a first branch branching from a first end of the ladder, a second branch branching from between the at least two resistances and a third branch branching from a second end of the ladder, opposite the first end, each branch including a switch for controlling a connection between its branch and an output.
    Type: Application
    Filed: October 28, 2014
    Publication date: May 14, 2015
    Inventor: Robert Hendrikus Margaretha van Veldhoven
  • Patent number: 9031517
    Abstract: The present invention discloses a transmit-receive (TR) front end. The TR front end includes a low-noise amplifier (LNA); a power amplifier (PA); a transformer, coupled to the PA, for increasing a voltage swing and a power transmission of the PA; and a TR switch, coupled between the transformer and the LNA. The LNA is single ended and there is no transformer between the LNA and the TR switch.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: May 12, 2015
    Assignee: Mediatek
    Inventors: Albert Chia-Wen Jerng, Wen-Kai Li, Chien-Cheng Lin
  • Patent number: 9019013
    Abstract: Provided is a power amplifier which includes: a first transistor and a second transistor each having a first end connected to a first power source supplying a first voltage and to which signals having a same size but opposite polarities are input; a third transistor and a fourth transistor having first ends respectively connected to the first ends of the first transistor and the second transistor; and a fifth transistor having a first end connected to second ends of the third and fourth transistors and controlling oscillation of the third or fourth transistor.
    Type: Grant
    Filed: October 13, 2011
    Date of Patent: April 28, 2015
    Assignee: Soongsil University Research Consortium Techno-Park
    Inventors: Jong Hoon Park, Chang Kun Park
  • Publication number: 20150109007
    Abstract: A differential amplifier is described that provides a high common mode rejection ration (CMRR) without requiring the use of precisely matched components. One variation employs a method of noise reduction to increase the SNR of the device. The differential amplifier may be used in an apparatus for measuring biopotentials of a patient, such as an electrode for measuring brain activity. The electrodes can communicate the measured biopotentials with a remote system for further processing, while providing electrical isolation to the patient.
    Type: Application
    Filed: March 29, 2012
    Publication date: April 23, 2015
    Inventor: George Townsend
  • Patent number: 9007096
    Abstract: An apparatus relating generally to voltage conversion includes an amplifier coupled to receive an input voltage and a reference voltage. First and second converters are coupled to the amplifier to receive a bias voltage. The first converter includes a first transconductor coupled to receive the bias voltage to adjust a first tail current, and a first differential input. A first inverter of the first converter has a first feedback device coupled input-to-output to provide a first transimpedance amplifier load. The first inverter is coupled to the first transconductor. The second converter includes a second transconductor coupled to receive the bias voltage to adjust a second tail current, and a second differential input. A second inverter of the second converter has a second feedback device coupled input-to-output to provide a second transimpedance amplifier load. The second inverter is coupled to the second transconductor.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: April 14, 2015
    Assignee: Xilinx, Inc.
    Inventors: Declan Carey, Thomas Mallard, Mark Smyth, James Hudner
  • Patent number: 9008332
    Abstract: A processing chip for a digital microphone and related input circuit and a digital microphone are described herein. In one aspect, the input circuit for a processing chip of a digital microphone includes: a PMOS transistor, a resistor, a current source, and a low-pass filter. The described processing chip possesses high anti high-frequency interference capabilities and the described input circuit possesses high high-frequency power supply rejection ratio.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: April 14, 2015
    Assignee: Beijing KT Micro, Ltd.
    Inventors: Wenjing Wang, Jianting Wang, Rongrong Bai, Jing Cao
  • Publication number: 20150092510
    Abstract: According to at least one example embodiment, a method and corresponding system for calibrating an amplifier offset include applying an input value to both input leads of an amplifier. The amplifier includes one or more digital-to-analog converters (DACs) used to calibrate an offset of the amplifier. A digital value, provided as input to the DAC, is updated over a number of iterations, by a control logic coupled to the amplifier, based on an output of the amplifier. A final value of the digital value being updated, e.g., associated with the last iteration, is employed as input to the DAC of the one or more DACs in the amplifier for calibrating the offset of the amplifier during a data reception phase.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 2, 2015
    Applicant: Cavium, Inc.
    Inventors: Omer O. Yildirim, David Lin, Scott E. Meninger
  • Patent number: 8994451
    Abstract: An RF amplifier suitable for use in an RF transceiver has a circuit including a first transistor pair with the collector of each coupled to one of the two differential output nodes and a common base. A pair of Ft doublers is provided with the emitter of each Ft doubler coupled to one of the transistors in the first transistor pair. Each Ft doubler has a common emitter and a base coupled to one of the differential input nodes. As such, the first transistor pair and the Ft doubler pair are cascode-coupled to provide a wide bandwidth, high gain, and high input impedance RF amplifier.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 31, 2015
    Assignee: Rockwell Collins, Inc.
    Inventors: Russell D. Wyse, Michael L. Hageman, Max S. Hawkins, Jr.
  • Patent number: 8988173
    Abstract: A differential circuit topology that produces a tunable floating negative inductance, negative capacitance, negative resistance/conductance, or a combination of the three. These circuits are commonly referred to as “non-Foster circuits.” The disclosed embodiments of the circuits comprises two differential pairs of transistors that are cross-coupled, a load immittance, multiple current sources, two Common-Mode FeedBack (CMFB) networks, at least one tunable (variable) resistance, and two terminals across which the desired immittance is present. The disclosed embodiments of the circuits may be configured as either a Negative Impedance Inverter (NII) or a Negative Impedance Converter (NIC) and as either Open-Circuit-Stable (OCS) and Short-Circuit-Stable (SCS).
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: March 24, 2015
    Assignee: HRL Laboratories, LLC
    Inventors: Donald A. Hitko, Carson R. White, Michael W. Yung, David S. Matthews, Susan L. Morton, Jason W. May, Joseph S. Colburn
  • Patent number: 8988148
    Abstract: A transconductance amplifier has a pair of input terminals and a pair of output terminals. A first pair of transconductors is connected to the input terminals and the output terminals. A second pair of transconductors has inputs connected to output terminals, and outputs connected to the opposing output terminals. A third pair of transconductors has both its inputs and its outputs connected to the output terminals. One or more of the transconductors have a control port for a control signal to adjust its transconductance. The control signal may switch the transconductance of this or these transconductors between two or more values. One or more of the transconductors in the transconductance amplifier may include a tri-state inverter, which may be enabled or disabled through a control port.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: March 24, 2015
    Inventors: Julian Jenkins, Torsten Lehmann, James Paul Koeppe
  • Publication number: 20150078420
    Abstract: An amplification circuit (100) comprising a first filter (102) and an LNA (110). The first filter (102) comprising an input (104) for receiving an input signal; a first differential output (106); and a second differential output (108). The first filter (102) has a differential mode of operation for frequencies in its pass-band (706, 806) and a common mode of operation for frequencies outside its pass-band (706, 806), and may be an acoustic wave filter. The LNA (110) comprising a first differential input (112) connected to the first differential output (106) of the first filter (102); a second differential input (114) connected to the second differential output (108) of the first filter (102); and an output (116) for providing an amplified output signal.
    Type: Application
    Filed: July 29, 2014
    Publication date: March 19, 2015
    Inventors: Marcel Geurts, Louis Praamsma, Michel Groenewegen, Rainier Breunisse, Freek van Straten, Robert Buytenhuijs
  • Patent number: 8981798
    Abstract: An electronic system comprises a resistive sensor structure and an electronic circuit portion whose design is selected such that different resistive sensor structures may be combined within the same electronic circuit. To this end, the resistive sensor structure is used as a voltage/current converter that provides input currents to a current amplifier, which in turn provides an amplified output voltage on the basis of a difference of the input currents. The operating range of the current amplifier is adjusted on the basis of a programmable current source irrespective of the configuration of the resistive sensor structure.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: March 17, 2015
    Assignee: STMicroelectronics S.r.l.
    Inventor: Antonino Scuderi
  • Publication number: 20150063048
    Abstract: A device includes an amplifier and a first switched current sampler. The first switched current sampler includes a first transistor, a first capacitor, and first, second, and third switches. The first capacitor has a first terminal electrically connected to a gate electrode of the first transistor, and a second terminal electrically connected to a source electrode of the first transistor. The first switch has a first terminal electrically connected to a first current source, and a second terminal electrically connected to the gate electrode of the first transistor. The second switch has a first terminal electrically connected to the first current source, and a second terminal electrically connected to a drain electrode of the first transistor. The third switch has a first terminal electrically connected to the drain electrode of the first transistor, and a second terminal electrically connected to a first input terminal of the amplifier.
    Type: Application
    Filed: September 3, 2013
    Publication date: March 5, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ku-Feng Lin, Hung-Chang Yu, Yue-Der Chih