Abstract: According to one embodiment, a method of manufacturing a semiconductor device, the method includes forming a pillar on a base layer, forming a insulating layer on the base layer to cover the pillar by using GCIB method, where a lowermost portion of an upper surface of the insulating layer is lower than an upper surface of the pillar, and polishing the insulating layer and the pillar to expose a head of the pillar by using CMP method, where an end point of the polishing is the lowermost portion of the upper surface of the insulating layer.

Abstract: A method for fabricating a semiconductor device is disclosed. The method includes forming a gate stack over a substrate, forming spacers adjoining opposite sidewalls of the gate stack, forming a sacrificial layer adjoining the spacers, removing a portion of the sacrificial layer, removing a portion of the spacers to form a recess cavity below the left spacers. Then, a strain feature is formed in the recess cavity. The disclosed method provides an improved method by providing a space between the spacer and the substrate for forming the strained feature, therefor, to enhance carrier mobility and upgrade the device performance.

Abstract: A disclosed fabrication method of a semiconductor device includes steps of depositing a dielectric film on a semiconductor substrate; thermally treating the dielectric film; and irradiating an ionized gas cluster onto the thermally treated dielectric film.

Abstract: An amorphous carbon film, which has excellent etching resistance and is capable of reducing reflectance when a resist film is exposed to light, is form. A method for manufacturing a semiconductor device includes forming an object film to be etched on a wafer, supplying a process gas containing a CO gas and an N2 gas into a processing container, forming an amorphous carbon nitride film from the supplied CO gas and N2 gas, forming a silicon oxide film on the amorphous carbon nitride film, forming an ArF resist film on the silicon oxide film, patterning the ArF resist film, etching the silicon oxide film by using the ArF resist film as a mask, etching the amorphous carbon nitride film by using the silicon oxide film as a mask, and etching the object film to be etched by using the amorphous carbon nitride film as a mask.

Abstract: A process for fabricating a semiconductor device is described. A silicon oxide layer is formed. A nitridation process including at least two steps is performed to nitridate the silicon oxide layer into a silicon oxynitride (SiON) layer. The nitridation process comprises a first nitridation step and a second nitridation step in sequence, wherein the first nitridation step and the second nitridation step are different in the setting of at least one parameter.

Abstract: A semiconductor device includes an interlayer insulating film containing Si, O, C, and H, an under-bump metal film disposed over the interlayer insulating film and containing Ni, and a bump electrode disposed over the under-bump metal film. In the interlayer insulating film, a ratio of a peak height of Si—CH3 near a wave number 1270 cm?1 to a peak height of Si—O near a wave number 1030 cm?1 obtained by Fourier-transform infrared spectroscopy (FTIR) is 0.15 or greater and 0.27 or less. A ratio of a peak height of Si—CH2—Si near a wave number 1360 cm?1 to the peak height of Si—CH3 near the wave number 1270 cm?1 is 0.031 or greater.

Abstract: A semiconductor device and method for making such that provides improved mechanical strength is disclosed. The semiconductor device comprises a semiconductor substrate; an adhesion layer disposed over the semiconductor substrate; and a porous low-k film disposed over the semiconductor substrate, wherein the porous low-k film comprises a porogen and a composite bonding structure including at least one Si—O—Si bonding group and at least one bridging organic functional group.

Abstract: In some embodiments, the present invention discloses a gate dielectric deposition process, including depositing a fluorinated hafnium oxide by an ALD process utilizing a fluorinated hafnium precursor and an oxidant. A two-step ALD deposition process can be used, including a fluorinated hafnium oxide layer deposition followed by a hafnium oxide layer deposition. Hafnium oxide can provide high dielectric constant, high density, large bandgap and good thermal stability. Fluorinated hafnium oxide can passivate interface states and bulk traps in the hafnium oxide, for example, by forming Si—F or Hf—F bonds, which can improve the reliability of the hafnium oxide gate dielectrics.

Abstract: It is an object of the present invention to provide a method of and an apparatus for manufacturing a tunnel barrier layer or a gate insulator film with good film quality and film thickness uniformity. The present invention is characterized in that, a shield is configured to shield a region of a substrate to which an erosion region of a target is projected along a normal from a surface of the target and sputtered particles are configured to deposit on the substrate linearly moved when passing through an opening formed in the shield.

Abstract: A method for producing a low temperature polycrystalline silicon thin film, comprising steps of: providing a substrate; forming a thermal conduction and electrical insulation layer, a buffer layer and an amorphous silicon layer on the substrate in this order; and performing a high-temperature treatment and a laser annealing on the amorphous silicon layer to convert the amorphous silicon layer to a polycrystalline silicon thin film, wherein the thermal conduction and electrical insulation layer comprises regular patterns distributed on the substrate.

Abstract: Methods of depositing a film on a substrate surface include surface mediated reactions in which a film is grown over one or more cycles of reactant adsorption and reaction. In one aspect, the method is characterized by the following operations: (a) exposing the substrate surface to a first reactant in vapor phase under conditions allowing the first reactant to adsorb onto the substrate surface; (b) exposing the substrate surface to a second reactant in vapor phase while the first reactant is adsorbed on the substrate surface; and (c) exposing the substrate surface to plasma to drive a reaction between the first and second reactants adsorbed on the substrate surface to form the film.

Abstract: A method of processing a semiconductor workpiece includes placing a back surface of the workpiece on a workpiece support in a chamber so that the front surface of the workpiece faces into the chamber for processing, and the back surface is in fluid communication with a back region having an associated back gas pressure. The method further includes performing a workpiece processing step at a first chamber pressure Pc1 and a first back pressure Pb1, wherein Pc1 and Pb1 give rise to a pressure differential, Pb1?Pc1, and performing a workpiece cooling step at a second chamber pressure Pc2 and a second back pressure Pb2, wherein Pc2 and Pb2 are higher than Pc1 and Pb1, respectively.

Abstract: A method for manufacturing a semiconductor device includes providing a substrate having a mask layer formed thereon, providing a first photomask having a first layout pattern and a second photomask having a second layout pattern, the first layout pattern including a plurality of active area portions and at least a neck portion connecting two adjacent active area portions, transferring the first layout pattern from the first photomask to the mask layer to form a plurality of active area patterns and at least a neck pattern connecting two adjacent active area patterns in the mask layer, and transferring the second layout pattern from the second photomask to the mask layer to remove the neck pattern to form a patterned mask. The patterned mask includes the active area patterns. A slot is at least formed between the two adjacent active area patterns.

Abstract: A method of forming a dielectric film having Si—C bonds and/or Si—N bonds on a semiconductor substrate by cyclic deposition, includes: (i) conducting one or more cycles of cyclic deposition in a reaction space wherein a semiconductor substrate is placed, using a Si-containing precursor and a reactant gas; and (ii) before or after step (i), applying a pulse of RF power to the reaction space while supplying a rare gas and a treatment gas without supplying a Si-containing precursor, whereby a dielectric film having Si—C bonds and/or Si—N bonds is formed on the semiconductor substrate.

Abstract: Method for the oriented crystallization of materials. The present invention relates to a method useful for orienting the crystallization of a material over a surface zone of at least one face of a substrate, comprising at least the steps consisting in: i. determining, on said face, the surface over which the crystalline deposit must be formed, referred to as the zone of interest, ii. depositing, on said face and at the periphery of said zone of interest, at least one particle dedicated to forming a crystallization nucleus, iii. bringing said particle into contact with at least said material to be crystallized, iv.

Abstract: Methods of improving charge trapping are disclosed. One such method includes forming an oxide-nitride-oxide tunnel stack and a silicon nitride layer on the oxide-nitride-oxide tunnel stack. This silicon nitride layer is implanted with ions. These ions may function as electron traps or as fields. The silicon nitride layer may be part of a flash memory device.

Abstract: Methods of forming a semiconductor device are provided. The methods include, for example, forming a low-k dielectric having a continuous planar surface, and, after forming the low-k dielectric, subjecting the continuous planar surface of the low-k dielectric to an ethylene plasma enhanced chemical vapor deposition (PECVD) treatment.

Abstract: Embodiments of the present invention provide methods of in-situ vapor phase deposition of self-assembled monolayers as copper adhesion promoters and diffusion barriers. A copper region is formed in a dielectric layer. A diffusion barrier comprising a self-assembled monolayer is deposited over the copper region. A capping layer is deposited over the self-assembled monolayer. In some embodiments, the capping layer and self-assembled monolayer are deposited in the same process chamber.

Abstract: One illustrative method disclosed herein includes forming a mandrel structure above a semiconductor substrate, performing an oxidation process to oxidize at least a portion of the mandrel structure so as to thereby define oxidized regions on the mandrel structure, removing the oxidized regions to thereby defined a reduced thickness mandrel structure, forming a plurality of fins on the reduced thickness mandrel structure and performing an etching process to selectively remove at least a portion of the reduced thickness mandrel structure so as to thereby expose at least a portion of each of the fins.

Abstract: Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another.

Abstract: A sol composition for producing a porous low-k dielectric material is provided. The composition can include at least one silicate ester, a polar solvent, water, an acid catalyst for silicate ester hydrolysis, an amphiphilic block copolymer surfactant, and a nonmetallic catalyst that reduces dielectric constant in the produced material. The composition can further include a metallic ion at a lower parts-per-million concentration than the nonmetallic catalyst, and/or the composition can further include a cosolvent. A method of preparing a thin film on a substrate using the sol composition is also provided.

Abstract: A method for forming a silicon germanium oxide thin film on a substrate in a reaction space may be performed using an atomic layer deposition (ALD) process. The process may include at least one cycle comprising a germanium oxide deposition sub-cycle and a silicon oxide deposition sub-cycle. The germanium oxide deposition sub-cycle may include contacting the substrate with a germanium reactant, removing excess germanium reactant, and contacting the substrate with a first oxygen reactant. The silicon oxide deposition sub-cycle may include contacting the substrate with a silicon reactant, removing excess silicon reactant, and contacting the substrate with a second oxygen reactant. The films of the present disclosure exhibit desirable etch rates relative to thermal oxide. Depending on the films' composition, the etch rates may be higher or lower than the etch rates of thermal oxide.

Abstract: The present invention provides polyimide polymer materials for passivating semiconductor wafers and methods for fabricating thereof. The present invention further provides a device that includes a semiconductor wafer and a passivating layer disposed on the surface of the wafer, wherein the passivating layer comprises such polyimide polymers.

Abstract: BEOL memory cells are described that include one or more sidewall protection layers on the memory device (including, for example, an MTJ element) deposited prior to interconnect via etching to prevent the formation of electrical shorts between layers. One embodiment uses a single layer sidewall protection sleeve that is deposited after the memory device has been patterned. The layer material is vertically etched down to expose the upper surface of the top electrode while leaving a residual layer of protective material surrounding the rest of the memory device. The material for the protection layer is selected to resist the etchant used to remove the first dielectric material from the via in the subsequent interconnect process. A second embodiment uses dual-layer sidewall protection in which the first layer covers the memory element is preferably an oxygen-free dielectric and the second layer protects the first layer during via etching.

Abstract: The embodiments herein focus on plasma enhanced atomic layer deposition (PEALD) processes using pulsed plasmas. While conventional PEALD processes use continuous wave plasmas during the plasma exposure/conversion operation, the embodiments herein utilize a pulsed plasma during this operation to achieve a film with high quality sidewalls. Because conventional PEALD techniques result in films having high quality at the bottom and top of a feature, but low quality on the sidewalls, this increased sidewall quality in the disclosed methods corresponds to a film that is overall more uniform in quality compared to that achieved with conventional continuous wave plasma techniques.

Abstract: Methods and compositions for depositing rare earth metal-containing layers are described herein. In general, the disclosed methods deposit the precursor compounds comprising rare earth-containing compounds using deposition methods such as chemical vapor deposition or atomic layer deposition. The disclosed precursor compounds include a cyclopentadienyl ligand having at least one aliphatic group as a substituent and an amidine ligand.

Abstract: Described herein are methods of forming dielectric films comprising silicon, such as, but not limited to, silicon oxide, silicon oxycarbide, silicon carbide, and combinations thereof, that exhibit at least one of the following characteristics: low wet etch resistance, a dielectric constant of 6.0 or below, and/or can withstand a high temperature rapid thermal anneal process. Also disclosed herein are the methods to form dielectric films or coatings on an object to be processed, such as, for example, a semiconductor wafer.

Abstract: Described herein are methods of forming dielectric films comprising silicon, oxide, and optionally nitrogen, carbon, hydrogen, and boron. Also disclosed herein are the methods to form dielectric films or coatings on an object to be processed, such as, for example, a semiconductor wafer.

Abstract: Provided herein are methods and apparatus for filling one or more gaps on a semiconductor substrate. The disclosed embodiments are especially useful for forming seam-free, void-free fill in both narrow and wide features. The methods may be performed without any intervening etching operations to achieve a single step deposition. In various implementations, a first operation is performed using a novel PEALD fill mechanism to fill narrow gaps and line wide gaps. A second operation may be performed using PECVD methods to continue filling the wide gaps.

Abstract: A method for forming an aluminum titanium nitride layer on a wafer by plasma-enhanced physical vapor deposition including a first step at a radio frequency power ranging between 100 and 500 W only, and a second step at a radio frequency power ranging between 500 and 1,000 W superimposed to a D.C. power ranging between 500 and 1,000 W. An insulated gate comprising such an aluminum titanium nitride layer.

Abstract: A method of forming metal carbide barrier layers for fluorocarbon films in semiconductor devices is described. The method includes depositing a fluorocarbon film on a substrate and depositing a metal-containing layer on the fluorocarbon film at a first temperature, where the metal-containing layer reacts with the fluorocarbon film to form a metal fluoride layer at an interface between the metal-containing layer and the fluorocarbon film. The method further includes heat-treating the metal-containing layer at a second temperature that is greater than the first temperature, wherein the heat-treating the metal-containing layer removes fluorine from the metal fluoride layer by diffusion through the metal-containing layer and forms a metal carbide barrier layer at the interface between the metal-containing layer and the fluorocarbon film, and wherein the metal-containing layer survives the heat-treating at the second temperature without blistering or pealing.

Abstract: The present invention provides methods and apparatuses for improving adhesion of dielectric and conductive layers on a substrate to the underlying layer. The methods involve passing a process gas through a plasma generator downstream of the substrate to create reactive species. The underlying layer is then exposed to reactive species that interact with the film surface without undesirable sputtering. The gas is selected such that the interaction of the reactive species with the underlying layer modifies the surface of the layer in a manner that improves adhesion to the subsequently formed overlying layer. During exposure to the reactive species, the substrate and/or process gas may be exposed to ultraviolet radiation to enhance surface modification. In certain embodiments, a single UV cure tool is used to cure the underlying film and improve adhesion.

Abstract: A method of manufacturing a semiconductor device has: carrying a substrate into a process chamber; depositing a thin film on the substrate by supplying inside the process chamber a first film deposition gas including at least one element among plural elements forming a thin film to be deposited and capable of accumulating a film solely and a second film deposition gas including at least another element among the plural elements and incapable of accumulating a film solely; carrying the substrate on which is deposited the thin film out from inside the process chamber; and removing a first sediment adhering to an interior of the process chamber and a second sediment adhering to an interior of the supply portion and having a chemical composition different from a chemical composition of the first sediment by supplying cleaning gases inside the process chamber and inside a supply portion that supplies the first film deposition gas while changing at least one of a supply flow rate, a concentration, and a type betwee

Abstract: Provided are: forming a thin film made of a specific element alone on a substrate by performing a specific number of times a cycle of: supplying a first source to the substrate, the first source containing the specific element and a halogen-group; and supplying a second source to the substrate, the second source containing the specific element and an amino-group, and having amino-group-containing ligands whose number is two or less in its composition formula and not more than the number of halogen-group-containing ligands in the composition formula of the first source.

Abstract: A method of manufacturing a semiconductor device includes forming a thin film containing a predetermined element, oxygen, carbon, and nitrogen on a substrate by performing a cycle a predetermined number of times. The cycle includes supplying a predetermined element-containing gas to the substrate; supplying a carbon-containing gas and a plasma-excited inert gas to the substrate; supplying an oxidizing gas to the substrate; and supplying a nitriding gas to the substrate.

Abstract: A method is provided that includes forming a high-k dielectric etch stop layer over at least a first conductivity type semiconductor device on a first portion of a substrate and at least a second conductivity type semiconductor device on a second portion of the semiconductor device. A first stress-inducing layer is deposited over the first conductivity type semiconductor device and the second conductivity type semiconductor device. The portion of the first stress-inducing layer that is formed over the second conductivity type semiconductor device is then removed with an etch that is selective to the high-k dielectric etch stop layer to provide an exposed surface of second portion of the substrates that includes at least the second conductivity type semiconductor device. A second stress-inducing layer is then formed over the second conductivity type semiconductor device.

Abstract: A method of forming a dielectric layer is described. The method deposits a silicon-containing film by chemical vapor deposition using a local plasma. The silicon-containing film is flowable during deposition at low substrate temperature. A silicon precursor (e.g. a silylamine, higher order silane or halogenated silane) is delivered to the substrate processing region and excited in a local plasma. A second plasma vapor or gas is combined with the silicon precursor in the substrate processing region and may include ammonia, nitrogen (N2), argon, hydrogen (H2) and/or oxygen (O2). The equipment configurations disclosed herein in combination with these vapor/gas combinations have been found to result in flowable deposition at substrate temperatures below or about 200° C. when a local plasma is excited using relatively low power.

Abstract: Atomic layer deposition processes for forming germanium oxide thin films are provided. In some embodiments the ALD processes can include the following: contacting the substrate with a vapor phase tetravalent Ge precursor such that at most a molecular monolayer of the Ge precursor is formed on the substrate surface; removing excess Ge precursor and reaction by products, if any; contacting the substrate with a vapor phase oxygen precursor that reacts with the Ge precursor on the substrate surface; removing excess oxygen precursor and any gaseous by-products, and repeating the contacting and removing steps until a germanium oxide thin film of the desired thickness has been formed.

Abstract: An object is to provide a semiconductor device having excellent characteristics, in which a channel layer includes an oxide semiconductor with high crystallinity. In addition, a semiconductor device including a base film with improved planarity is provided. CMP treatment is performed on the base film of the transistor and plasma treatment is performed thereon after the CMP treatment, whereby the base film can have a center line average roughness Ra75 of less than 0.1 nm. The oxide semiconductor layer with high crystallinity is formed over the base film having planarity, which is obtained by the combination of the plasma treatment and the CMP treatment, thereby improving the characteristics of the semiconductor device.

Abstract: Methods of annealing a thin semiconductor wafer are disclosed. The methods allow for high-temperature annealing of one side of a thin semiconductor wafer without damaging or overheating heat-sensitive electronic device features that are either on the other side of the wafer or embedded within the wafer. The annealing is performed at a temperature below the melting point of the wafer so that no significant dopant redistribution occurs during the annealing process. The methods can be applied to activating dopants or to forming ohmic contacts.

Abstract: A method for fabricating a semiconductor chip module and a semiconductor chip package is disclosed. One embodiment provides a first layer, a second layer, and a base layer. The first layer is disposed on the base layer, and the second layer is disposed on the first layer. A plurality of semiconductor chips is applied above the second layer, and the second layer with the applied semiconductor chips is separated from the first layer.

Abstract: This film forming method comprises: a first material gas supply step (A) wherein a first raw material gas is supplied over the substrate to be processed so that a first chemical adsorption layer, which is adsorbed on the substrate by means of the first raw material gas is formed on the substrate to be processed, a second material gas supply step (C) wherein a second raw material that is different from the first raw material gas is supplied over the substrate, on which the first chemical adsorption layer has been formed, so that a second chemical adsorption layer, which is adsorbed by means of the second raw material gas, is formed on the first chemical adsorption layer; and a plasma processing step (E) wherein a plasma processing is carried on at least the first and second chemical adsorption layers using microwave plasma.

Abstract: A processing method for forming a structure including an amorphous carbon film includes performing a preliminary treatment of removing water from a surface of the underlying layer by heating the inside of the reaction chamber at a preliminary treatment temperature of 800 to 950° C. and supplying a preliminary treatment gas selected from the group consisting of nitrogen gas and ammonia gas into the reaction chamber while exhausting gas from inside the reaction chamber; and, then performing main CVD of forming an amorphous carbon film on the underlying layer by heating the inside of the reaction chamber at a main process temperature and supplying a hydrocarbon gas into the reaction chamber while exhausting gas from inside the reaction chamber.

Abstract: A carbon-rich carbon boron nitride dielectric film having a dielectric constant of equal to, or less than 3.6 is provided that can be used as a component in various electronic devices. The carbon-rich carbon boron nitride dielectric film has a formula of CxByNz wherein x is 35 atomic percent or greater, y is from 6 atomic percent to 32 atomic percent and z is from 8 atomic percent to 33 atomic percent.

Abstract: Methods are described for forming flowable carbon layers on a semiconductor substrate. A local excitation (such as a hot filament in hot wire CVD, a plasma in PECVD or UV light) may be applied as described herein to a silicon-free carbon-containing precursor containing a hydrocarbon to form a flowable carbon-containing film on a substrate. A remote excitation method has also been found to produce flowable carbon-containing films by exciting a stable precursor to produce a radical precursor which is then combined with unexcited silicon-free carbon-containing precursors in the substrate processing region.

Abstract: A thin film deposition apparatus can be simply applied to produce large-sized display devices on a mass scale and improves manufacturing yield. The thin film deposition apparatus for forming a thin film on a substrate includes: a deposition source that discharges a deposition material; a deposition source nozzle unit disposed at a side of the deposition source and including a plurality of deposition source nozzles arranged in a first direction; and a patterning slit sheet disposed opposite to the deposition source nozzle unit and including a plurality of patterning slits arranged in the first direction; wherein each of the patterning slits includes a plurality of sub-slits.

Abstract: Described are methods of making silicon nitride (SiN) materials and other silicon-containing films, including carbon-containing and/or oxygen-containing films such as SiCN (also referred to as SiNC), SiON and SiONC films, on substrates. According to various embodiments, the methods involve electromagnetic radiation-assisted activation of one or more reactants. In certain embodiments, for example, the methods involve ultraviolet (UV) activation of vapor phase amine coreactants. The methods can be used to deposit silicon-containing films, including SiN and SiCN films, at temperatures below about 400° C.

Abstract: The product of the breakdown voltage (BVCEO) and the cutoff frequency (fT) of a SiGe heterojunction bipolar transistor (HBT) is increased beyond the Johnson limit by utilizing a doped region with a hollow core that extends down from the base to the heavily-doped buried collector region. The doped region and the buried collector region have opposite dopant types.

Abstract: Provided are processes for the low temperature deposition of silicon-containing films using carbosilane precursors containing a carbon atom bridging at least two silicon atoms. Certain methods comprise providing a substrate; in a PECVD process, exposing the substrate surface to a carbosilane precursor containing at least one carbon atom bridging at least two silicon atoms; exposing the carbosilane precursor to a low-powered energy sourcedirect plasma to provide a carbosilane at the substrate surface; and densifying the carbosilanestripping away at least some of the hydrogen atoms to provide a film comprising SiC. The SiC film may be exposed to the carbosilane surface to a nitrogen source to provide a film comprising SiCN.

Abstract: A polyimide film is effectively formed on a complicated surface. The polyimide film is formed by reacting, on the surface, diamine monomer and tetracarboxylic acid dianhydride monomer both of which are dissolved within carbon dioxide in a supercritical states, together with a polyamic acid resulting from a reaction between the diamine monomer and the tetracarboxylic acid dianhydride reached to the surface.