Abstract: A method can include receiving a first memory load request by a conditional load with time out (CLT) device at a first time. The first memory load request can specify a first condition. A first determination of whether the first condition is satisfied is performed. The CLT device determines a wait period when the first condition is not satisfied. A reply is issued. The reply indicates that the first condition is satisfied when the first condition is satisfied. The reply indicates that the first condition is not satisfied when the duration of the wait period exceeds a time-out threshold. When the first condition is not satisfied, a first memory store request can be received during the wait period and a second determination of whether the first condition satisfied performed. The reply indicates that the first condition is satisfied when the second determination is that the first condition is satisfied.

Abstract: Using a storage interface circuit of a programmable IC, a first set of configuration data can be communicated between a storage circuit and the programmable IC. Using the first set of configuration data, the programmable IC can be programmed to include: a bus interface module that is designed to interface with a host device over a communication bus that links multiple devices, and an internal configuration access interface that is designed to interface between the bus interface module and programmable logic of the programmable IC. Using direct memory access (DMA) transfers through the bus interface module, a second set of configuration data can be communicated between a memory circuit and the programmable IC. Using the second set of configuration data, the programmable logic of the programmable IC can be programmed.

Abstract: A printed circuit board having one or more holes that are controllably drilled to extend into the printed circuit board substrate to a predetermined depth intermediate first and second faces. A mechanical locating pin is received into each of the one or more holes to mechanically align a first component for electronically interfacing with the printed circuit board substrate. A second component is installed on the second face directly opposite of the one or more holes such that the second component is in electronic communication with conductive traces or interconnects formed on the second face directly opposite of the hole.

Abstract: Provided are a USB device and a method thereof for recognizing a host operating system. The method comprises the following steps: a USB device waiting for receiving a USB command from a host; determining whether the received USB command is a command for obtaining a configuration descriptor; if yes, determining a host operating system according to values of a first flag and a second flag and a value of a length byte in the command for obtaining the configuration descriptor; after the host operating system is determined, performing, by using a corresponding communications protocol, data communication with the host according to the host operating system, and shielding a file which cannot be operated under the host operating system, thereby making the host accurately recognize and operate the USB device, and making the USB device and the application of the USB device further optimized.

Abstract: Each of a plurality of accesses by a multithreaded program to shared data structures stored within a database is monitored. The accesses are implemented by varying application programming interface (API) methods. Thereafter, it is determined, based on pre-defined synchronization safeguards, whether each of the accesses is valid or invalid based on the utilized corresponding API method. Those accesses to the shared data structures that were determined to be valid are allowed to proceed while those accesses to the shared data structures that were determined to be invalid are prevented from proceeding.

Abstract: Methods and structure for selectively powering a storage device over a data network. An exemplary system includes a power module configured to detect power from a host system via a network port. The system also includes an input/output controller configured to receive power derived from the network port of the power module, and in response, to identify a disk drive for a read/write operation based on information from the host system. With power derived from the network port, the power module is further configured to supply power to an expander that connects the disk drive to the input/output controller, and to supply power to the disk drive to perform the read/write operation.

Abstract: A connection device including a first connection port, a second connection port, a third connection port and a chip is provided. When a host device is coupled to the first connection port and an electronic device is coupled to the second connection port, the connection device sets the level of an identification pin of the second connection port to a high level such that the electronic device operates in a device mode. In the device mode, the host device provides power to the electronic device. When the electronic device is coupled to the second connection port and a peripheral device is coupled to the third connection port, the connection device sets the level of the identification pin to a low level such that the electronic device operates in a host mode. In the host mode, the electronic device provides power to the peripheral device.

Abstract: Examples of the present disclosure provide apparatuses and methods for performing a corner turn using a modified decode. An example apparatus can comprise an array of memory cell and decode circuitry coupled to the array and including logic configured to modify an address corresponding to at least one data element in association with performing a corner turn operation on the at least one data element. The logic can be configured to modify the address corresponding to the at least one data element on a per column select basis.

Abstract: A method of and apparatus for communicating between a host and an agent. The method includes the step of performing a first transaction between a host controller and a hub. The hub is operable to perform a single transaction with an agent based on the first transaction. The method then includes the step of performing a second transaction between the host controller and the hub. The second transaction is based on the single transaction.

Abstract: A cache memory including: a plurality of parallel input ports configured to receive, in parallel, memory access requests wherein each parallel input port is operable to receive a memory access request for any one of a plurality of processing units; and a plurality of cache blocks wherein each cache block is configured to receive memory access requests from a unique one of the plurality of input ports such that there is a one-to-one mapping between the plurality of parallel input ports and the plurality of cache blocks and wherein each of the plurality of cache blocks is configured to serve a unique portion of an address space of the memory.

Abstract: Various exemplary embodiments relate to a function selector device in a system using a DisplayPort protocol over a universal serial bus (USB) mechanical interface, including: a first port configured to transmit/receive a USB SSTX signal; a second port configured to transmit/receive a USB SSRX signal; a third port configured to transmit/receive a DisplayPort lane signal; a fourth port configured to transmit/receive a DisplayPort AUX signal; a fifth port configured to transmit/receive a DisplayPort HPD signal; a sixth port configured to connect to SSTX pins of a USB 3.0 receptacle; and a seventh port configured to connect to SSRX pins of a USB 3.0 receptacle.

Abstract: An interface apparatus is provided for exchange of different time-critical user data between a host device and a divided medium, by way of a first interface and by way of a second interface, having a resource management device and a temporary memory device. The first interface works with a first clock pulse and the second interface works with a second clock pulse. The first interface and the second interface are connected with the temporary memory device. The resource management device is set up for controlling the exchange of the different time-critical user data between the first interface and the second interface, in such a manner that collisions of the different time-critical user data within the interface apparatus and/or on the divided medium are avoided, in order to allow deterministic behavior during exchange of the different time-critical user data.

Abstract: According to one exemplary embodiment, a method for embedded compute engine architecture optimization is provided. The method may include receiving an object. The method may also include determining a first category for the received object, whereby the determined first category is associated with a node. The method may then include storing the received object on the node associated with the determined first category. The method may further include receiving an algorithm. The method may also include determining a second category for the received algorithm, whereby the determined second category is associated with the node. The method may then include executing the received algorithm on the node, whereby the received algorithm uses the received object stored on the node.

Abstract: The disclosed subject matter relates to an architecture that can leverage femtocell network infrastructure in order to facilitate premises management or monitoring. In particular, the architecture can leverage the local presence of a home nodeB (HNB) located at a premises associated with a subscriber in order to aggregate, process and/or distribute various state information that can be collected at the premises.

Abstract: A method to generate a reduced delay twinaxial SPICE model is provided. The method may include measuring near-end S-parameter components and far-end S-parameter components of a twinaxial cable, reducing an original time delay of the far-end S-parameter components by multiplying each of the far-end S-parameter components by a complex exponential based on an equivalent delay length, a signal frequency, and an effective dielectric constant, simulating a signal transmitted across a twinaxial cable by running a 4-port SPICE model using the near-end S-parameter components and the multiplied far-end S-parameter components, and recording a magnitude and a phase of the transmitted signal with respect to frequency as outputs of the reduced delay twinaxial SPICE model.

Abstract: A slave communication device is connected to a master communication device through a single bus, and transmits a data signal according to a synchronization signal transmitted from the master communication device. The slave communication device includes a current reduction unit that reduces a current flowing into the bus from the slave communication device at least in a period where the synchronization signal is transmitted from the master communication device.

Abstract: A scalable driver assistance system for a motor includes a central safety domain controller having a first perception logic circuit communicatively coupled to a first chipset socket and to a second chipset socket, wherein the first chipset socket is communicatively coupled to the second chipset socket and to a third chipset socket. A first long range front camera is communicatively coupled to the first perception logic circuit and a plurality of surround view cameras communicatively are coupled to the first perception logic circuit. The central safety domain controller provides first and second levels of driver assistance, and additional circuits or microcontrollers may be selectively connected into one of the first, second, and third chipset sockets to provide third, fourth, or fifth levels of automated driving assistance.

Abstract: A switching device able to switch between communication modes includes a processor, a universal serial bus (USB) communication module, a serial communication module, and a control module. When a USB interface of the USB communication module is electrically coupled to a first electronic device, the control module outputs a first control signal to a control chipset of the serial communication module. The control chipset of the serial communication module is turned off. The processor can communicate with the first electronic device through the USB communication module.

Abstract: A device includes a first interface to receive a signal from a first communication link, wherein the receive signal includes out-of-band (OOB) information. A detector coupled to the first interface detects the OOB information. An encoder coupled to the detector encodes the OOB information into one or more symbols (e.g., control characters). A second interface is coupled to the encoder and a second communication link (e.g., a serial transport path). The second interface transmits the symbols on the second communication link. The device also includes mechanisms for preventing false presence detection of terminating devices.

Abstract: A storage router and method for providing virtual local storage on remote storage devices to devices are provided. Devices are connected to a first transport medium, and a plurality of storage devices are connected to a second transport medium. In one embodiment, the storage router maintains a map to allocate storage space on the remote storage devices to devices connected to the first transport medium by associating representations of the devices connected to the first transport medium with representations of storage space on the remote storage devices, wherein each representation of a device connected to the first transport medium is associated with one or more representations of storage space on the remote storage devices. The storage router can control access from the devices connected to the first transport medium to the storage space on the remote storage devices in accordance with the access controls.

Abstract: Spectrum access allocation processes and systems are described in which multiple tiers of predetermined transmission powers are enforced, and where access is established by transmission at or below the lowest predetermined transmission power. The allocation processes include provisioning a wireless interface between a spectrum access system and a user equipment that is not registered with the spectrum access system. The wireless interface permits data transfer at or below a first predetermined power setting. A request to register the user equipment with the spectrum access system is transmitted to a spectrum access server. The spectrum access server receives a message from the spectrum access server indicating that the user equipment has been registered with the spectrum access system. The user equipment is controlled to transmit data at a second predetermined power setting that is greater than the first predetermined power setting.

Abstract: Provided is an apparatus of recognizing optical connector connection including an IC tag connection unit configured to provide bus power and detect whether the optical connector is connected to an optical adapter, an IC tag configured to store an IC tag ID uniquely given to the optical connector, which is connected to a corresponding optical cable, and to receive the bus power to be driven for bus communication, and an IC tag ID obtaining unit configured to obtain the IC tag ID stored in the IC tag through the IC tag connection unit, when the optical connector is connected to the optical adapter.

Abstract: Provided is a method and apparatus for identifying a type of an external device connected to an interface connector in an electronic device. The electronic device may measure a voltage of power that is input to a power supply terminal of the interface connector that includes the power supply terminal and is configured to connect with an external device. The electronic device may identify a type of the external device connected to the interface connector based on the voltage of the input power. In addition, other embodiments are also possible.

Abstract: Some demonstrative embodiments include apparatuses, systems and/or methods of tearing down a Protocol Adaptation Layer (PAL) session. For example, an apparatus may include a first PAL communication unit to control a PAL connection, over a PAL, between a first device and a second device, the first PAL communication unit is to control the PAL connection during a session with a second PAL communication unit over a communication link, wherein the first PAL communication unit is to tear down the session according to a tear down procedure.

Abstract: An extended-height DIMM for use in a memory system having slots designed to receive DIMMs that comply with a JEDEC standard that specifies a maximum height for the DIMM and a maximum number of devices allowed to reside on the DIMM. The DIMM comprises a PCB having an edge connector designed to mate with a memory system slot and a height which is greater than the maximum height specified in the applicable standard, a plurality of memory devices which exceeds the maximum number of devices specified in the applicable standard, and a memory buffer, or a register control device and data buffers, which operates as an interface between a host controller's data and command/address busses and the memory devices. This arrangement enables the extended-height DIMM to provide greater memory capacity than would a DIMM which complies with the maximum height and maximum number of devices limits.

Abstract: Some demonstrative embodiments include apparatuses, systems and/or methods of tearing down a Protocol Adaptation Layer (PAL) session. For example, an apparatus may include a first PAL communication unit to control a PAL connection, over a PAL, between a first device and a second device, the first PAL communication unit is to control the PAL connection during a session with a second PAL communication unit over a communication link, wherein the first PAL communication unit is to tear down the session according to a tear down procedure.

Abstract: A neutral file generally includes information related to a object of development. The neutral file may be based on a reusable module. The neutral file may pass information between reusable modules. A computer may conduct an analysis using the reusable module and information in the neutral file. The computer may display the result of the analysis on an external device.

Abstract: A sequence of read returns are to be sent to a host device over a transactional buffered memory interface, where the sequence includes at least a first read return to a first read request and a second read return to a second read request. A tracker identifier of the second read return is encoded in the first read return and the first read return is sent with the tracker identifier of the second read return to the host device. The second read return is sent to the host device after the first read return is sent.

Abstract: A link layer control message is generated and included in a flit that is to be sent over a serial data link to a device. The flits sent over the data link are to include a plurality of slots. Control messages can include, in some aspects, a viral alert message, a poison alert message, a credit return message, and acknowledgements.

Abstract: In accordance with embodiments of the present disclosure, an interface for an information handling system comprising a connector, wherein the connector comprises a legacy portion and an expanded portion. The legacy portion may comprise a plurality of signal pins defining a first set of lanes of communication between the information handling system and an information handling resource coupled to the connector. The expanded portion comprising a plurality of signal pins defining a second set of lanes of communication between the information handling system and an information handling resource coupled to the expanded portion.

Abstract: An accessory controls power delivery from a host device to the accessory by receiving and rectifying a wireless signal into an electrical voltage that operates an electronic switch. The electronic switch sets a voltage state of an electrical connection to the host device that triggers the host device to begin providing power. The accessory may no longer receive power from the host device once the wireless signal stops. The host device may be the source of the wireless signal and may thereby control whether the accessory draws power by operation of the wireless signal. Alternatively, the accessory may include a controller that once powered on by the host device as a result of the rectification of the wireless signal, maintains the same or a different electronic switch in a closed state to maintain power delivery from the host device until the controller is triggered to allow the electronic switch to open.

Abstract: Techniques for setting up a packet-switched video telephony (PSVT) call are described. A mobile originated (MO) device may transmit an invitation for the PSVT call to a mobile terminated (MT) device. The invitation may initiate a process to reserve and identify video and audio resources to establish the PSVT call. The MO device may determine whether the video resources are available. If the video resources are not available but audio resources are available, the MO device may instead establish the PSVT call with only an audio stream call between the MO device and the MT device. If audio resources become available ahead of video resources, the PSVT call may be established with an audio stream first and a video stream is automatically added to the call when video resources are reserved later, or the PSVT call is downgraded to a VoIP call if the video resources cannot be reserved.

Abstract: A display device includes: an interfacing unit for converting one of a plurality of image signals inputted according to a switch among a plurality of input modes into an image data; a first reset controlling unit for resetting the interfacing unit according to the switch among the plurality of input modes; a driving unit for converting the image data into a data signal; a display panel for displaying an image using the data signal; and a panel power unit for supplying a panel power to the driving unit and the display panel.

Abstract: Metadata that corresponds to application data is distributed across different disruption regions of an asymmetric memory component such that metadata is written in the same disruption region as the application data to which it corresponds. A first block of application data is written to a first disruption region and a second block of application data is written to a second disruption region. A first block of metadata corresponding to the first block of application data and a second block of metadata corresponding to the second block of application data both are generated. The first block of metadata is written to the first disruption region and the second block of metadata is written to the second disruption region such that the first and second blocks of metadata are written to the same disruption regions as the blocks of application data to which they correspond.

Abstract: Provided are a packet transmission and reception system, apparatus, and method. The packet transmission and reception system for distributing and transmitting data through a plurality of multi-lanes includes a first transmission and reception apparatus configured to include a plurality of first physical lanes and a plurality of first logical lanes connected to the plurality of first physical lanes, and a second transmission and reception apparatus configured to include a plurality of second physical lanes and a plurality of second logical lanes connected to the plurality of second physical lanes.

Abstract: A device, system and method for charging a battery are provided. The device comprises: a USB (Universal Serial Bus) port; a battery in communication with the USB port; and, circuitry in communication with the USB port and the battery, the circuitry configured to: transmit a power control signal over the USB port, the power control signal comprising data indicative of one or more of a power, a voltage and a current to be received over the USB port to charge the battery; and, responsively receive the power for charging the battery over the USB port.

Abstract: A real-time operating system (OS) for an embedded system may be configured for asynchronous handling of input and output (I/O) operations. When application code is executing, the OS may be configured to register I/O interrupts and queue I/O operations. When no application code is executing, the OS may be configured to call appropriate interrupt handlers. As result, the OS may maintain the real-time execution that may be required of applications on an embedded system while providing the flexibility and scalability offered by an operating system.

Abstract: In a method and a control device for the operation of a transmission system for an IO link, wherein at least one cable-free transition between an IO link master and at least one IO link device is provided, and wherein the IO link device provides a minimal cycle time for a communication cycle, it is particularly provided that the minimal cycle time provided by the IO link device is increased in such a manner that a temporal delay caused by the cable-free transition is added to the minimal cycle time.

Abstract: A package structure includes a networking unit including a plurality of switches/routers and a plurality of network interface units coupled to the plurality of switches/routers, and an interposer including a plurality of metal connections. The interposer is substantially free from functional elements built therein. A functional element is outside of, and bonded onto, the interposer, wherein the functional element is electrically coupled to the networking unit through the plurality of metal connections.

Abstract: The present invention relates to methods and apparatuses for securing otherwise unsecured internal and external computer communications. According to one aspect, the invention relates to methods and apparatuses for implementing device gatekeeping. According to another aspect the invention relates to methods and apparatuses for encrypting and decrypting data sent over an external or internal interface. According to another aspect, the invention relates to methods and apparatuses for implementing device snooping, in which some or all traffic passing between a host and a connected device is captured into memory and analyzed in real time by system software. In embodiments, the software can also act upon analyzed information. According to certain additional aspects, the security functions performed by methods and apparatuses according to the invention can be logically transparent to the upstream host and/or to the downstream device.

Abstract: The present invention relates to passive optical network (PON), and in particular, to an optical network terminal (ONT) in the PON system. In one embodiment, the optical network terminal includes a first interface coupled to a communications network, a second interface coupled to a network client and a processor including a memory coupled to the first interface and to the second interface, wherein the processor is capable of converting optical signals to electric signals, such that the network client can access the communications network.

Abstract: Integrated circuits may include synchronous nodes and asynchronous routing elements coupled between the synchronous nodes. A synchronous design implemented in such an integrated circuit may identify a register chain having a source register, a destination register, and intermediate registers. A virtual register may be created for each of the intermediate registers, which may then be removed from the synchronous design. The created virtual registers may be connected in series to form a virtual register chain between the source and destination registers. Each of the created virtual registers may be assigned to an asynchronous routing element that connects the source and destination registers on the integrated circuit. EDA tools such as viewers or a timing analysis tool may be configured to display the virtual registers instead of the asynchronous interconnection elements.

Abstract: A start-stop synchronous type serial data acquisition device includes a counter to which a clock signal that defines an acquisition timing of serial data including a start bit is input, and that counts a number of cycles of a clock signal; and a changing section that, according to a transition of the clock signal when the start bit has been input, changes a maximum count value that is counted by the counter, the maximum count value corresponding to the start bit.

Abstract: Methods and circuits for delay compensation are provided. A data clock may be generated from a peripheral clock. Sample data may be provided in a data signal on a bus in response to an edge of the data clock, where the edge of the data clock is triggered by an initial edge of the peripheral clock. A delay of the data clock relative to the peripheral clock may be selected based on a time difference between the initial edge of the peripheral clock and a time at which the sample data is detected on the bus. A delayed data clock having the selected delay relative to the peripheral clock may be generated. Requested data may be provided on the bus in response to an edge of the delayed data clock.

Abstract: In one embodiment, a system-on-chip (SoC) can be configured to receive a request from a master agent in a fabric coupled to the master agent, send a show command grant to the master agent responsive to selection of the request by the fabric, receive a command portion of a transaction corresponding to the request in the fabric and determine a target agent to receive the transaction based on the command portion, and thereafter send a transaction grant to the master agent for the transaction. Other embodiments are described and claimed.

Abstract: A method and apparatus are disclosed. One such method includes selecting a die of a plurality of dies that are coupled together through a via stack. A via on the selected die can be coupled to ground. A supply voltage is coupled to an end of the via stack and a resulting current measured. A calculated resistance is compared to an expected resistance to determine if a fault exists in the via stack.

Abstract: A pipeline communication system includes a master and a plurality of slaves configured to communicate with each other. Each of the plurality of slaves includes a memory, and is configured to generate a first ready signal and a second ready signal. The first ready signal is configured to be provided only to the master and the second ready signal is configured to be provided only to each of the plurality of slaves. The second ready signal is generated independent of the error check in each of the plurality of slaves.

Abstract: A method and apparatus for transmitting data in an Android platform based terminal device are provided. In the method, when the terminal device establishes a connection for data transmission with another device over a USB, the terminal device transmits data in an internal storage of the terminal device to the another device based upon a file transfer protocol and receives and writes into the internal storage data transmitted from the another device based upon the file transfer protocol; and the terminal device transmits data in an external storage of the terminal device to the another device in a UMS mode and receives and writes into the external storage data transmitted from the another device in the UMS mode.

Abstract: A sensor system for an electric/electronic architecture in a vehicle, having at least one sensor module for capturing at least one physical variable and at least one first interface for communication with a first bus system, and to an associated electric/electronic architecture for a vehicle. At least one second interface for communication with a second bus system is present, data of the at least one sensor module being able to be output via both bus systems.

Abstract: A microcontroller system is disclosed that includes an access stealing monitor coupled to a bus that is configured to receive a first access request from the bus for a first peripheral, duplicate the first access request, transform the first access request to a second access request on a second peripheral, and transfer the second access request to the bus. In another embodiment, a first peripheral coupled to the bus is configured to receive a first access request from the bus for the first peripheral, duplicate the first access request and transform the first access request to a second access request. A second peripheral coupled to the bus and to the first peripheral is configured to receive the second access request and to respond to the second access request. Methods of access stealing in a microcontroller system are also disclosed.