By Masking Or Reconfiguration Patents (Class 714/3)
  • Patent number: 7376859
    Abstract: Provided are a method, system and article of manufacture for switching. An indication is received of a failure of a primary storage subsystem at a switch, wherein the switch couples a host to the primary storage subsystem and a secondary storage subsystem. Subsequently, a command received from the host at the switch is directed to the secondary storage subsystem for completion.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: May 20, 2008
    Assignee: International Business Machines Corporation
    Inventors: Kenneth Wayne Boyd, Robert Frederic Kern
  • Patent number: 7376821
    Abstract: Embodiments provide a data processing system comprising first initialisation software to initialise the data processing system, means to access storage comprising a first region and a second region comprising first software; the system further comprising second initialisation software arranged, using information associated with the second region, to access the second region to launch the first software.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: May 20, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Yann Stephan, Paul Neuman
  • Patent number: 7376870
    Abstract: Embodiments include monitoring a computing system to determine whether firmware of the computing system is corrupted, hung up, or requires automatic update. The computing system may then request firmware update data over a network. Moreover, the computing system may include a controller with capability to determine whether the firmware is corrupted or hung and request and receive firmware update data over a network. In addition, the controller may have the capability operate when the firmware is corrupted or hung up, if the processor is held up, and if the operating system is halted, hung up, or soft-off. In addition, if the controller detects that the firmware is corrupted or hung up, the controller may halt the processor while updating the firmware.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: May 20, 2008
    Assignee: Intel Corporation
    Inventors: Mukesh Kataria, Andrew H. Gafken, William A. Stevens
  • Publication number: 20080115008
    Abstract: Apparatus and methods are provided for recovering from mismatching configuration data in a clustered environment having a plurality of storage devices coupled to a plurality of storage controllers. If a clustered environment has a first storage device of the plurality of storage devices that has first configuration data that does not match second configuration data of a second storage device of the plurality of storage devices, then the mismatch may be resolved through operation of the clustered environment rather than through operator intervention. Comparison of relevant attributes of the first and second configuration data determines whether a relevant difference between the first and second configuration data is a physical status of at least one of the plurality of storage devices.
    Type: Application
    Filed: November 13, 2006
    Publication date: May 15, 2008
    Inventor: Jayant M. Daftardar
  • Patent number: 7373544
    Abstract: There is provided a system and method of disaster restoration of service of damaged or destroyed telecommunication network elements. A controller component is configured to select a damaged or destroyed network element after a disaster event. An engine component is configured to establish connectivity to an alternative network element and to transmit the service continuity data associated with the damaged or destroyed network element from a computer readable storage. The engine component is configured to execute one or more computer commands to the alternative network element so as to operate it with the service continuity data of damaged or destroyed network element. A restoration service package is transmitted to a replacement network element and instructed to use that service package to re-acquire the original network element's identity and provisioning information in order to restore the traffic that originally existed on the damaged or destroyed network element.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: May 13, 2008
    Assignee: AT&T Corporation
    Inventors: Richard L Guzman, Javad Salahi, Edward K Sun
  • Patent number: 7373567
    Abstract: A system and method of providing error detection and correction capability in an IC using redundant logic cells and an embedded field programmable gate array (FPGA). The system and method provide error correction (EC) to enable a defective logic function implemented within an IC chip design to be replaced, wherein at least one embedded FPGA is provided in the IC chip to perform a logic function. If a defective logic function is identified in the IC design, the embedded FPGA is programmed to correctly perform the defective logic function. All inputs in an input cone of logic of the defective logic function are identified and are directed into the embedded FPGA, such that the embedded FPGA performs the logic function of the defective logic function.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: May 13, 2008
    Assignee: International Business Machines Corporation
    Inventors: John M. Cohn, Christopher B. Reynolds, Sebastian T. Ventrone, Paul S. Zuchowski
  • Patent number: 7370223
    Abstract: In clusters of multiprocessor systems it is important that these processor nodes are aware of each others availability and performance capabilities. In highly available systems using these multiprocessor systems there needs to be a method to dynamically bring nodes both into the cluster and to remove nodes out of the cluster. The processor node that is responsible for these actions is designated the manager node (50). The manager node has a pre-selected backup to assume this responsibility upon the inability of said manager node to fulfill its duties. To allow the cluster of nodes to communicate with each other efficiently there needs to be a distributed messaging system that allows for the rapid distribution of data messages among the cluster nodes.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: May 6, 2008
    Assignee: Goahead Software, Inc.
    Inventors: Gregory A. Olmstead, Gregory I. Thiel, Michael D. O'Brien, Peter Gravestock
  • Patent number: 7370239
    Abstract: A process control system includes a plurality of input/output (I/O) devices and a controller in communication using a bus. Each I/O device has an interface for communicatively linking the I/O device with the bus, and includes a device processor which, upon detection of a potential I/O device fault, severs the communication link provided by the interface with the bus to thereby remove the I/O device from the bus and to prevent the I/O device from keeping other I/O devices on the bus from communicating over the bus.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: May 6, 2008
    Assignee: Fisher-Rosemount Systems, Inc.
    Inventors: Michael D. Apel, Steve Dienstbier
  • Publication number: 20080104441
    Abstract: A method of kernel panic recovery, comprising detecting a kernel panic of a first kernel, retrieving at least some of a state of at least one thread running on the first kernel, and restoring the state of the at least one process on a second kernel.
    Type: Application
    Filed: October 17, 2007
    Publication date: May 1, 2008
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Pramod Sathyanarayana RAO, Lal Samuel VARGHESE
  • Patent number: 7366825
    Abstract: A memory controller is utilized to overcome NAND flash memory's propensity for comprising bad blocks of memory. The memory controller utilizes minimal hardware and is essentially transparent to a device requesting access to the NAND memory. A NAND flash memory device is configured to comprise a set of main blocks of memory and a set of auxiliary blocks of memory. Each block is divided into pages of memory and each page includes metadata. The metadata includes a block status indicator, indicating whether a block is good or bad. When receiving a request to access a page in the NAND flash memory, if the block in which the page resides is good, that block is accessed. If the block is bad, auxiliary memory is searched until a block containing the address of the bad block in its metadata is found. The found block is accessed in lieu of the bad block.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: April 29, 2008
    Assignee: Microsoft Corporation
    Inventors: Gregory G. Williams, Harjit Singh, Michael G. Love, Stephen Z. Au
  • Patent number: 7363426
    Abstract: A RAID controller is provided for each host sharing a RAID. Each RAID controller can determine whether another host is sharing the RAID and assume a master or slave status with respect to rebuild operations for the shared disk. The master controller may then manage any rebuild operations on rebuild disks within the RAID.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: April 22, 2008
    Assignee: Dell Products L.P.
    Inventors: Mahmoud Ahmadian, Anthony Fernandez
  • Publication number: 20080086657
    Abstract: Methods and systems for software security in a secure communication system are disclosed and may include verifying downloaded code in a reprogrammable system and reloading prestored unmodifiable first stage code upon failure. The prestored unmodifiable first stage code, which may comprise boot code for the reprogrammable system, may be stored in locked flash, and the downloaded software code may be stored in unlocked flash. The downloaded software code may be verified by comparing a signature of the downloaded code to a private key. A first sticky bit may be utilized to indicate a failure of the verification and a second sticky bit may be utilized to indicate passing of the verification and the use of the downloaded software code. Whether to reset the reprogrammable system and reload the prestored unmodifiable first stage code may be determined from within the reprogrammable system, which may comprise a set-top box.
    Type: Application
    Filed: May 24, 2007
    Publication date: April 10, 2008
    Inventors: Xuemin Chen, Andrew Dellow, Iue-Shuenn Chen, Stephane Rodgers
  • Publication number: 20080082857
    Abstract: The claimed subject matter provides a system and/or a method that facilitates re-locating a web application associated with a network service utilizing a portion of serialized data. The network service can be any collection of resources that are maintained by a party (e.g., third-party, off-site, etc.) and accessible by an identified user over a network (e.g., WAN, Internet, etc.). A receiver component can receive a request for initiating and execution of a process that is maintained by the network service. A servicing component can analyze representations of multiple processes within the network service and determines whether to enable initiation and execution of the process based at least in part upon the analysis.
    Type: Application
    Filed: December 20, 2006
    Publication date: April 3, 2008
    Applicant: MICROSOFT CORPORATION
    Inventors: Henricus Johannes Maria Meijer, Raymond E. Ozzie, Gary W. Flake, Thomas F. Bergstraesser, Arnold N. Blinn, Christopher W. Brumme, Michael Connolly, Dane A. Glasgow, Alexander G. Gounares, Galen C. Hunt, James R. Larus, Matthew B. MacLaurin, David R. Treadwell
  • Publication number: 20080082858
    Abstract: To aim at autonomously selecting and switching over a management system by a terminal device, and preventing the terminal device from switching over the system, managing the self-terminal, to a backup system even in the case of a temporary fault from which to recover relatively immediately and in the case of occurrence of an inconvenience (trouble) negligible enough not to be treated as the fault. Included are a terminal device 21 transmitting, a registration request (S101) to a backup system 1b, if a fault occurs in a main system 1a, and the backup system 1b not providing a management service even when receiving the registration request (S101) till a startup request (S204) made by a monitoring server 18b is received.
    Type: Application
    Filed: August 3, 2007
    Publication date: April 3, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Kaduhiko Hasegawa
  • Patent number: 7350099
    Abstract: A method and system are provided for utilizing a logical failover circuit for rerouting data from a failed network circuit in a first data network to a second data network. The network circuit in the first data network includes a logical circuit for communicating data. When a failure in the network circuit in the first data network is detected, a network failover circuit is selected in the second data network. The network failover circuit in the second data network includes a logical failover circuit for communicating data. The data in the failed logical circuit in the first data network is rerouted over the logical failover circuit in the second data network until the failure in the network circuit in the first data network is resolved. After the failed network circuit in the first data network has been restored, the data is rerouted over the restored logical circuit.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: March 25, 2008
    Assignee: AT&T BLS Intellectual Property, Inc.
    Inventors: William Taylor, David Massengill, John Hollingsworth
  • Patent number: 7349479
    Abstract: Five electronic control units (ECU) control vehicle devices using CAN protocol. Each of ECUs is provided with a resistor and a switch for activating the resistor. A first and fifth ECUs are arranged on the leftmost and rightmost ends. Resistors of the first and fifth ECUs are used as terminating resistors to a two-wire communications line. When the two-wire communications line is broken, the first ECU sends a test signal while other ECUs excluding the fifth ECU turn on the switches from right to left. When the test signal can be received, a broken point is located on the right side of ECU that turns on its switch at this time. Thereafter ECUs on the left side of the broken point conduct communication.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: March 25, 2008
    Assignee: Denso Corporation
    Inventors: Takeshi Suganuma, Yoshimitsu Fujii
  • Patent number: 7346876
    Abstract: A method is disclosed whereby an inexpensive integrated circuit is provided for use in high volume electronic consumer devices of different makes, wherein each different make must perform a different special function. A common function required in all the different makes is realized in a substantially non-customizable portion. A dense mask-programmable portion is provided for realizing a special function. Interface circuitry is provided that enables an external FPGA to perform the special function at system operating speeds during system development. After system development, the circuitry implemented in the external FPGA is technology-mapped to the mask-programmable portion. A single mask is fashioned such that versions of the integrated circuit are produced with their mask-programmable portions customized to perform the special function.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: March 18, 2008
    Inventors: Andrew K. Chan, Thomas M. Chan, Po Weng Chiu
  • Patent number: 7346800
    Abstract: When a primary server executing a task fails in a computer system where a plurality of servers are connected to an external disk device via a network and the servers boot an operation system from the external disk device, task processing is taken over from the primary server to a server that is not executing a task in accordance with the following method. The method for taking over a task includes the steps of detecting that the primary server fails; searching the computer system for a server that has the same hardware configuration as that of the primary server and that is not running a task; enabling the server, searched for as a result of the search, to access the external disk device; and booting the server from the external disk device.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: March 18, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Keisuke Hatasaki, Takao Nakajima
  • Publication number: 20080065928
    Abstract: A support system includes a storage unit for storing a dependency graph in which components are expressed as nodes and relationships of components depending directly on each other are expressed with links, a log display unit for displaying, in response to detection of a failing component, a log of events occurring in the component, a selection unit for selecting, in response to an instruction by a user, a component that is adjacent to the failing component on the dependency graph, as a candidate component for a failure cause, and a display control unit for enabling the log display unit to additionally display a log of events occurring in the selected candidate component, wherein the selection unit further selects, in response to an instruction by a user, a component that is adjacent to the candidate component on the dependency graph as a new candidate component on condition that a log thereof has not yet been displayed.
    Type: Application
    Filed: August 24, 2007
    Publication date: March 13, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Yashuhiro Suzuki, Yashuhisa Goto
  • Patent number: 7343579
    Abstract: Described are methods and apparatus, including computer program products, for reconfigurable environmentally adaptive computing technology. An environmental signal representative of an external environmental condition is received. A processing configuration is automatically selected, based on the environmental signal, from a plurality of processing configurations. A reconfigurable processing element is reconfigured to operate according to the selected processing configuration. In some examples, the environmental condition is detected and the environmental signal is generated based on the detected condition.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: March 11, 2008
    Assignee: Physical Sciences
    Inventors: Robin L. Coxe, Gary E. Galica
  • Patent number: 7330996
    Abstract: A method for maintaining full performance of a file system in the presence of a failure is provided. The file system having N storage devices, where N is an integer greater than zero and N primary file servers where each file server is operatively connected to a corresponding storage device for accessing files therein. The file system further having a secondary file server operatively connected to at least one of the N storage devices. The method including: switching the connection of one of the N storage devices to the secondary file server upon a failure of one of the N primary file servers; and switching the connections of one or more of the remaining storage devices to a primary file server other than the failed file server as necessary so as to prevent a loss in performance and to provide each storage device with an operating file server.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: February 12, 2008
    Assignee: International Business Machines Corporation
    Inventors: Paul W. Coteus, Alan G. Gara, Mark E. Giampapa, Philip Heidelberger, Burkhard D. Steinmacher-Burow
  • Publication number: 20080016385
    Abstract: System and method for providing information to a user about an electronic device. One or more diagnostic tests may be performed on the electronic device which indicate whether the electronic device is able to properly operate. Correspondingly, one or more problems may be identified with regard to the operation of the electronic device based on the one or more diagnostic tests. The problems may include configuration problems, e.g., where the user has improperly set up the electronic device and/or malfunctions, e.g., where a component has failed. Additionally, one or more speech phrases may be audibly presented to the user which indicate the problem(s). The speech phrase(s) may also indicate to the user how to solve the problem and/or what resources may be used to solve the problem. The method may also present a tutorial to the user which guides the user in configuring at least a portion of the electronic device.
    Type: Application
    Filed: July 13, 2006
    Publication date: January 17, 2008
    Inventors: Robert E. Hollingsworth, Gary E. Johnson
  • Patent number: 7320083
    Abstract: An apparatus and method for deterministically killing one of redundant servers on a common network is disclosed. The apparatus includes a chassis that encloses the servers and a storage controller, status indicators generated by the servers to the storage controller, and kill controls, generated by the storage controller to respective ones of the servers, each for killing a respective one of the servers. The status indicators and kill controls are wholly enclosed in the chassis. The kill controls deterministically disable the killed server on the network independently of the state of the server to be killed. That is, the server does not need to be able to respond to a command to be disabled on the network. In one embodiment, the kill controls comprise reset signals. After the storage controller deterministically kills one of the servers, the other server takes over the identity of the killed server on the network.
    Type: Grant
    Filed: April 23, 2004
    Date of Patent: January 15, 2008
    Assignee: Dot Hill Systems Corporation
    Inventors: Ian Robert Davies, George Alexander Kalwitz, Victor Key Pecone
  • Publication number: 20080010485
    Abstract: By incorporating a referral mechanism, a failover method and system for remotely mirrored clustered file servers enables a client computer to transparently access a remotely mirrored file system during a failover of a first NAS (network attached storage) storing the file system. The first NAS is clustered with a second NAS that takes over the IP address of the first NAS on failover. A mirroring relationship is established between the first NAS and a third NAS whereby a copy of the file system is replicated to the third NAS. A referral is created on the second NAS, such that an access attempt from the client computer for accessing the first file system that is directed to the second NAS following IP address takeover from the first NAS after failover is referred to the third NAS by the referral to enable the client computer to access the copy of the file system.
    Type: Application
    Filed: June 8, 2006
    Publication date: January 10, 2008
    Inventors: Hidehisa Shitomi, Manabu Kitamura
  • Publication number: 20080010486
    Abstract: A personal computer component diagnostic method is executed to recognize the status or potential problems of a computer before executing an operating system. The personal computer component diagnostic method comprising: calling a BIOS program; executing a component basic diagnostic program; and executing a component functional test after executing a predetermined step. The component functional test includes a CPU MSR/MTRR test, a hard disk S.M.A.R.T. test, a boot path test and a PCI device scanning test.
    Type: Application
    Filed: July 5, 2007
    Publication date: January 10, 2008
    Applicant: ASUSTEK COMPUTER INC.
    Inventors: Chiy-Ferng Perng, Hsien-Shan Wang, Wei-Ming Huang, Hung-Ming Tsao
  • Patent number: 7315958
    Abstract: A method and system for restoring data redundancy in a storage system without a hot standby disk is disclosed. Instead of having a hot standby disk, reserve storage space is maintained in a plurality of data storage devices in the storage system. The reserve storage space comprises unallocated storage space in the plurality of data storage devices. Once a data storage device failure is detected, data redundancy is restored on the reserve storage space.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: January 1, 2008
    Assignee: Oracle International Corporation
    Inventor: William Havinden Bridge, Jr.
  • Patent number: 7310758
    Abstract: A method of employing a plurality of integrated circuits in a multi-chip module is described. The method comprises steps of identifying a defective programmable logic device implemented on a first die; identifying a functional programmable logic device implemented on a second die; and coupling the defective programmable logic device and the functional programmable logic device. According to an alternate embodiment, a method of employing a plurality of integrated circuits in a multi-chip module comprises steps of configuring a plurality of programmable logic devices on a multi-chip module. A multi-chip integrated circuit package is also described.
    Type: Grant
    Filed: August 22, 2005
    Date of Patent: December 18, 2007
    Assignee: Xilinx, Inc.
    Inventors: Matthieu P. H. Cossoul, Shekhar Bapat
  • Patent number: 7310703
    Abstract: A method of reading data comprises receiving a request for a stripe of erasure coded data, sending read messages to at least a quorum of storage devices, and receiving at least the quorum of reply messages from the devices. The quorum of the reply messages includes at least a minimum number of stripe blocks needed to decode the data. The quorum meets a quorum condition of a number such that any two selections of the number of the stripe blocks intersect in the minimum number of the stripe blocks. A method of writing data comprises generating a timestamp, encoding the data, sending query messages including the timestamp to the storage devices, receiving query reply messages from each of at least the quorum of the devices, sending write messages to the devices, and receiving a write reply message from each of at least the quorum of the devices.
    Type: Grant
    Filed: October 23, 2003
    Date of Patent: December 18, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Svend Frolund, Arif Merchant, Yasusuhi Saito, Susan Spence, Alistar Veitch
  • Publication number: 20070271480
    Abstract: A method and apparatus to decode audio data constructed with a plurality of layers. An error concealment method of process a decoded bitstream selects one of a frequency domain and a time domain in order to conceal the errors, detects a position where the errors exist in a frame when the error concealment method in the frequency domain is selected, and conceals the errors only in a segment after the detected position.
    Type: Application
    Filed: May 16, 2007
    Publication date: November 22, 2007
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Eun-mi OH, Ho-sang Sung, Chang-yong Son, Ki-hyun Choo, Jung-hoe Kim
  • Patent number: 7296106
    Abstract: A computer system which may allow a centerplaneless design. The computer system may include various client circuit boards including processor circuit boards, memory circuit boards and switch circuit boards. The processor circuit boards may each include at least one processor, while the memory circuit boards may each include memory which is accessible by each processor. The switch circuit boards may include a plurality of detachable connectors for interconnecting each of the processor circuit boards to each of the memory circuit boards. At least one of the switch circuit boards may convey redundant memory access information. Each of the boards may be hot swappable.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: November 13, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Drew G. Doblar, Robert E. Cypher
  • Patent number: 7293195
    Abstract: A system and method for coordinated bringup of a storage appliance in a storage appliance cluster. The repaired storage appliance, during its initialization, sets a variety of state values in a predetermined memory location comprising a state data structure, which is detected by a remote direct memory access read operation by the surviving storage appliance. By the use of the RDMA operations, the repaired storage appliance and surviving storage appliance coordinate the bringup and giveback of data servicing functionality.
    Type: Grant
    Filed: January 29, 2004
    Date of Patent: November 6, 2007
    Assignee: Network Appliance, Inc.
    Inventors: Steven S. Watanabe, Susan M. Coatney, Alan L. Rowe, Ye Sun
  • Patent number: 7284088
    Abstract: A method of reading data comprises sending read messages to storage devices holding the stripe and receiving at least a quorum of reply messages. The reply message from the storage device holding the data block includes the data block. The quorum meets a quorum condition of a number such that any two selections of the number of stripe blocks intersect in the minimum number of the stripe blocks needed to decode the stripe. A method of writing data comprises sending query messages to storage devices holding the stripe, receiving a query reply message from each of at least a first quorum of the storage devices, sending modify messages to the storage devices, and receiving a write reply message from each of at least a second quorum of the storage devices. The first and second quorums each meet the quorum condition.
    Type: Grant
    Filed: October 23, 2003
    Date of Patent: October 16, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Svend Frolund, Arif Merchant, Yasusuhi Saito, Susan Spence, Alistar Veitch
  • Patent number: 7283260
    Abstract: Techniques for restoring parameters and/or values include determining a set of one or more parameters and/or values to be accessed by a user and that are stored in a first memory location, retrieving a duplicate of the set of one or more parameters and/or values to be accessed and storing that duplicate set in another memory location. In the event that one or more of the set of one or more parameters and/or values accessed by a user need to be placed back to their previous state, the duplicate set of one or more parameters and/or values is retrieved to replace one or more of the set of parameters and/or values accessed by the user.
    Type: Grant
    Filed: January 15, 2003
    Date of Patent: October 16, 2007
    Assignee: Xerox Corporation
    Inventor: Julian J. Galban
  • Patent number: 7275196
    Abstract: A reconfigurable circuit having primary function blocks with runtime built-in self-test (BIST) circuitry, one or more redundant function blocks and runtime reconfiguration logic is described herein.
    Type: Grant
    Filed: November 23, 2005
    Date of Patent: September 25, 2007
    Assignee: M2000 S.A.
    Inventor: Frédéric Réblewski
  • Patent number: 7272745
    Abstract: A method according to one embodiment may include assigning a tag to at least one transactions in which at least one data frame is at least one of transmitted or received by at least one functional block. The method may also include discovering, by a functional block, if an error occurs in at least one data frame. The method may also include associating the error with the tag and generating a flush command to at least one functional block to flush data frames associated with said tag. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: September 18, 2007
    Assignee: Intel Corporation
    Inventor: Pak-Lung Seto
  • Patent number: 7266680
    Abstract: A system is provided for configuring a configurable device. The system includes an internal bus in communication with registers and to a configuration circuit. The configuration circuit may include its own registers. The configuration circuit tests a content of at least one of the registers and performs an operation in accordance with the result of the test.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: September 4, 2007
    Assignee: Marvell International Ltd.
    Inventor: Lukas Reinbold
  • Patent number: 7263061
    Abstract: The present invention relates to a packet routing apparatus for routing packets via a pre-established connection in a store and forward network. It is an object of the present invention to realize adaptability to a desired redundant configuration and to avoid degradation in transmission efficiency during a reconfiguration period at low cost and with reliability. In order to achieve the object, the present invention is composed of a routing section for storing inputted packets and routing the packets according to route selection information conforming to the pre-established connection, and a plurality of control sections being arranged redundantly, for controlling the routing section according to a system configuration which conforms to a standby redundancy method, and allowing the operation of the routing section in a reconfiguration process while delivering information necessary for continuing the control to a part which inherits the control.
    Type: Grant
    Filed: November 25, 2002
    Date of Patent: August 28, 2007
    Assignee: Fujitsu Limited
    Inventor: Norio Yamada
  • Patent number: 7260680
    Abstract: There is provided a storage apparatus, which can continue processes to a host without making it recognize any soft errors as failure even if the errors occur in its microprocessor. The storage apparatus comprises: a plurality of host interface control circuits controlling data transfer with a host; a disk interface control circuit controlling data transfer with a physical memory device; a cache memory board storing the data temporarily; and a switch board connecting the host interface control circuits, disk interface control circuit, and cache memory board, wherein each of the host interface control circuits has two or more CPUs and when a soft error occurs in the CPU, data transfer process with the host is inherited to the CPU in which no soft error occurs, so that a reset process to the CPU in which the soft error has occurred is carried out.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: August 21, 2007
    Assignee: Hitachi, Ltd.
    Inventor: Seiichi Abe
  • Patent number: 7249276
    Abstract: A signal route selector for routing a signal between a source and a destination over one of a plurality of alternative routes comprises a response monitor for determining whether transmissions between the source and destination succeed or fail on a selected route. A record of the successes and failures for the routes is maintained and a determination is made of the probability that a transmission will succeed on any route. A route for a transmission is selected according to the probabilities of success for the alternative routes.
    Type: Grant
    Filed: May 29, 2002
    Date of Patent: July 24, 2007
    Assignee: Ericsson AB
    Inventor: Rupert Meese
  • Patent number: 7213173
    Abstract: Disclosed is a control device for preventing hardware strapping fault of a computer system. The computer system includes a central processing unit having a first signal pin, an integrated circuit device having at least one hardware strapping pin, and an external device coupled to the computer system and having a second signal pin. The hardware strapping pin is a multiplexing pin that generates a hardware strapping signal to the central processing unit to perform a hardware strapping operation at the time when the system is being powered on and, after the hardware strapping is completed, is connectable to the second signal pin of the external device. The control device includes a hardware strapping fault prevention circuit coupled between the hardware strapping pin of the integrated circuit device and the second signal pin of the external device to isolate the second signal pin of the external device from the first signal pin of the central processing unit at the time when the system is being powered on.
    Type: Grant
    Filed: June 15, 2004
    Date of Patent: May 1, 2007
    Assignee: Mitac Technology Corp.
    Inventors: Shih-Meng Chen, Chun-Hui Lin
  • Patent number: 7213160
    Abstract: When causing a power saving mode to return by inputting a return signal, power is supplied to a device to which suppliance of power has been cut off. In this case, a power-saving control CPLD is masked to cancel an uncertain signal generated in the device under an intermediate potential at which the voltage of a power-saving-time power cutoff device, which supplies power to the device, is gradually rising. Thus, an erroneous operation caused by the uncertain signal can be prevented. Further, when the voltage of the power-saving-time power cutoff device reaches an operation-guaranteeing voltage, the power-saving control CPLD reads the uncertain signal again. Thereby, intrinsic characteristics of the uncertain signal can be verified, and a secure return operation can be implemented.
    Type: Grant
    Filed: March 13, 2003
    Date of Patent: May 1, 2007
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Takenori Obara, Megumi Fukui, Yukihiro Fukuda
  • Patent number: 7188283
    Abstract: Method and apparatus for configuring a programmable logic device to perform testing on a signal channel is described. Configurable logic of the programmable logic device is configured for a test mode. Configurable interconnects are configured for communication from or to the configurable logic to or from transceivers coupled to the configurable input/output interconnect to communicate test signals.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: March 6, 2007
    Assignee: Xilinx, Inc.
    Inventors: Matthew S. Shafer, Bodhisattva Das, William C. Black, Scott A. Irwin
  • Patent number: 7145865
    Abstract: A method for moving permanent virtual circuits in an ATM network with minimal downtime includes creating a list of the permanent virtual circuits to be moved; building a set of shadow permanent virtual circuits using the new ATM port and a temporary set of virtual path identifier and virtual circuit identifier pairs; moving a physical connection from the original ATM port to the new ATM port; deleting the permanent virtual circuits on the original ATM port; and changing the shadow permanent virtual circuits to use the original virtual path identifier and virtual circuit identifier pairs.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: December 5, 2006
    Assignee: BellSouth Intellectual Property Corp.
    Inventors: Earl C. Meggison, Randy S. Young
  • Patent number: 7139930
    Abstract: A failover method and system is provided for a computer system having at least three nodes operating as a cluster. One method includes the steps of detecting failure of one node, determining the weight of at least two surviving nodes, and assigning a failover node based on the determined weights of the surviving nodes. Another method includes the steps detecting failure of one node and determining the time of failure, and assigning a failover node based in part on the determined time of failure. This method may also include the steps of determining a time period during which nodes in the cluster are heavily utilized, and assigning a failover node that is not heavily utilized during that time period.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: November 21, 2006
    Assignee: Dell Products L.P.
    Inventors: Victor Mashayekhi, Jenwei Hsieh, Mohamad Reza Rooholamini
  • Patent number: 7134040
    Abstract: Provided are a method, system, and program for selecting a path to a device to use when sending data requests to the device. Data requests are submitted to the device on a first path. Device information is maintained indicating a position of a data transfer mechanism of the device that performs the submitted data request. A second path to the device is selected if the first path fails. Data requests are submitted to the indicated position at the device on the selected second path.
    Type: Grant
    Filed: April 17, 2002
    Date of Patent: November 7, 2006
    Assignee: International Business Machines Corporation
    Inventor: James Francis Ayres
  • Patent number: 7126371
    Abstract: When a reset signal /RESET is “L”, a flip-flop circuit holds “1”; on the other hand, a flip-flop circuit holds “0”. When the reset signal /RESET becomes “H”, the flip-flop circuits captures data in synchronous with a clock signal. When a power supply voltage returns to the initial value after an instantaneous blackout occurs, the data of the flip-flop circuits have the same value. An output signal of an exclusive-OR gate circuit becomes “L”, the output is held in a flip-flop circuit. As a result, an instantaneous blackout detection signal becomes “H”.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: October 24, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroo Nakano, Shinichi Hasebe
  • Patent number: 7110830
    Abstract: A microprocessor system includes a plurality of modules, among them a microprocessor and at least one storage module for storing the code and/or data for the microprocessor. Stored, in a non-changeable manner, in at least one of the modules, referred to as exchange-protected module, is a serial number of this module. A control module is configured to receive a data value specified by the at least one serial number and to block, at least partially, the function of the microprocessor system if the received data value does not match an expected data value encoded in the control module.
    Type: Grant
    Filed: March 10, 2004
    Date of Patent: September 19, 2006
    Assignee: Robert Bosch GmbH
    Inventors: Jochen Weber, Klaus Schneider, Axel Aue
  • Patent number: 7103689
    Abstract: A method for operating an automation technology field device connected via a bus system with a superordinated unit and having an identifier identifying the type of the field device, at least one alternative identifier AKF1, which identifies a similar type of field device, is stored, in addition to an identifier KF1, in the field device F1. This alternative identifier AKF1 is transmitted, on query, to the superordinated unit PLC, when the superordinated unit fails to accept as valid the identifier KF1 transmitted in prior queries. In this way, a replacement of a field device is possible simply and quickly.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: September 5, 2006
    Assignee: Endress + Hauser Flowtec AG
    Inventors: Walter Borst, Alain Chomik, Marco Colucci
  • Patent number: 7085989
    Abstract: A method for comparing bit field contents for bit fields comprising less than a full complement of the source is provided. The method includes creating a mask covering the bit field in the source, setting bit positions within the mask that are outside the bit field in the source to predetermined values, combining the source against the mask to form an intermediate result, and comparing bits in the intermediate result to provide a final result. Alternately, the method may form a mask, combining the bit field with a comparison value to form an intermediate value, and perform a combined function using the mask to select bits from the intermediate value, or fixed zero or one values, and comparing this result with zero.
    Type: Grant
    Filed: April 15, 2003
    Date of Patent: August 1, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Sverre Jarp, Dale Morris
  • Patent number: 7058847
    Abstract: There is provided a system and method of disaster restoration of service of damaged or destroyed telecommunication network elements. A controller component is configured to select a damaged or destroyed network element after a disaster event. An engine component is configured to establish connectivity to an alternative network element and to transmit the service continuity data associated with the damaged or destroyed network element from a computer readable storage. The engine component is configured to execute one or more computer commands to the alternative network element so as to operate it with the service continuity data of damaged or destroyed network element. A restoration service package is transmitted to a replacement network element and instructed to use that service package to re-acquire the original network element's identity and provisioning information in order to restore the traffic that originally existed on the damaged or destroyed network element.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: June 6, 2006
    Assignee: AT&T Corporation
    Inventors: Richard L. Guzman, Javad Salahi, Edward K. Sun