Abstract: A TFT 17 provided on a substrate 3 is provided. The TFT 17 includes a gate electrode 31, a gate insulating film 32, a semiconductor 33, a source electrode 34, a drain electrode 35, and a protection film 36. The semiconductor 33 includes a metal oxide semiconductor. The semiconductor 33 has a source portion 33a which is in contact with the source electrode 34, a drain portion 33b which is in contact with the drain electrode 35, and a channel portion 33c which is exposed through the source electrode 34 and the drain electrode 35. A conductive layer 37 having a relatively small electrical resistance is formed in each of the source portion 33a and the drain portion 33b. The conductive layer 37 is removed from the channel portion 33c.

Abstract: To provide a transistor which includes an oxide semiconductor and is capable of operating at high speed or a highly reliable semiconductor device including the transistor, a transistor in which an oxide semiconductor layer including a pair of low-resistance regions and a channel formation region is provided over an electrode layer, which is embedded in a base insulating layer and whose upper surface is at least partly exposed from the base insulating layer, and a wiring layer provided above the oxide semiconductor layer is electrically connected to the electrode layer or a part of a low-resistance region of the oxide semiconductor layer, which overlaps with the electrode layer.

Abstract: A thin film transistor substrate including a plurality of thin film transistors, and a flat panel display apparatus. Each of the plurality of thin film transistors includes an active layer comprising a first channel region having a first plurality of protrusion lines arranged therein and a second channel region and having a second plurality of protrusion lines arranged therein, a source electrode and a drain electrode electrically connected to the active layer and a gate electrode insulated from the active layer, wherein the first and second plurality of protrusion lines extend in a first direction, wherein a edges of the first channel region that extend in the first direction and are offset sideways by a distance in a second direction that is orthogonal to the first direction from corresponding edges of the second channel region that extend in the first direction.

Abstract: A protection circuit for efficiently reducing the influence of ESD and a semiconductor device in which the influence of ESD is efficiently reduced are provided. The protection circuit includes at least two protection diodes. Each protection diode is a transistor including two gates facing each other with a semiconductor layer in which a channel is formed sandwiched between the gates. A fixed potential is applied to one of the gates of the transistor.

Abstract: A thin film transistor includes a substrate with a recess formed therein, a channel region received in the recess, a gate insulating layer formed on the channel region, a gate electrode formed on the gate insulating layer, and a source region and a drain region connecting the channel region, respectively. The gate insulating layer and the gate electrode are positioned between the source region and the drain region. The channel region is made of a nitride compound semiconductor. A method of manufacturing the thin film transistor is also provided.

Abstract: A thin film transistor is provided. A thin film transistor according to an exemplary embodiment of the present invention includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a semiconductor layer disposed on the substrate and including at least a portion overlapping the gate electrode; a gate insulating layer disposed between the gate line and the semiconductor layer; and a source electrode and a drain electrode disposed on the substrate and facing each other over a channel region of the semiconductor layer. The gate insulating layer includes a first region and a second region, the first region corresponds to the channel region of the semiconductor layer, the first region is made of a first material, the second region is made of a second material, and the first material and the second material have different atomic number ratios of carbon and silicon.

Abstract: An organic light-emitting display apparatus includes a thin film transistor on a display region of a substrate, the thin film transistor faces an encapsulation member, an organic light-emitting device on the display region that includes an intermediate layer having an organic emission layer, a sealing member that is between the substrate and the encapsulation member and that surrounds the display region, an internal circuit unit between the display region and the sealing member, a passivation layer that extends to cover the internal circuit unit, a pixel defining layer on the passivation layer, and a getter between the substrate and the encapsulation member, and the getter at least partially overlaps the internal circuit unit.

Abstract: A source electrode and a drain electrode are formed by a stack of a titanium layer, a molybdenum nitride layer, an aluminum layer, and a molybdenum nitride layer, the titanium layer is formed by dry etching, and an oxide semiconductor layer is formed by performing annealing in an oxygen-containing atmosphere after formation of the source electrode and the drain electrode.

Abstract: A TFT array substrate and a manufacturing method thereof, where the TFT array substrate includes a substrate; a gate line and a gate electrode integrated therewith, which are covered by a gate insulating layer, a semiconductor layer, and a ohmic contact layer sequentially. An insulating layer is formed on the resulting substrate and on both sides of the gate line and the gate electrode, the gate insulating layer, the semiconductor layer, and the ohmic contact layer. A trench is then formed in the ohmic contact layer to divide the ohmic contact layer over the semiconductor layer. A data line and first and second source/drain electrodes are then formed on the insulating layer and the ohmic contact layer.

Abstract: Disclosed is a semiconductor device 100A that has first lightly doped drain regions 31A1 and 32A1 between a source region 34A1 and a channel region 33A1 of a first conductive-type driver circuit TFT 10A1 and/or between a drain region 35A1 and the channel region 33A1 of the first conductive-type driver circuit TFT 10A1, and second lightly doped drain regions 31C and 32C between a source region 34C and a channel region 33C of a first conductive-type pixel TFT 10C and/or between a drain region 35C and the channel region 33C of the first conductive-type pixel TFT 10C, in which the first lightly doped drain regions 31A1 and 32A1 have first conductive-type impurities n1 at a first impurity concentration C1, and the second lightly doped drain regions 31C and 32C have first conductive-type impurities n1 at the first impurity concentration C1 and second conductive-type impurities p2 at a second impurity concentration C2.

Abstract: Provided is a thin film transistor capable of improving reliability in the thin film transistor including an oxide semiconductor layer. A thin film transistor including: a gate electrode; a gate insulating film formed on the gate electrode; an oxide semiconductor layer forming a channel region corresponding to the gate electrode on the gate insulating film; a channel protective film formed at least in a region corresponding to the channel region on the oxide semiconductor layer; and a source/drain electrode. A top face and a side face of the oxide semiconductor layer are covered with the source/drain electrode and the channel protective layer on the gate insulating film.

Abstract: A manufacturing method of a microcrystalline silicon film includes the steps of forming a first microcrystalline silicon film over an insulating film by a plasma CVD method under a first condition; and forming a second microcrystalline silicon film over the first microcrystalline silicon film under a second condition. As a source gas supplied to a treatment chamber, a deposition gas containing silicon and a gas containing hydrogen are used. In the first condition, a flow rate of hydrogen is set at a flow rate 50 to 1000 times inclusive that of the deposition gas, and the pressure inside the treatment chamber is set 67 to 1333 Pa inclusive. In the second condition, a flow rate of hydrogen is set at a flow rate 100 to 2000 times inclusive that of the deposition gas, and the pressure inside the treatment chamber is set 1333 to 13332 Pa inclusive.

Abstract: An Al wiring film having a tapered shape is obtained easily and in a stable manner. An Al wiring film has a double-layer structure including a first Al alloy layer made of Al or an Al alloy, and a second Al alloy layer laid on the first Al alloy layer and having a composition different from a composition of the first Al alloy layer by containing at least one element of Ni, Pd, and Pt. The second Al alloy layer is etched by an alkaline chemical solution used in a developing process of a photoresist, and an end portion of the second Al alloy layer recedes from an end portion of the photoresist. Thereafter, by performing wet etching using the photoresist as a mask, a cross section of the Al wiring film becomes a tapered shape.

Abstract: A Thin Film Transistor (TFT) has a capping layer disposed on the surface of at least one of source and drain electrodes on a substrate, a protective film disposed on the capping layer, and a conductive layer electrically connected to the capping layer via a contact hole formed in the protective layer film.

Abstract: A semiconductor device (ST) includes a substrate (11), a gate electrode (12b), a gate insulating film (13b), an oxide semiconductor film (14b) including a channel part (14bc) formed in a position facing the gate electrode (12b), a source electrode (15bs), and a drain electrode (15bd). The source electrode (15bs) and the drain electrode (15bd) is arranged so as not to overlap with the gate electrode (12b) as viewed in the plane. A region adjacent to the gate electrode (12b) and the source electrode (15bs) and a region adjacent to the gate electrode (12b) and the drain electrode (15bd) are, in a region where the source electrode (15bs) and the drain electrode (15bd) does not overlap with the gate electrode (12b), processed such that resistance in a region of the oxide semiconductor film (14b) including a surface thereof is reduced.

Abstract: There are provided a thin-film transistor that leads to the improved performance and production stability, and a method of manufacturing the thin-film transistor, and an electronic unit using the thin-film transistor. The thin-film transistor includes: an organic semiconductor section including first and second surfaces; a source electrode section adjacent to the first surface; and a drain electrode section adjacent to the second surface. One or both of the source electrode section and the drain electrode section are highly-conductive electrode sections containing an organic semiconductor material higher in conductivity than a material of the organic semiconductor section.

Abstract: A thin film transistor (TFT) includes a gate electrode, a gate insulating layer, a first protective pattern, a second protective pattern, a source electrode, a drain electrode, a semiconductor channel layer, and a passivation layer. The first protective pattern and the second protective pattern are disposed on the gate insulating layer above the gate electrode. The source electrode is disposed on the gate insulating layer and the first protective pattern. The drain electrode is disposed on the gate insulating layer and the second protective pattern. The semiconductor channel layer is disposed on the gate insulating layer, the source electrode, and the drain electrode. In an extending direction from the source electrode to the drain electrode, a length of the first protective pattern is shorter than that of the source electrode, and a length of the second protective pattern is shorter than that of the drain electrode.

Abstract: A transistor includes: a control electrode; an active layer facing the control electrode; a first electrode and a second electrode electrically connected to the active layer; and an insulating layer provided between the control electrode and the active layer, the insulating layer containing diallyl isophthalate resin.

Abstract: The instant application describes a display device that includes a substrate; a gate electrode provided on the substrate; a gate insulating film provided on the gate electrode; a semiconductor layer provided on the gate insulating film; a source electrode and a drain electrode provided on the semiconductor layer; a protective insulating film provided on the source electrode and the drain electrode; a pixel electrode provided on the protective insulating film, and connected to one of the source electrode and the drain electrode through a contact hole formed through the protective insulating film; and a shield provided on the protective insulating film, the shield not being electrically connected to the pixel electrode.

Abstract: It is an object to manufacture and provide a highly reliable display device including a thin film transistor with a high aperture ratio which has stable electric characteristics. In a manufacturing method of a semiconductor device having a thin film transistor in which a semiconductor layer including a channel formation region is formed using an oxide semiconductor film, a heat treatment for reducing moisture and the like which are impurities and for improving the purity of the oxide semiconductor film (a heat treatment for dehydration or dehydrogenation) is performed. Further, an aperture ratio is improved by forming a gate electrode layer, a source electrode layer, and a drain electrode layer using conductive films having light transmitting properties.

Abstract: A laminated body includes a lower electrode formed on a substrate and a basic insulating film which is formed above the lower electrode and covers the lower electrode on the substrate, in which the lower electrode has a film thickness reduction section in which the film thickness of the lower electrode in a portion which is not covered by the basic insulating film is smaller than the film thickness of the lower electrode in a portion which is covered by the basic insulating film in the lower electrode.

Abstract: After an amorphous semiconductor thin film is crystallized by utilizing a catalyst element, the catalyst element is removed by performing a heat treatment in an atmosphere containing a halogen element. A resulting crystalline semiconductor thin film exhibits {110} orientation. Since individual crystal grains have approximately equal orientation, the crystalline semiconductor thin film has substantially no grain boundaries and has such crystallinity as to be considered a single crystal or considered so substantially.

Abstract: A thin film transistor, which is capable of improving carrier mobility, and a display device and an electronic device, each of which uses the thin film transistor, are provided. The thin film transistor includes: a gate electrode; an oxide semiconductor layer including a multilayer film including a carrier travel layer configuring a channel and a carrier supply layer for supplying carriers to the carrier travel layer; a gate insulating film provided between the gate electrode and the oxide semiconductor layer; and a pair of electrodes as a source and a drain. A conduction band minimum level or a valence band maximum level corresponding to a carrier supply source of the carrier supply layer is higher in energy than a conduction band minimum level or a valence band maximum level corresponding to a carrier supply destination of the carrier travel layer.

Abstract: A thin film transistor substrate includes a substrate, a gate electrode on the substrate, an active layer on or below the gate electrode (the active layer at least partially overlapping the gate electrode) including a first active region and a second active region, the first active region and the second active region facing each other and extending beyond the gate electrode, a source electrode electrically connected to the first active region and a drain electrode electrically connected to the second active region, wherein the active layer includes a recess region which is at least partially recessed from a surface of the active layer facing the gate electrode, and the recess region includes a portion extending between the first active region and the second active region.

Abstract: In a TFT that adopts an oxide semiconductor as an active layer and has a resistance layer interposed between the active layer and one of a source and drain electrode, while Vth close to 0 V and a small off current are sustained, an on-current is increased. In a thin-film transistor including a gate electrode, a gate insulating film, a semiconductor layer, a source electrode, and a drain electrode, the semiconductor layer that links the source electrode and drain electrode is made of a metal oxide. The semiconductor layer includes three regions of first, second, and third regions. The first region is connected with the source electrode, the third region is connected with the drain electrode, and the second region is connected between the first region and third region. The resistivities of the three regions have the relationship of the first region>the second region>the third region.

Abstract: Disclosed herein is a method for manufacturing an active array substrate. The method includes the steps of: forming a first patterned metal layer on a substrate; sequentially forming a semiconductor layer, an insulating layer and a second metal layer to cover the first patterned metal layer; forming a patterned photoresist layer on the second metal layer; patterning the second metal layer, the insulating layer and the semiconductor layer to form a second patterned metal layer, a patterned insulating layer and a patterned semiconductor layer, and removing a portion of the patterned photoresist layer; heating the remained portion of the patterned photoresist layer such that the remained portion is fluidized and transformed into a protective layer; and forming a pixel electrode.

Abstract: The invention provides a thin film transistor substrate and a display device including the same. The thin film transistor substrate includes: a substrate; a gate line, a gate insulating layer and an active layer sequentially formed on the substrate; a source and a drain simultaneously formed on the active layer to from a thin film transistor; an insulation layer formed on the thin film transistor, wherein a via is formed in the insulation layer, and the via is formed on a portion of the drain and a portion of the active layer to expose the portion of the drain and the active layer; and a pixel electrode formed in the via and on the insulation layer, wherein the pixel electrode is electrically connected to the drain through the via.

Abstract: The present invention provides a highly controllable device for exposure from the back side and an exposure method, and also provides a method of manufacturing a semiconductor device using the same. The present invention involves exposure with the use of the back side exposure device of which a reflecting means is disposed on the front side of a substrate, apart from a photosensitive thin film surface by a distance X (X=0.1 ?m to 1000 ?m), and formation of a photosensitive thin film pattern in a self alignment manner, with good controllability, at a position a distance Y away from the end of a pattern. The invention fabricates a TFT using that method.

Abstract: A transistor may include a light-blocking layer that blocks light incident on a channel layer. The light-blocking layer may include a carbon-based material. The carbon-based material may include graphene oxide, graphite oxide, graphene or carbon nanotube (CNT). The light-blocking layer may be between a gate and at least one of the channel layer, a source and a drain.

Abstract: A display substrate includes a data line, a gate line and a fan-out line. The data line is disposed in a display area of a base substrate and transfers a data signal to a switching element electrically connected to a pixel electrode. The gate line is disposed in the display area and transfers a gate signal to the switching element. The fan-out line is disposed in a peripheral area of the base substrate surrounding the display area, electrically connected to at least one of the data line and the gate line, and includes a plurality of conductive layers making contact with each other through a contact hole.

Abstract: With a TFT using an oxide semiconductor film, there is such an issue that oxygen deficit is generated in a surface region of the oxide semiconductor film after performing plasma etching of a source/drain electrode, thereby increasing the off-current. Provided is a TFT which includes: a gate electrode on an insulating substrate; a gate insulating film on the gate electrode; an oxide semiconductor film containing indium on the gate insulating film; and a source/drain electrode on the oxide semiconductor film. Further, the peak position derived from an indium 3d orbital in the XPS spectrum of a surface layer in a part of the oxide semiconductor film where the source/drain electrode is not superimposed is shifted towards a high energy side than the peak position derived from the indium 3d orbital in the XPS spectrum of an oxide semiconductor region existing in a lower part of the surface layer.

Abstract: A thin film transistor (TFT) that includes a gate, an oxide semiconductor layer, a gate insulator, a source, and a drain is provided. The gate insulator is located between the oxide semiconductor layer and the gate. The source and the drain are in contact with different portions of the oxide semiconductor layer. Each of the source and the drain has a ladder-shaped sidewall that is partially covered by the oxide semiconductor layer. A method for fabricating the above-mentioned TFT is also provided.

Abstract: The present invention relates to a thin film transistor substrate and method for fabricating the same which can secure an alignment margin and reduce the number of mask steps. A thin transistor substrate according to the present invention includes a gate line and a data line crossing each other to define a pixel, a gate metal pattern under the data line, a thin film transistor having a gate electrode, a source electrode and a drain electrode in the pixel, and a pixel electrode connected to the drain electrode of the thin film transistor by a connection electrode, wherein the data line has a plurality of first slits to disconnect the gate metal pattern from the gate line.

Abstract: A thin-film transistor device which is a bottom-gate thin-film transistor device, includes: a gate electrode formed above a substrate; a gate insulating film formed above the gate electrode; a crystalline silicon thin film formed above the gate insulating film and having a channel region; an amorphous silicon thin film formed above the crystalline silicon thin film including the channel region; and a source electrode and a drain electrode formed above the amorphous silicon thin film, in which an optical bandgap of the amorphous silicon thin film and an off-state current of the thin-film transistor device have a positive correlation.

Abstract: A semiconductor device includes an oxide semiconductor film in which a channel portion is formed and a gate portion arranged to be opposed to the channel portion. A drain portion in which the oxide semiconductor film has been subjected to resistance reduction process and an intermediate area which is provided between the drain portion and the channel portion and has not been subjected to resistance reduction process are formed in the oxide semiconductor film, and the semiconductor device includes a conductive film to block resistance reduction process to the intermediate area at least at a part.

Abstract: A thin-film semiconductor device according to the present disclosure includes: a substrate; a gate electrode formed above the substrate; a gate insulating film formed on the gate electrode; a channel layer that is formed of a polycrystalline semiconductor layer on the gate insulating film; an amorphous semiconductor layer formed on the channel layer and having a projecting shape in a surface; and a source electrode and a drain electrode that are formed above the amorphous semiconductor layer, and a first portion included in the amorphous semiconductor layer and located closer to the channel layer has a resistivity lower than a resistivity of a second portion included in the amorphous semiconductor layer and located closer to the source and drain electrodes.

Abstract: An organic thin film transistor including at least a gate electrode, a source electrode, a drain electrode, an insulator layer and an organic semiconductor layer, at least one of the source electrode and the drain electrode including a conductive polyaniline composition containing (a) a substituted or unsubstituted polyaniline composite which is protonated by an organic protonic acid or its salts represented by M(XCR4(CR52COOR6)COOR7)p and (b) compound having a phenolic hydroxyl group.

Abstract: A semiconductor device (100) includes: a first thin film transistor (105) of a first conductivity type formed on a substrate for each pixel; and a plurality of photosensor sections (200). Each photosensor section (200) includes a photodetecting portion including a thin film diode (202), a capacitor (206) for storing a photocurrent occurring in the thin film diode (202), and a second thin film transistor (204) of the first conductivity type, the photodetecting portion being connected to the capacitor (206) via the second thin film transistor (204); the first and second thin film transistors (105, 204) and the thin film diode (202) have semiconductor layers made of the same semiconductor film; and a characteristic of the first thin film transistor (105) and a characteristic of the second thin film transistor (204) are different.

Abstract: Provided is a thin film transistor array panel. The thin film transistor array panel according to exemplary embodiments of the present invention includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.

Abstract: The invention is to provide a structure of a semiconductor device which achieves quick response and high-speed drive by improving on-state characteristics of a transistor, and to provide a highly reliable semiconductor device. In a transistor in which a semiconductor layer, a source and drain electrode layers, a gate insulating film, and a gate electrode are sequentially stacked, a non-single-crystal oxide semiconductor layer containing at least indium, a Group 3 element, zinc, and oxygen is used as the semiconductor layer. The Group 3 element functions as a stabilizer.

Abstract: A transistor includes an island-like semiconductor film over a substrate, and a conductive film forming a gate electrode over the island-like semiconductor film with a gate insulating film interposed therebetween. The semiconductor film includes a channel forming region, a first impurity region forming a source or drain region, and a second impurity region. The channel forming region is overlapped with the gate electrode crossing the island-like semiconductor film. The first impurity region is adjacent to the channel forming region. The second impurity region is adjacent to the channel forming region and the first impurity region. The first impurity region and the second impurity region have different conductivity. The second impurity region and the channel forming region have different conductivity or have different concentration of an impurity element contained in the second impurity region and the channel forming region in a case of having the same conductivity.

Abstract: Disclosed is an oxide for a semiconductor layer of a thin-film transistor, said oxide being excellent in the switching characteristics of a thin-film transistor, specifically enabling favorable characteristics to be stably obtained even in a region of which the ZnO concentration is high and even after forming a passivation layer and after applying stress. The oxide is used in a semiconductor layer of a thin-film transistor, and the aforementioned oxide contains Zn and Sn, and further contains at least one element selected from group X consisting of Al, Hf, Ta, Ti, Nb, Mg, Ga, and the rare-earth elements.

Abstract: Provided is a thin film transistor and thin film transistor panel array. The thin film transistor includes: a substrate; a gate electrode disposed on the substrate; a semiconductor layer disposed on the substrate and partially overlapping with the gate electrode; a source electrode and a drain electrode spaced apart from each other with respect to a channel region of the semiconductor layer; an insulating layer disposed between the gate electrode and the semiconductor layer; and a barrier layer disposed between the semiconductor layer and the source electrode and between the semiconductor layer and the drain electrode, in which the barrier layer comprises graphene. An ohmic contact is provided based on the type of material used for the semiconductor layer.

Abstract: A phenomenon of change of a contact resistance between an oxide semiconductor and a metal depending on an oxygen content ratio in introduced gas upon depositing an oxide semiconductor film made of indium gallium zinc oxide, zinc tin oxide, or others in an oxide semiconductor thin-film transistor. A contact layer is formed with an oxygen content ratio of 10% or higher in a region from a surface, where the metal and the oxide semiconductor are contacted, down to at least 3 nm deep in depth direction, and a region to be a main channel layer is further formed with an oxygen content ratio of 10% or lower, so that a multilayered structure is formed, and both of ohmic characteristics to the electrode metal and reliability such as the suppression of threshold potential shift are achieved.

Abstract: A display apparatus includes a thin film transistor substrate, a substrate facing the thin film transistor substrate, and a liquid crystal layer. The thin film transistor substrate includes an insulating substrate, a gate electrode disposed on a surface of the insulating substrate, a gate insulating layer covering the gate electrode, a semiconductor layer disposed on the gate insulating layer, a source electrode disposed on the semiconductor layer, and a drain electrode disposed on the semiconductor layer and spaced apart from the source electrode. One of the source electrode and the drain electrode is spaced apart from the gate electrode in a plan view. The gate electrode includes a side surface inclined with respect to the surface of the insulating substrate and is partially overlapped with a portion of the source electrode or the drain electrode in a direction perpendicular to the side surface of the gate electrode.

Abstract: A pixel structure including a substrate, a gate, an insulation layer, a metal oxide semiconductor (MOS) layer, a source and a drain, at least one film layer, and a first electrode layer is provided. The gate is disposed on the substrate. The insulation layer covers the gate. The MOS layer is disposed on the insulation layer above the gate. The source and the drain are disposed on the MOS layer. The film layer covers the MOS layer and includes a transparent photocatalytic material, wherein the transparent photocatalytic material blocks ultraviolet light from reaching the MOS layer. The first electrode layer is electrically connected to the source or the drain.

Abstract: A circuit structure includes a substrate having an array region and a peripheral region. The substrate in the array and peripheral regions includes insulator material over first semiconductor material, conductive material over the insulator material, and second semiconductor material over the conductive material. The array region includes vertical circuit devices which include the second semiconductor material. The peripheral region includes horizontal circuit devices which include the second semiconductor material. The horizontal circuit devices in the peripheral region individually have a floating body which includes the second semiconductor material. The conductive material in the peripheral region is under and electrically coupled to the second semiconductor material of the floating bodies. Conductive straps in the array region are under the vertical circuit devices.

Abstract: A method for manufacturing a thin film transistor includes the step of forming a gate electrode (11aa) on an insulating substrate, the step of forming a gate insulating layer (12) to cover the gate electrode (11aa), and thereafter, forming an oxide semiconductor layer (13a) on the gate insulating layer (12), the step of forming a source electrode (16aa) and a drain electrode (16b) on the oxide semiconductor layer (13a) by dry etching, with a channel region (C) of the oxide semiconductor layer being exposed, and the step of supplying oxygen radicals to a channel region of the oxide semiconductor layer.

Abstract: A semiconductor thin-film manufacturing method includes: forming, above a substrate, an amorphous silicon film (precursor film) having a photoluminescence (PL) intensity greater than or equal to 0.65 when photon energy is 1.1 eV in a PL spectrum normalized to have a maximum PL intensity of 1; and annealing the amorphous silicon film to form a crystalline silicon film.

Abstract: An LCD device is disclosed, to minimize the signal distortion by decreasing the instability of voltage in a-Si:H TFT of a gate driving signal output unit, which includes a signal controller for outputting first and second control signals Q and /Q; a pull-up transistor between a clock signal terminal CLK and a gate driving signal output terminal for receiving the first control signal Q, the pull-up transistor having a first gate electrode, a first source electrode and a first drain electrode, wherein the pull-up transistor has an asymmetric structure in a first area of the first source electrode overlapped with the first gate electrode and a second area of the first drain electrode overlapped with the first gate electrode; and a pull-down transistor connected between the gate driving signal output terminal and a ground voltage terminal, wherein the pull-down transistor receives the second control signal.