Abstract: A pixel structure including a semiconductor layer having at least one source region and at least one drain region; a first insulating layer covering the semiconductor layer; a first conductive layer on the first insulating layer and including at least one gate; a second insulating layer covering the first conductive layer; a second conductive layer on the second insulating layer and including at least one source electrode, at least one drain electrode and at least one bottom electrode, the source region, the source electrode, the drain region, the drain electrode and the gate forming at least one thin film transistor; a third insulating layer covering the second conductive layer; a third conductive layer on the third insulating layer and including at least one top electrode, the top electrode and the bottom electrode forming at least one capacitor; and a pixel electrode electrically connected to the thin film transistor.

Abstract: A method for manufacturing a pixel structure is provided. A thin film transistor is formed on a substrate and an insulating layer is formed to cover the substrate and the thin film transistor. The insulating layer is patterned by a half-tone mask to form a protruding pattern, a sunken pattern connecting the protruding pattern, and a contact window inside the sunken pattern. A transparent conductive layer is formed to cover the protruding pattern and the sunken pattern, and filled in the contact window. A passivation layer is formed to cover the transparent conductive layer. A pixel electrode pattern is formed from the transparent conductive layer by removing a part of the passivation layer located on the protruding pattern, a part of the transparent conductive layer on the protruding pattern, and a part of the passivation layer located within the contact window. A pixel structure manufactured by the method is provided.

Abstract: A finFET device includes a substrate, at least a first fin structure disposed on the substrate, a L-shaped insulator surrounding the first fin structure and exposing, at least partially, the sidewalls of the first fin structure, wherein the height of the L-shaped insulator is inferior to the height of the first fin structure in order to expose parts of the sidewalls surface of the first fin structure, and a gate structure disposed partially on the L-shaped insulator and partially on the first fin structure.

Abstract: A pixel structure includes a substrate, a gate line, a data line, a semiconductor pattern, a non-metal source electrode pattern, a non-metal drain electrode pattern, and a pixel electrode. The gate line and the data line are disposed on the substrate. The semiconductor pattern is disposed on the gate line, and the semiconductor pattern overlaps two corresponding edges of the gate line along a vertical projective direction. The non-metal source electrode pattern and the non-metal drain electrode pattern are disposed on the semiconductor pattern. The non-metal source electrode pattern and the non-metal drain electrode pattern are respectively disposed on two corresponding edges of the gate line. The non-metal source electrode pattern is partially disposed between the data line and the gate line. The pixel electrode is electrically connected to the non-metal drain electrode pattern.

Abstract: The present invention relates to a mother substrate and a method for manufacturing the same, the mother substrate comprising: a substrate, comprising at least one display region and pre-cutting regions in a periphery of the display region, wherein the display region comprises gate scanning lines and data scanning lines, the pre-cutting regions comprise a gate-line connecting line and a data-line connecting line electrically connected to each other, and the gate-line connecting line is electrically connected to all of the gate scanning lines in the display region, and the data-line connecting line is electrically connected to all of the data scanning lines in the display region substrate.

Abstract: The time taken to write a signal to a pixel is shortened in a display device. Further, a signal is written at high speed even when high voltage is applied. The display device includes a pixel including a transistor and a liquid crystal element electrically connected to a source or a drain of the transistor. The transistor includes an intrinsic or substantially intrinsic oxide semiconductor as a semiconductor material and has an off-state current of 1×10?17 A/?m or less. The pixel does not include a capacitor. Since it is not necessary to provide a capacitor, the time taken to write a signal can be shortened.

Abstract: A display device and a manufacturing method thereof are provided. The display device includes a substrate, a semiconductor layer formed on the substrate, an organic insulating layer formed on the semiconductor layer, a plurality of conductive wires formed on the organic insulating layer. The organic insulating layer has an open groove that is formed between the conductive wires.

Abstract: A display substrate includes a base substrate, a thin-film transistor (TFT), a color filter and a pixel electrode. The TFT is on the base substrate. The color filter is on the base substrate including the TFT and in contact with the base substrate. The pixel electrode is on the color filter and in electrical connection to a drain electrode of the TFT.

Abstract: A thin film transistor includes a substrate, a gate electrode formed on the substrate, a gate insulating layer formed on the gate electrode, a channel region formed on the gate insulating layer, a source region and a drain region formed at two opposite ends of the channel region, a first etching block layer made of silicon oxide and a second etching block layer made of silicon nitride which are formed in sequence on the channel region. The second etching block layer defines a groove in a center thereof to expose a part of the first etching block layer. The groove divides the second etching block layer into a first region and a second region. A source electrode extends from the source region to the first region. A drain electrode extends from the drain region to the second region.

Abstract: A thin film transistor is provided. A thin film transistor according to an exemplary embodiment of the present invention includes: a substrate; a gate electrode disposed on the substrate; a gate insulating layer disposed on the gate electrode; a semiconductor layer disposed on the gate insulating layer; and a source electrode and a drain electrode disposed on a portion of the semiconductor layer, wherein the semiconductor layer includes an ohmic contact layer, a channel layer, and a buffer layer, the buffer layer disposed between the channel layer and the ohmic contact layer, and the source electrode and the drain electrode contact a surface of the ohmic contact layer.

Abstract: A thin film transistor with favorable electric characteristics is provided. The thin film transistor includes a gate electrode, a gate insulating layer, a semiconductor layer which includes a microcrystalline semiconductor region and an amorphous semiconductor region, an impurity semiconductor layer, a wiring, a first oxide region provided between the microcrystalline semiconductor region and the wiring, and a second oxide region provided between the amorphous semiconductor region and the wiring, wherein a line tangent to the highest inclination of an oxygen profile in the first oxide region (m1) and a line tangent to the highest inclination of an oxygen profile in the second oxide region (m2) satisfy a relation of 1<m1/m2<10, on the semiconductor layer side from an intersection of a profile of an element included in the wiring and a profile of an element included in the semiconductor layer.

Abstract: Provided is an oxide thin-film transistor (TFT) substrate that may enhance the display quality of a display device and a method of fabricating the same via a simple process. The oxide TFT substrate includes: a substrate, a gate line, a data line, an oxide TFT, and a pixel electrode. An oxide layer of the oxide TFT includes a first region that has semiconductor characteristics and a channel, and a second region that is conductive and surrounds the first region. A portion of the first region is electrically connected to the pixel electrode, and the second region is electrically connected to the data line.

Abstract: Provided are a composition for an oxide thin film, a preparation method of the composition, a method for forming an oxide thin film using the composition, an electronic device including the oxide thin film, and a semiconductor device including the oxide thin film. The composition for the oxide thin film includes a metal precursor and nitric acid-based stabilizer. The metal precursor includes at least one of a metal nitrate, a metal nitride, and hydrates thereof.

Abstract: An OLED apparatus including a thin film transistor including an activation layer, a gate electrode insulated from the activation layer and including a lower gate electrode and an upper gate electrode, an interlayer insulation film covering the gate electrode, and a source and drain electrode on the insulation film and contacting the activation layer; an OLED including a pixel electrode electrically connected to the thin film transistor, an intermediate layer including an emissive layer, and an opposite electrode; a blister prevention layer on a same level as the activation layer; a gate insulation layer covering the activation layer and the blister prevention layer and insulating the activation layer from the gate electrode; and an interconnection unit including first and second layers on a portion of the gate insulation layer overlying the blister prevention layer, wherein the blister prevention layer protects the interconnection unit on the gate insulation layer from blistering.

Abstract: The present invention provides a TFT substrate and manufacturing method thereof and a liquid crystal display device. The method includes: sequentially depositing a dielectric layer, a first metal layer, and a first semiconductor layer on a substrate; applying half-toning technique to form a first photoresist layer; removing portions of the dielectric layer, the first metal layer and the first semiconductor layer and making a portion of the dielectric layer exposed; removing the first photoresist layer and sequentially forming a second semiconductor layer, a first protection layer, and a second metal layer on the substrate; forming a second photoresist layer; removing all the layers on the substrate that are not covered; and removing the second photoresist layer and forming a second protection layer. The invention uses only two masking processes of half-toning and regular mask. The number of masking process is reduced and the manufacturing of TFT substrate is greatly simplified.

Abstract: Disclosed are thin film transistor devices incorporating a crosslinked inorganic-organic hybrid blend material as the gate dielectric. The blend material, obtained by thermally curing a mixture of an inorganic oxide precursor sol and an organosilane crosslinker at relatively low temperatures, can afford a high gate capacitance, a low leakage current density, and a smooth surface, and can be used to enable satisfactory transistor device performance at low operating voltages.

Abstract: Provided is a thin film transistor, wherein the on-off ratio thereof is increased by decreasing the OFF current thereof. A bottom-gate TFT (10) is provided with a channel layer (40) obtained by forming a second silicon layer (35) on a first silicon layer (30). Since amorphous silicon regions (32), which surround multiple grains (31) contained in the first silicon layer (30), contain hydrogen in an amount sufficient to enable termination of dangling bonds, most of dangling bonds in the amorphous silicon region (32) are terminated by hydrogen. For this reason, it becomes less likely to have defect levels formed in the amorphous silicon regions (32), and an OFF current that flows through defect levels is therefore decreased. A high number of the grains (31) are retained in the first silicon layer (30), and cause a large ON current to flow. Consequently, the on-off ratio of the TFT (10) is increased.

Abstract: An organic light-emitting display apparatus includes a substrate including a plurality of red, green, and blue sub-pixel regions, a pixel electrode in each of the plurality of the red, green, and blue sub-pixel regions on the substrate, a Distributed Bragg Reflector (DBR) layer between the substrate and the pixel electrodes, a high-refractive index layer between the substrate and the DBR layer in the blue sub-pixel region, the high-refractive index layer having a smaller area than an area of a corresponding pixel electrode in the blue sub-pixel region, an intermediate layer including an emissive layer on the pixel electrode, and an opposite electrode on the intermediate layer.

Abstract: A method of fabricating a semiconductor device includes forming a plurality of line element on a provided substrate. The plurality of line elements includes a first line element having a first region having a first width and a biased region having a second width. The second width different than the first width. Spacer elements are then formed abutting sidewalls of each of the plurality of line elements including the biased region where the spacer elements may be shifted. After forming the spacer elements, the plurality of line elements from the substrate are removed from the substrate. An underlying layer is etched using the spacer elements after removing the plurality of line elements.

Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Abstract: Disclosed is a thin film transistor which has an oxide semiconductor as an activation layer, a method of manufacturing the same and a flat panel display device having the same. The thin film transistor includes an oxide semiconductor layer formed on a substrate and including a channel region, a source region and a drain region, a gate electrode insulated from the oxide semiconductor layer by a gate insulating film, and source electrode and drain electrode which are coupled to the source region and the drain region, respectively. The oxide semiconductor layer includes a first layer portion and a second layer portion. The first layer portion has a first thickness and a first carrier concentration, and the second layer portion has a second thickness and a second carrier concentration. The second carrier concentration is lower than the first carrier concentration.

Abstract: An array substrate includes: a substrate; a gate line and a gate electrode on the substrate; a gate insulating layer on the gate line and the gate electrode, the gate insulating layer including a first insulator and a second insulator on the first insulator, wherein the first insulator includes an aluminum oxide material and has a first thickness, and the second insulator includes a hafnium oxide material and has a second thickness; an oxide semiconductor layer on the gate insulating layer over the gate electrode; a data line over the gate insulating layer; a source electrode and a drain electrode contacting the oxide semiconductor layer; a passivation layer on the data line, the source electrode and the drain electrode; and a pixel electrode on the passivation layer, the pixel electrode connected to a drain electrode through a drain contact hole.

Abstract: A method for manufacturing a thin film transistor array panel includes forming a gate line and a gate electrode protruding from the gate line on a substrate; forming a gate insulating layer on the gate line and the gate electrode; depositing sequentially a semiconductor material and a metal material on the gate insulating layer; performing a first etching operation on the semiconductor material and the metal material using a first mask to form a semiconductor layer and a metal layer, the metal layer including a data line, a source electrode, and a drain electrode, in which the drain electrode protrudes from the data line, and the source electrode and the drain electrode having an integral shape; and performing a second etching operation on the metal layer using a second mask to divide the source electrode and the drain electrode.

Abstract: A semiconductor apparatus having a substrate and a laminate structure formed on the substrate, the laminate structure including an insulating film made of a metal oxide and a semiconductor thin film, both the insulating film and the semiconductor thin film being crystallized.

Abstract: Doped semiconductor ink formulations, methods of making doped semiconductor ink formulations, methods of coating or printing thin films, methods of forming electronic devices and/or structures from the thin films, and methods for modifying and controlling the threshold voltage of a thin film transistor using the films are disclosed. A desired dopant may be added to an ink formulation comprising a Group IVA compound and a solvent, and then the ink may be printed on a substrate to form thin films and conductive structures/devices, such as thin film transistors. By adding a customized amount of the dopant to the ink prior to printing, the threshold voltage of a thin film transistor made from the doped semiconductor ink may be independently controlled upon activation of the dopant.

Abstract: In a transistor including an oxide semiconductor film, a metal oxide film which has a function of preventing electrification and covers a source electrode and a drain electrode is formed in contact with the oxide semiconductor film, and then, heat treatment is performed. Through the heat treatment, impurities such as hydrogen, moisture, a hydroxyl group, or hydride are intentionally removed from the oxide semiconductor film, whereby the oxide semiconductor film is highly purified. By providing the metal oxide film, generation of a parasitic channel on the back channel side of the oxide semiconductor film in the transistor is prevented.

Abstract: A semiconductor device includes a gate, a first electrode, a first insulating layer, an active layer, an etching stop layer, a second insulating layer, a source, a drain and a second electrode. The first insulating layer covers the gate and the first electrode. The active layer and the etching stop layer are disposed on the first insulating layer above the gate and the first electrode respectively. The second insulating layer covers the active layer and the etching stop layer and has a first opening and a second opening exposing the active layer and a third opening exposing the etching stop layer. The source and the drain are disposed on the second insulating layer and contact with the active layer through the first opening and the second opening respectively. The second electrode is located on the second insulating layer and contacts with the etching stop layer through the third opening.

Abstract: A thin film transistor array panel includes an insulation substrate; a gate line on the insulation substrate; a gate insulating layer on the gate line; a data line on the gate insulating layer; a first insulating layer on the data line and including a first contact hole which exposes a portion of the data line; a first connection assistant member in the first contact hole; and further including a first field generating electrode on the first insulating layer. The first field generating electrode is in connection with the exposed portion of the data line through the first connection assistant member.

Abstract: A method of replacing semiconductor material with metal, Replacement Metal Gate Field Effect Transistors (RMG FETs) and Contacts (RMCs), and Integrated Circuit (IC) chips including the FETs and/or RMCs. A patterned semiconductor layer, e.g., silicon, is formed on a dielectric layer, e.g., a layered gate dielectric. A field dielectric layer fills between shapes in the patterned semiconductor layer. Metal is deposited on the shapes. The wafer is annealed to replace semiconductor in each shape with metal to form metal FET gates or contacts.

Abstract: Discussed is a composition of an organic insulating layer comprising a photosensitizer, a binder, an additive and a solvent, wherein the photosensitizer includes a photoacid generator (PAG), and a thin film transistor substrate and display device using the same, wherein the composition of the present invention enables to realize a simplified process by omitting an additional entire-surface exposing process for a color change, and a baking process after an exposing process; and to minimize a problem of color-coordinates shift by realizing a good light transmittance.

Abstract: A thin film transistor and a fabricating method thereof are provided. The thin film transistor includes a gate, a gate insulator, an oxide semiconductor layer, a source, a drain, and a light barrier. The gate insulator covers the gate. The oxide semiconductor layer is disposed on the gate insulator and located above the gate. The source and the drain are disposed on parts of the oxide semiconductor layer. The light barrier is located above the oxide semiconductor layer and includes a first insulator, an ultraviolet shielding layer, and a second insulator. The first insulator is disposed above the oxide semiconductor layer. The ultraviolet shielding layer is disposed on the first insulator. The second insulator is disposed on the ultraviolet shielding layer.

Abstract: A thin film transistor array substrate may include a thin film transistor including an active layer, a gate electrode, source and drain electrodes, a first insulation layer arranged between the active layer and the gate electrode, and a second insulation layer arranged between the gate electrode and the source and drain electrodes, a pixel electrode arranged on the first insulation layer and comprising the same material as the gate electrode, a capacitor comprising a first electrode arranged on the same layer as the active layer and a second electrode arranged on the same layer as the gate electrode, a pad electrode arranged on the second insulation layer and comprising the same material as the source and drain electrodes, a protection layer formed on the pad electrode, and a third insulation layer formed on the protection layer and exposing the pixel electrode.

Abstract: A thin film transistor, a display device, and a manufacturing method thereof. The thin film transistor includes a control electrode, a semiconductor overlapping the control electrode, and an input electrode and an output electrode disposed on or under the semiconductor and opposite to each other. The semiconductor includes a first portion disposed between the input electrode and the output electrode and having a first crystallinity, and a second portion connected with the first portion, which overlaps the input electrode or the output electrode, and having a second crystallinity. The first crystallinity is higher than the second crystallinity.

Abstract: An organic thin film transistor comprising: a substrate; a source electrode and a drain electrode defining a channel; a layer of insulating material disposed over the source and drain electrodes; a layer of organic semi-conductive material extending across the channel; a layer of dielectric material; and a gate electrode disposed over the layer of dielectric material.

Abstract: A thin film transistor array and a circuit structure thereof are provided. The circuit structure includes a patterned metal layer, a transparent conductive layer and a dielectric layer. The transparent conductive layer is formed on and contacts a top surface of the patterned metal layer. The dielectric layer overlies and contacts the patterned metal layer and the transparent conductive layer. In addition, the dielectric layer has a contact window to expose a portion of the transparent conductive layer. The transparent conductive layer on the top surface of the patterned metal layer can protect the surface layer metal against damage during fabrication of the contact window.

Abstract: In a semiconductor element including an oxide semiconductor film as an active layer, stable electrical characteristics are achieved. A semiconductor element includes a base film which is an oxide film at least a surface of which has crystallinity; an oxide semiconductor film having crystallinity over the base film; a gate insulating film over the oxide semiconductor film; a gate electrode overlapping with at least the oxide semiconductor film, over the gate insulating film; and a source electrode and a drain electrode which are electrically connected to the oxide semiconductor film. The base film is a film containing indium and zinc. With the structure, a state of crystals in the oxide semiconductor film reflects that in the base film; thus, the oxide semiconductor film can have crystallinity in a large region in the thickness direction. Accordingly, the electrical characteristics of the semiconductor element including the film can be made stable.

Abstract: A thin film transistor array substrate includes a thin film transistor including an activation layer, a gate electrode, source and drain electrodes, a first insulation layer between the activation layer and the gate electrode, and a second insulation layer between the gate electrode and the source and drain electrodes, a pixel electrode including a transparent conductive oxide, the pixel electrode being on a portion of the first insulation layer extending from the thin film transistor and being connected to one of the source and drain electrodes via an opening in the second insulation layer, a capacitor including a first electrode and a second electrode, the first electrode being on a same layer as the activation layer and including a transparent conductive oxide, and the second electrode being between the first and second insulation layers, and a third insulation layer covering the source and drain electrodes and exposing the pixel electrode.

Abstract: The present invention discloses a TFT, an array substrate, a device and a manufacturing method. The TFT comprises a conductive metal layer; an insulting oxidizing layer is formed on the surface of the metal layer. In the present invention, because the oxidation treatment is conducted on the surface of the metal layer, the insulating oxidizing layer is formed and can substitute for the silicon nitride as a TFT barrier layer; compared with the preparation of a silicon nitride barrier layer needing the drilling crew and the material cost, the preparation of the oxidizing layer needs cheap equipment without increasing further materials so that the cost is saved; in addition, the oxidizing layer only exists on the surface of the metal layer, and has small obstruction for light and low requirement for the penetration rate; thus, the process control is relatively simple and the cost can be further reduced.

Abstract: The present invention provides a multilayer wiring capable of reducing the area of the wiring layer while preventing the property deterioration due to the parasitic capacitance, a semiconductor device, a substrate for display device, and a display device. The multilayer wiring of the present invention includes: a first conductor; a second conductor; and a third conductor. The first conductor is positioned in a (n+1)th conductive layer. The second conductor is positioned in a (n+2)th conductive layer, is electrically connected to a conductor in a layer below the (n+1)th conductive layer through at least a first connection hole in a (n+1)th insulating layer directly below the (n+2)th conductive layer, and is positioned so as not to overlap with the first conductor in a plan view of the main face of the substrate.

Abstract: An active device including a source, a drain, an oxide semiconductor layer, a gate and a gate insulator layer is provided. The source includes first stripe electrodes parallel to each other and a first connection electrode connected thereto. The drain includes second stripe electrodes parallel to each other and a second connection electrode connected thereto, wherein the first stripe electrodes and the second stripe electrodes are parallel to each other, electrically isolated, and alternately arranged, and a zigzag trench is formed therebetween. The gate extends along the zigzag trench. The oxide semiconductor layer is in contact with the source and drain, wherein a contact area among the oxide semiconductor layer and each first stripe electrodes substantially equals to a layout area of each first stripe electrodes and a contact area among each second stripe electrodes substantially equals to a layout area of each second stripe electrodes.

Abstract: An organic light-emitting display device having a thin film transistor including an active layer, a gate electrode, a lower gate electrode, an upper gate electrode, an insulating layer covering the gate electrode, source and drain electrodes that are formed on the insulating layer and contact the active layer. An organic light-emitting diode is electrically connected to the thin film transistor and includes a pixel electrode formed at the same layer level as the lower gate electrode, an intermediate layer including an emission layer, and a counter electrode. A lower pad electrode is formed at the same layer level as the lower gate electrode and an upper pad electrode is formed at the same layer level as the upper gate electrode.

Abstract: A thin-film transistor may include a drain electrode, a source electrode, an active layer, a gate electrode, and a gate insulating layer. In a vertical sectional view, the gate insulating layer may be disposed between the active layer and the gate electrode to include a first inorganic layer, an organic layer, and a second inorganic layer sequentially stacked. According to a method of fabricating the thin-film transistor, the gate insulating layer may be formed between the steps of forming the active layer and the second electrode layer or between the steps of forming the first electrode layer and the second electrode layer.

Abstract: Thin-film transistors and techniques for forming thin-film transistors (TFT). In some embodiments, there is provided a method of forming a TFT, comprising forming a body region of the TFT comprising an organic semiconducting material, and forming a protective layer comprising an organic insulating material. Forming the protective layer comprises contacting the body region of the TFT with a solution comprising the organic insulating material. The organic insulating material is a material that phase separates with the organic semiconducting material when the solution contacts the organic semiconducting material. In other embodiments, there is provided an apparatus comprising a TFT.

Abstract: The present invention provides an array substrate, a method for manufacturing an array substrate, and a display device which are such that reflow failure of a resist mask does not occur readily at the time of manufacture of the array substrate, so the array substrate can be manufactured reliably. At the time of forming a TFT, third wiring 37 between source wiring 13 and the source electrode 22 of the TFT is provided with a narrow portion 38 that is formed with a narrow width by narrowing a midpoint at a portion of the wiring in planar shape, and the resist film on the source electrode 22 and a drain electrode 23 is reflowed so as to cover the surface of a channel region Q, thus forming a reflowed resist film 42. A semiconductor film 20 is etched using this as the etching mask in a state in which the area between the source and the drain is protected, thus making the semiconductor film 20 into an island shape.

Abstract: Provided is a solution composition for manufacturing a metal oxide semiconductor including aluminum salts, metal acetylacetonate and a solvent. In addition, provided is a method for manufacturing a metal oxide semiconductor, including: manufacturing of a metal oxide semiconductor by performing heat treatment after coating a solution composition for manufacturing the metal oxide semiconductor above a substrate. In addition, provided is a thin film transistor, including: a gate substrate; a metal oxide semiconductor manufactured to be overlapped with the gate substrate; a source electrode electrically connected to the metal oxide semiconductor; and a drain electrode that is electrically connected to the metal oxide semiconductor and faces the source electrode.

Abstract: A pixel structure and a method for manufacturing the same are disclosed. The pixel structure of the present invention is a pixel structure implemented by combining an in-plane switching (IPS) technique and a fringe field switching (FFS) technique. In each pixel structure, two transparent conductive layers are utilized to form a storage capacitor (Cst) such that the capacitance of the storage capacitor can be increased without decreasing an aperture ratio of a display panel, and thereby a feedthrough voltage can be reduced so as to prevent a screen from blinking.

Abstract: A thin-film transistor array substrate is disclosed. In one embodiment, the substrate includes: i) a thin-film transistor including an active layer, and gate, source and drain electrodes, ii) a lower electrode of a capacitor, iii) an upper electrode of the capacitor formed on the lower electrode iv) a first insulation layer between the lower and upper electrodes, and between the active layer and the gate electrode, and having a gap outside the lower electrode. The substrate may further include i) a second insulation layer formed on the first insulation layer and having the same etching surface as the first insulation layer in the gap, ii) a bridge formed of the same material as the source and drain electrodes, and filling a part of the gap and iii) a third insulation layer covering the source and drain electrodes and exposing a pixel electrode.

Abstract: A fringe field switching (FFS) liquid crystal display (LCD) device which uses an organic insulating layer and consumes less power, in which film quality of an upper layer of a low temperature protective film is changed to improve undercut within a pad portion contact hole, and a method for fabricating the same is provided.

Abstract: A semiconductor device which achieves miniaturization with favorable characteristics maintained is provided. In addition, a miniaturized semiconductor device is provided with high yield. In a semiconductor device including an oxide semiconductor, the contact resistance between the oxide semiconductor and the source electrode or the drain electrode is reduced with miniaturization advanced. Specifically, an oxide semiconductor film is processed to be an island-shaped oxide semiconductor film whose side surface has a tapered shape. Further, the side surface has a taper angle greater than or equal to 1° and less than 10°, and at least part of the source electrode and the drain electrode is in contact with the side surfaces of the oxide semiconductor film. With such a structure, the contact region of the oxide semiconductor film and the source electrode or the drain electrode is increased, whereby the contact resistance is reduced.

Abstract: One object is to provide a semiconductor device that includes an oxide semiconductor and is reduced in size with favorable characteristics maintained. The semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode in contact with the oxide semiconductor layer, a gate electrode overlapping with the oxide semiconductor layer; and a gate insulating layer between the oxide semiconductor layer and the gate electrode. The source electrode or the drain electrode includes a first conductive layer and a second conductive layer having a region extended in a channel length direction from an end face of the first conductive layer. The sidewall insulating layer has a length of a bottom surface in the channel length direction smaller than a length in the channel length direction of the extended region of the second conductive layer and is provided over the extended region.