Abstract: Disclosed herein is a thin film transistor array substrate. The thin film transistor array substrate includes a display area and a non-display area. The non-display area includes a signal line, a connecting line and a metal contact. The connecting line is formed in a first patterned metal layer. The signal line and the metal contact are formed in a second patterned metal layer. The connecting line is connected to the signal line by a first through-hole, and the connecting line is connected to the metal contact by a second through-hole Furthermore, a method of fabricating the thin film transistor array substrate is also disclosed.

Abstract: Provided are a thin film transistor having a passivation layer capable of annealing at low temperature and having stable electric characteristics, and a flexible display using the same. In one embodiment, the thin film transistor includes a passivation layer formed on an active layer, the passivation layer including a fluoropolymer.

Abstract: A method of manufacturing a thin-film semiconductor device according to the present disclosure includes: preparing a substrate; forming a gate electrode above the substrate; forming a first insulating film on the gate electrode; forming a semiconductor thin film that is to be a channel layer, on the first insulating film; forming a second insulating film on the semiconductor thin film; irradiating the second insulating film with a beam so as to increase a transmittance of the second insulating film; and forming a source electrode and a drain electrode above the channel layer.

Abstract: Display substrates including a capacitor, methods of repairing a display substrate, and display devices including the display substrate are disclosed. In one embodiment, the capacitor includes a first electrode layer, a dielectric layer, and a second electrode layer sequentially stacked. A portion of the second electrode layer is shorted to the first electrode layer. An opening penetrates the second electrode layer to expose a top surface of the dielectric layer. Due to the opening, the shorted portion is separated from the surrounding portions of the second electrode layer. The opening may be formed by irradiating a laser.

Abstract: It is an object to manufacture a highly reliable semiconductor device including a thin film transistor whose electric characteristics are stable. An insulating layer which covers an oxide semiconductor layer of the thin film transistor contains a boron element or an aluminum element. The insulating layer containing a boron element or an aluminum element is formed by a sputtering method using a silicon target or a silicon oxide target containing a boron element or an aluminum element. Alternatively, an insulating layer containing an antimony (Sb) element or a phosphorus (P) element instead of a boron element covers the oxide semiconductor layer of the thin film transistor.

Abstract: Hydrogen concentration and oxygen vacancies in an oxide semiconductor film are reduced. Reliability of a semiconductor device which includes a transistor using an oxide semiconductor film is improved. One embodiment of the present invention is a semiconductor device which includes a base insulating film; an oxide semiconductor film formed over the base insulating film; a gate insulating film formed over the oxide semiconductor film; and a gate electrode overlapping with the oxide semiconductor film with the gate insulating film provided therebetween. The base insulating film shows a signal at a g value of 2.01 by electron spin resonance. The oxide semiconductor film does not show a signal at a g value of 1.93 by electron spin resonance.

Abstract: A (liquid crystal display) LCD includes a pixel array and a gate driving circuit. The pixel array includes a plurality of first oxide thin film transistors, a first oxide thin film transistor of the first oxide thin film transistors with a shortest channel length having a first channel length. The gate driving circuit is coupled to the pixel array for driving the pixel array, and includes a plurality of second oxide thin film transistors. The second oxide thin film of the second oxide thin film transistors with a longest channel length has a second channel length. A ratio of the second channel length and the first channel length is greater than 1.5. By limiting the ratio of the second channel length and the first channel length, the aperture ratio of the display panel can be improved without deteriorating the operation stability of the LCD.

Abstract: When a semiconductor device including a transistor in which a gate electrode layer, a gate insulating film, and an oxide semiconductor film are stacked and a source and drain electrode layers are provided in contact with the oxide semiconductor film is manufactured, after the formation of the gate electrode layer or the source and drain electrode layers by an etching step, a step of removing a residue remaining by the etching step and existing on a surface of the gate electrode layer or a surface of the oxide semiconductor film and in the vicinity of the surface is performed. The surface density of the residue on the surface of the oxide semiconductor film or the gate electrode layer can be 1×1013 atoms/cm2 or lower.

Abstract: An object is to improve field effect mobility of a thin film transistor using an oxide semiconductor. Another object is to suppress increase in off current even in a thin film transistor with improved field effect mobility. In a thin film transistor using an oxide semiconductor layer, by forming a semiconductor layer having higher electrical conductivity and a smaller thickness than the oxide semiconductor layer between the oxide semiconductor layer and a gate insulating layer, field effect mobility of the thin film transistor can be improved, and increase in off current can be suppressed.

Abstract: Some embodiments include formation of at least one cavity in a first semiconductor material, followed by epitaxially growing a second semiconductor material over the first semiconductor material and bridging across the at least one cavity. The cavity may be left open, or material may be provided within the cavity. The material provided within the cavity may be suitable for forming, for example, one or more of electromagnetic radiation interaction components, transistor gates, insulative structures, and coolant structures. Some embodiments include one or more of transistor devices, electromagnetic radiation interaction components, transistor devices, coolant structures, insulative structures and gas reservoirs.

Abstract: A thin film transistor according to one or more embodiments of the present invention includes: an insulation substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode; a semiconductor formed on the gate insulating layer and having a pair of openings facing each other; ohmic contact layers formed in the openings and including a conductive impurity; and a source electrode and a drain electrode in contact with their respective ohmic contact layers. An organic light emitting device in accordance with an embodiment includes: a first signal line and a second signal line intersecting each other on an insulation substrate; a switching thin film transistor connected to the first signal line and the second signal line; a driving thin film transistor connected to the switching thin film transistor; and a light emitting diode (LED) connected to the driving thin film transistor.

Abstract: To suppress a decrease in on-state current in a semiconductor device including an oxide semiconductor. Provided is a semiconductor device including the following: an oxide semiconductor film which serves as a semiconductor layer; a gate insulating film including an oxide containing silicon, over the oxide semiconductor film; a gate electrode which overlaps with at least the oxide semiconductor film, over the gate insulating film; and a source electrode and a drain electrode which are electrically connected to the oxide semiconductor film. In the semiconductor device, the oxide semiconductor film overlapping with at least the gate electrode includes a region in which a concentration of silicon distributed from the interface with the gate insulating film toward the inside of the oxide semiconductor film is lower than or equal to 1.1 at. %.

Abstract: A semiconductor device which is miniaturized while favorable characteristics thereof are maintained is provided. In addition, the miniaturized semiconductor device is provided with a high yield. The semiconductor device has a structure including an oxide semiconductor film provided over a substrate having an insulating surface; a source electrode layer and a drain electrode layer which are provided in contact with side surfaces of the oxide semiconductor film and have a thickness larger than that of the oxide semiconductor film; a gate insulating film provided over the oxide semiconductor film, the source electrode layer, and the drain electrode layer; and a gate electrode layer provided in a depressed portion formed by a step between a top surface of the oxide semiconductor film and top surfaces of the source electrode layer and the drain electrode layer.

Abstract: An organic thin-film transistor includes: a semiconductor layer made of an organic material; a gate electrode; a source electrode and a drain electrode each at least partially provided above the semiconductor layer; and a conductive layer containing an oxide having conductivity that changes due to reduction, the conductive layer being provided in each of a first region and a second region facing the source electrode and the drain electrode provided above the semiconductor layer, respectively.

Abstract: The concentration of impurity elements included in an oxide semiconductor film in the vicinity of a gate insulating film is reduced. Further, crystallinity of the oxide semiconductor film in the vicinity of the gate insulating film is improved. A semiconductor device includes an oxide semiconductor film over a substrate, a source electrode and a drain electrode over the oxide semiconductor film, a gate insulating film which includes an oxide containing silicon and is formed over the oxide semiconductor film, and a gate electrode over the gate insulating film. The oxide semiconductor film includes a region in which the concentration of silicon is lower than or equal to 1.0 at. %, and at least the region includes a crystal portion.

Abstract: A method of manufacturing a thin film transistor array substrate and a structure of the same are disclosed. The manufacturing method merely requires two steps of mask fabrication to accomplish the manufacture of thin film transistor array, in which the manufacturing method utilizes a first mask fabrication step to define a pattern of a source electrode and a drain electrode of the thin film transistor, and a partially-exposed dielectric layer, and utilizes a second mask fabrication step to define an arrangement of a transparent conductive layer. The manufacturing method and structure can dramatically reduce the manufacturing cost of masks and simplify the whole manufacturing process.

Abstract: Provided are an organic TFT manufacturing method whereby flow of ink into an unnecessary area can be suppressed and excellent characteristics and high reliability can be obtained, and an organic TFT. The organic TFT manufacturing method comprises a step of providing a source electrode and a drain electrode on a base member; a step of providing a bank layer, which has an opening on a channel between the source electrode and the drain electrode, an opening on a predetermined area of the base member, and a groove or grooves around the opening on the predetermined area, which surround the opening on the predetermined area; and a step of supplying an organic semiconductor solution to the opening of the bank layer formed on the channel to form an organic semiconductor layer.

Abstract: A pixel structure and a manufacturing method thereof and a display panel are provided. An electrode material layer, a shielding material layer, an inter-layer dielectric material layer, a semiconductor material layer and a photoresist-layer are sequentially formed on a substrate. The semiconductor material layer, the inter-layer dielectric material layer, the shielding material layer and the electrode material layer are patterned using the photoresist-layer as a mask to form a semiconductor pattern, an inter-layer dielectric pattern, a shielding pattern and a pixel electrode. A source/drain electrically connected to the pixel electrode and covering a portion of the semiconductor pattern is formed on the pixel electrode. A channel is another portion of the semiconductor uncovered by the source/drain.

Abstract: A thin-film transistor array device includes: a driving TFT including a first crystalline semiconductor film including crystal grains having a first average grain size; and a switching TFT including a second crystalline semiconductor film including crystal grains having a second average grain size that is smaller than the first average grain size. The first crystalline semiconductor film and the second crystalline semiconductor film are formed at the same time by irradiating a noncrystalline semiconductor film using a laser beam having a Gaussian light intensity distribution such that a temperature of the noncrystalline semiconductor film is within a range of 600° C. to 1100° C., and the first crystalline semiconductor film is formed such that the temperature of the noncrystalline semiconductor film is within a temperature range of 1100° C. to 1414° C. due to latent heat generated by the laser irradiation.

Abstract: A thin film transistor (TFT), including a crystalline semiconductor pattern on a substrate, a gate insulating layer on the crystalline semiconductor pattern, the gate insulating layer having two first source/drain contact holes and a semiconductor pattern access hole therein, a gate electrode on the gate insulating layer, the gate electrode being between the two first source/drain contact holes, an interlayer insulating layer covering the gate electrode, the interlayer insulating layer having two second source/drain contact holes therein, and source and drain electrodes on the interlayer insulating layer, each of the source and drain electrodes being insulated from the gate electrode, and having a portion connected to the crystalline semiconductor pattern through the first and second source/drain contact holes.

Abstract: A semiconductor device includes a first device isolation insulating film formed in a semiconductor substrate, a first well having a first conductivity type, defined by the first device isolation insulating film, and shallower than the first device isolation insulating film, a second device isolation insulating film formed in the first well, shallower than the first well, and defining a first part of the first well and a second part of the first well, a gate insulating film formed above the first part, a gate electrode formed above the gate insulating film, and an interconnection electrically connected to the second part of the first well and the gate electrode, wherein an electric resistance of the first well in a first region below the second device isolation insulating film is lower than an electric resistance of the first well in a second region other than the first region on the same depth level.

Abstract: An oxide semiconductor film is formed over a substrate, a film of a semiconductor other than an oxide semiconductor is formed over the oxide semiconductor film, and then an oxygen atom in the oxide semiconductor film and an atom in the film of a semiconductor are bonded to each other at an interface between the oxide semiconductor film and the film of a semiconductor. Accordingly, the interface can be made continuous. Further, oxygen released from the oxide semiconductor film is diffused into the film of a semiconductor, so that the film of a semiconductor can be oxidized to form an insulating film. The use of the gate insulating film thus formed leads to a reduction in interface scattering of electrons at the interface between the oxide semiconductor film and the gate insulating film; so that a transistor with excellent electric characteristics can be manufactured.

Abstract: The present invention provides a method of making a pixel structure of a reflective type electrophoretic display device. First, a first metal pattern layer, an insulating layer, a semiconductor pattern layer and a second metal pattern layer are formed sequentially on a substrate. Next, a passivation layer is formed on the substrate, the semiconductor pattern layer and the second metal pattern layer, and an organic photoresist layer is formed on the passivation layer, wherein the organic photoresist layer has a first contact hole exposing the passivation layer. Then, the organic photoresist layer is utilized as a mask to remove the exposed passivation layer and to form a second contact hole in the passivation layer to expose the second metal pattern layer. Subsequently, a third metal pattern layer and a transparent conductive pattern are formed sequentially on the organic photoresist pattern layer and the exposed second metal pattern layer.

Abstract: A display device and a fabrication method thereof are provided. The display device includes a first metal layer disposed on a display area and a peripheral area. An insulating layer covers the first metal layer. A patterned semiconductor layer is disposed on the insulating layer at the display area. A second metal layer is disposed on the patterned semiconductor layer and the insulating layer at the peripheral area. A transparent conductive layer directly covers the second metal layer. A protective layer completely covers the second metal layer, the patterned semiconductor layer and the transparent conductive layer. The protective layer includes a first portion, a second portion and a through hole, wherein the first portion has a height which is higher than a height of the second portion.

Abstract: A metal oxide thin film transistor (TFT) includes a gate electrode, a gate insulating layer, a metal oxide active layer, a source electrode, and a drain electrode. The gate electrode is formed on a substrate. The gate insulating layer is formed on the substrate and covers the gate electrode. The metal oxide active layer is formed on the gate insulating layer. The drain electrode and the source electrode are formed on two opposite ends of the metal oxide active layer in a spaced-apart manner, in which at least one of the orthographic projection of the source electrode and the orthographic projection of the drain to electrode on the substrate does not overlap the gate electrode.

Abstract: A break on a video signal line is prevented during patterning on the video signal line. A video signal line, a drain electrode, and a source electrode are simultaneously formed in the same layer. The video signal line includes three layers: a base layer, an AlSi layer, and a cap layer. Conventionally, an alloy having a high etching rate is formed at the boundary between the AlSi layer and the cap layer, causing breakage during patterning on the video signal line. According to the present invention, in the formation of the video signal line, the AlSi layer is formed by sputtering, a TFT is exposed to the atmosphere to form an Al oxide layer on the surface of the AlSi layer, and then the cap layer is formed by sputtering. Thus, the formation of an alloy having a high etching rate on a part of the AlSi layer is prevented, precluding the occurrence of a break on the video signal line.

Abstract: This invention provides a transistor with an etching stop layer and a manufacturing method thereof. The transistor structure includes a substrate, a crystalline semiconductor layer, an etching stop structure, an ohmic contact layer, a source, a drain, a gate insulating layer, and a gate. The manufacturing method is performed by patterning the ohmic contact layer and the crystalline semiconductor layer at the same time with the same mask; and patterning the ohmic contact layer and the source/drain layer at the same time with another the same mask.

Abstract: A semiconductor layer (100) according to the present invention includes a top surface (100o), a bottom surface (100u) and a side surface (100s). In a portion of the side surface (100s) which is in the vicinity of a border with the top surface (100o), a tangential line (T1) to the portion is inclined with respect to the normal to the bottom surface (100u). In a certain portion of the side surface (100s) which is farther from the top surface (100o) than the portion in the vicinity of the border, an angle made by a tangential line (T2) to the certain portion and a plane defined by the bottom surface (100u) is larger than an angle made by the tangential line (T1) to the portion in the vicinity of the border and the plane defined by the bottom surface (100u).

Abstract: A capacitance element includes a first capacitance electrode formed over a TFT with a insulating interlayer therebetween, and a second capacitance electrode formed so as to oppose the first capacitance electrode with a first dielectric layer therebetween, the second capacitance electrode being electrically connected to a semiconductor layer of the TFT through a contact hole formed in the insulating interlayer. The second capacitance electrode includes a first conductive layer and a second conductive layer stacked on the first conductive layer. A portion of the first conductive layer overlapping the contact hole is removed, and the second conductive layer and the semiconductor layer are electrically connected to each other through the contact hole.

Abstract: A decrease in on-state current in a semiconductor device including an oxide semiconductor film is suppressed. A transistor including an oxide semiconductor film, an insulating film which includes oxygen and silicon, a gate electrode adjacent to the oxide semiconductor film, the oxide semiconductor film provided to be in contact with the insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the interface with the insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region.

Abstract: The present approach involves a radiation detector module with increased quantum efficiency and methods of fabricating the radiation detector module. The module includes a scintillator substrate and a photodetector fabricated on the scintillator substrate. The photodetector includes an anode, active organic elements, and a cathode. The module also includes a pixel element array disposed over the photodetector. During imaging, radiation attenuated by an object to be imaged may propagate through the pixel element array and through the layers of the photodetector to be absorbed by the scintillator which in response emits optical photons. The photodetector may absorb the photons and generate charge with improved quantum efficiency, as the photons may not be obscured by the cathode or other layers of the module. Further, the module may include reflective materials in the cathode and at the pixel element array to direct optical photons towards the active organic elements.

Abstract: Provided is a bottom-gate transistor including an oxide semiconductor, in which electric-field concentration which might occur in the vicinity of an end portion of a drain electrode layer (and the vicinity of an end portion of a source electrode layer) when a high gate voltage is applied to a gate electrode layer is reduced and degradation of switching characteristics is suppressed, so that the reliability is improved. The cross-sectional shape of an insulating layer which overlaps over a channel formation region is a tapered shape. The thickness of the insulating layer which overlaps over the channel formation region is 0.3 ?m or less, preferably 5 nm or more and 0.1 ?m or less. The taper angle 0 of a lower end portion of the cross-sectional shape of the insulating layer which overlaps over the channel formation region is 60° or smaller, preferably 45° or smaller, further preferably 30° or smaller.

Abstract: A highly reliable semiconductor device is provided. A semiconductor device is manufactured at a high yield, so that high productivity is achieved. In a semiconductor device including a transistor in which a gate electrode layer, a gate insulating film, an oxide semiconductor film containing indium, and an insulating layer provided on and in contact with the oxide semiconductor film so as to overlap with the gate electrode layer are stacked and a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film and the insulating layer, the chlorine concentration and the indium concentration on a surface of the insulating layer are lower than or equal to 1×1019/cm3 and lower than or equal to 2×1019/cm3, respectively.

Abstract: A display substrate including a base substrate, a plurality of pixel electrodes and a plurality of sub pixel electrodes. The pixel electrodes are formed on the base substrate, are spaced apart from each other, and are electrically connected with a plurality of transistors, respectively. The sub pixel electrodes are disposed between the pixel electrodes, and are electrically connected with a thin-film transistor (TFT). Thus, quality of an image displayed by the display apparatus may be enhanced.

Abstract: A semiconductor device includes a gate electrode, a gate insulating film which includes oxidized material containing silicon and covers the gate electrode, an oxide semiconductor film provided to be in contact with the gate insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the gate insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region. At least the first region includes a crystal portion.

Abstract: A pixel structure including a first scan line, a second scan line, a data line and a power line substantially perpendicular to the first scan line and the second scan line, a reference signal line and an emission signal line substantially parallel with the first scan line and the second scan line, a common thin film transistor (C-TFT), a first pixel unit, and a second pixel unit is provided. The common thin film transistor has a common gate electrode, a common source electrode and a common drain electrode. The common gate electrode is electrically connected to the first scan line, the common drain electrode is electrically connected to the reference signal line. The first and the second pixel units respectively have a first TFT, a second TFT, a third TFT, a fourth TFT, a fifth TFT, a sixth TFT, a capacitor, and an emission device.

Abstract: Nano-sized materials and/or polysilicon are formed using heat generated from a micro-heater, the micro-heater may include a substrate, a heating element unit formed on the substrate, and a support structure formed between the substrate and the heating element unit. Two or more of the heating element units may be connected in series.

Abstract: An array substrate includes scan lines and data lines defining pixel structures. Each pixel structure includes a first TFT, a second TFT and a pixel electrode. The first TFT includes a first gate connected to the scan line, a first source disposed above and partially overlapping the first gate, and a first drain disposed above the first gate. An end of the first source is connected to the data line. The first drain has at least one first concavity in which the first source is disposed partially. The second TFT includes a second gate connected to the scan line, a second source disposed above the second gate and connected to the first drain, and a second drain disposed above and partially overlapping the second gate. The second source has at least one second concavity in which the second drain is disposed partially. The pixel electrode connects to the second drain.

Abstract: Provided are a manufacturing method for a thin film transistor, and a thin film transistor manufactured by the manufacturing method. In the manufacturing method, a semiconductor layer and an insulating layer for stopping etching, which are sequentially stacked, are etched by dry etching and wet etching using a single photoresist pattern, and patterning the semiconductor layer and the insulating layer into a channel layer and an etch stop layer, respectively, thereby simplifying the manufacturing process of the thin film transistor.

Abstract: A metal oxide layer is in contact with an interlayer insulating layer covering a transistor, and has a stacked-layer structure including a first metal oxide layer having an amorphous structure and a second metal oxide layer having a polycrystalline structure. In the first metal oxide layer, there are no crystal grain boundaries, and grid intervals are wide as compared to those in a metal oxide layer in a crystalline state; thus, the first metal oxide layer easily traps moisture between the lattices. In the second metal oxide layer having a polycrystalline structure, crystal parts other than crystal grain boundary portions have dense structures and extremely low moisture permeability. Thus, the structure in which the metal oxide layer including the first metal oxide layer and the second metal oxide layer is in contact with the interlayer insulating layer can effectively prevent moisture permeation into the transistor.

Abstract: A thin film transistor array panel includes: an substrate; a gate line and a gate pad portion disposed on the substrate; a gate insulating layer disposed on the gate line and the gate pad portion; a data line and a data pad portion disposed on the gate insulating layer; a gate assistance pad portion disposed at a position corresponding to the gate pad portion; a first insulating layer disposed on the data line and removed at the gate pad portion and the data pad portion; a first field generating electrode disposed on the first insulating layer; a second insulating layer disposed on the first field generating electrode and removed at the gate pad portion and the data pad portion; and a second field generating electrode disposed on the second insulating layer. The assistance gate pad portion and the gate insulating layer include a contact hole exposing the gate pad portion.

Abstract: A miniaturized transistor having high electric characteristics is provided with high yield. In a semiconductor device including the transistor, high performance, high reliability, and high productivity are achieved. In a semiconductor device including a transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer on side surfaces of which sidewall insulating layers are provided are stacked in this order, source and drain electrode layers are provided in contact with the oxide semiconductor film and the sidewall insulating layers. In a process for manufacturing the semiconductor device, a conductive film and an interlayer insulating film are stacked to cover the oxide semiconductor film, the sidewall insulating layers, and the gate electrode layer, and the interlayer insulating film and the conductive film over the gate electrode layer are removed by a chemical mechanical polishing method, so that the source and drain electrode layers are formed.

Abstract: The present invention provides a pixel structure of a display panel and a method for manufacturing the same. The method comprises the following steps: forming a first transistor and a second transistor on a substrate, wherein the first transistor is connected between the second transistor and a data line, wherein the second transistor is connected to a first gate line and a second gate line; and forming a pixel electrode, wherein the pixel electrode is connected to the first transistor. The present invention can improve a deformation problem of signal waveforms due to delay.

Abstract: A thin film transistor includes a substrate, a buffer layer on the substrate, a semiconductor layer on the buffer layer, source and drain electrodes directly on the semiconductor layer, each of the source and drain electrodes including at least one hole therethrough, a gate insulating layer on the substrate, and a gate electrode on the gate insulating layer and corresponding to the semiconductor layer.

Abstract: An organic thin field transistor is disclosed. The organic thin field transistor includes a first and a second insulting layers, a metal structure and an organic layer serving as an active layer. Materials of the first and the second insulting layers are different, and by performing an etching process, a surface of the metal structure and a surface of the second insulting layer are effectively aligned. Because of the high flatness of the surface of the metal structure and the second insulting layer, a continuous film-forming property and crystallinity of the active layer of the organic thin field transistor are improved, so as to achieve a better the electrical characteristic.

Abstract: A thin film transistor array substrate includes a gate line disposed on a substrate, the gate line comprising a gate electrode including a lower film and an upper film thicker than the lower film, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, an ohmic contact layer formed on the semiconductor layer, a data line electrically connected to a source electrode and a drain electrode formed on the ohmic contact layer, the lower film of the gate line is in contact with the gate insulating layer at a crossing portion of the gate line and the data line and the heights of the source electrode and the drain electrode are substantially the same as or less than a height of the semiconductor layer.

Abstract: A thin film transistor includes a gate, a pair of electrodes, a first semiconductor layer disposed between the gate and the pair of electrodes, and a semiconductor stacked layer disposed between the first semiconductor layer and the pair of the electrodes. The semiconductor stacked layer includes a second semiconductor layer disposed adjacent to the pair of electrodes and at least one pair of semiconductor layers including a third semiconductor layer and a fourth semiconductor layer, the third semiconductor layer being sandwiched between the second semiconductor layer and the fourth semiconductor layer. In particular, the electric conductivity of the third semiconductor layer is substantially smaller than the electric conductivity of the second semiconductor layer and the electric conductivity of the fourth semiconductor layer.

Abstract: Disclosed is a thin film transistor, comprising a first conductive layer, a first insulation layer, an amorphous silicon layer, an ohmic contact layer, a second insulation layer, a second conductive layer, a protective layer and a transparent electrode layer. The present invention also relates to a manufacture method of the thin film transistor. The thin film transistor and the manufacture method of the present invention implements merely three stages of photolithography processes to complete the manufacture of the thin film transistor, and therefore to save the manufacture cost and the process time of the thin film transistor.

Abstract: With an increase in the definition of a display device, the number of pixels is increased, and thus the numbers of gate lines and signal lines are increased. Due to the increase in the numbers of gate lines and signal lines, it is difficult to mount an IC chip having a driver circuit for driving the gate and signal lines by bonding or the like, which causes an increase in manufacturing costs. A pixel portion and a driver circuit for driving the pixel portion are formed over one substrate. At least a part of the driver circuit is formed using an inverted staggered thin film transistor in which an oxide semiconductor is used. The driver circuit as well as the pixel portion is provided over the same substrate, whereby manufacturing costs are reduced.

Abstract: A thin film transistor substrate includes a base substrate, a gate electrode, a gate insulating layer, a surface treating layer, an active layer, a source electrode and a drain electrode. The gate electrode is formed on the base substrate. The gate insulating layer is formed on the base substrate to cover the gate electrode. The surface treating layer is formed on the gate insulating layer by treating the gate insulating layer with a nitrogen-containing gas to prevent leakage current. The active layer is formed on the surface treating layer to cover the gate electrode. The source electrode and the gate electrode that are spaced apart from each other by a predetermined distance are formed on the active layer.