Low-cost circuit board materials and processes for area array electrical interconnections over a large area between a device and the circuit board
An electronic device and coupled flexible circuit board and method of manufacturing. The electronic device is coupled to the flexible circuit board by a plurality of Z-interconnections. The electronic device includes a substrate with electronic components coupled to it. The substrate also has a plurality of device electrical contacts coupled to its back surface that are electrically coupled to the electronic components. The flexible circuit board includes a flexible substrate having a front surface and a back surface and a plurality of circuit board electrical contacts coupled to the front surface of the flexible substrate. The plurality of circuit board electrical contacts correspond to plurality of device electrical contacts. Each Z-interconnection is electrically and mechanically coupled to one device electrical contact and a corresponding circuit board electrical contact.
This application is a divisional of U.S. application Ser. No. 10/435,960, filed May 12, 2003 now U.S. Pat. No. 6,849,935 which claims the benefit of priority of U.S. Provisional Application No. 60/379,456, filed May 10, 2002, the contents of which are incorporated herein by reference.
FIELD OF THE INVENTIONThis invention is in the field of electronic device circuit boards and interconnections, and specifically relates to the use of Z-interconnections with flexible circuit boards.
BACKGROUND OF THE INVENTIONThe use of short interconnections normal to the surfaces of circuit hoards (Z-interconnections) is one method to desirably create space saving multi-layer circuit board configurations. For example, in sufficiently complex devices, the number and complexity of the desired interconnections may make the use of a multiple layer circuit board design desirable. Matrix array devices, such as are often found in pixel-based detector and display applications, may also desirably include multiple circuit board configurations coupled using Z-interconnections.
Area array electrical Z-interconnections over relatively large areas (squares of 4 to 6 inches per side) may be particularly desirable to build display modules that could be utilized in the construction of large-area seamless displays, or relatively large area, high-resolution detector arrays. For seamless integration, it is desirable for all electrical connections from the display panel (device in this application) to the circuit board to be made within the space between the device and the circuit board, because the device is covered with display elements almost all the way to the edges. There may be insufficient inactive area at the edges of the device for electrical connections.
Therefore, low cost circuit board materials and processes for forming substantially identical Z-interconnections throughout the large area module are desirable. Achieving high yields and long-term reliability of those interconnections are also desirable.
For example, in the current fabrication of displays based on organic light emitting diode (OLED) as the active element, it is sometimes considered necessary to hermetically seal the circuit board to the device. This is because the primary passivation on the device provided by some device manufacturers are not adequate. Therefore, display module manufacturers use more expensive rigid inorganic circuit board materials such as multi-layer alumina ceramic board that can provide a hermetic cover to the device. A sequential screen printing of conducting (noble metal) layers and insulating layers on a pre-fired, laser-drilled alumina ceramic is used to achieve the circuit precision needed for large area circuits. Due to the relatively lower circuit density of these boards, several layers of metallization may be needed to accomplish the needed circuit routing. These factors result in high materials and production cost in making these circuit boards for back panel applications.
SUMMARY OF THE INVENTIONOne embodiment of the present invention is an electronic device and coupled flexible circuit board. The electronic device is coupled to the flexible circuit board by a plurality of Z-interconnections. The electronic device includes a substrate with electronic components coupled to it. The substrate also has a plurality of device electrical contacts coupled to its back surface that are electrically coupled to the electronic components. The flexible circuit board includes a flexible substrate having a front surface and a back surface and a plurality of circuit board electrical contacts coupled to the front surface of the flexible substrate. The plurality of circuit board electrical contacts correspond to plurality of device electrical contacts. Each Z-interconnection is electrically and mechanically coupled to one device electrical contact and a corresponding circuit board electrical contact.
Another embodiment of the present invention is a method of manufacturing the exemplary an electronic device and coupled flexible circuit board. The exemplary method includes providing the electronic device and the flexible circuit board. A plurality of conductive bumps are formed on at least one of the electronic device and the flexible circuit board. For each device electrical contact, a conductive bump is formed on that device electrical contact, the corresponding circuit board electrical contact, or both. The plurality of device electrical contacts of the electronic device and the corresponding plurality of circuit board electrical contacts are aligned and the electronic device and the flexible circuit board are bonded together such that the conductive bumps contact the corresponding conductive bumps or electrical contact. The conductive bumps are then cured to form Z-interconnections, electrically and mechanically coupling the device electrical contacts to the corresponding circuit board electrical contacts.
The invention is best understood from the following detailed description when read in connection with the accompanying drawing. It is emphasized that, according to common practice, the various features of the drawing are not to scale. On the contrary, the dimensions of the various features are arbitrarily expanded or reduced for clarity. Included in the drawing are the following figures:
The present invention involves low cost circuit board materials and processes for achieving high yields and long-term reliability of electrical interconnections between a large-area device and a circuit board.
High interest in OLED displays has led to considerable R & D activity in this area. Some of this effort has been directed towards hermetic integral passivations on the front panel. Such a passivation is desirable to allow the use of non-hermetic back panel materials. Among the possible non-hermetic back panel materials low cost organic-based circuit board materials offer a number of advantages, such as improved processes for forming substantially identical interconnections throughout the large area module and achieving high yields and long-term reliability of those interconnections. Flexible circuit boards based on polyimide (for example Kapton from DuPont), polyester (for example Mylar from DuPont), and various laminated structures of these families of materials may be particularly desirable. Laminate materials with built-in gas (moisture, oxygen) barrier layers, such as DuPont Mylar 250 SBL 300, may be used in applications where having this barrier is desirable for the back panel.
The exemplary electro-optic device shown in
Desirably substrate 104 is formed of a substantially transparent material such as float glass, quartz, sapphire, acrylic, polyester, polyimide or a laminate of these materials. Column electrodes 106 desirably include a substantially transmissive, conductive material such as indium tin oxide, thin gold, polyaniline, or a combination. Row electrodes 120, device electrical contacts 112, and vias 108 are desirably formed of a conductive material such as aluminum, aluminum-calcium, gold, silver, copper, nickel, titanium, tungsten, platinum, germanium, polyaniline, polyamide, polysilicon, or a combination thereof. It may be desirable for row electrodes 120, device electrical contacts 112, and vias 108 to be formed of the same material. Active material 110 may be formed of semiconductor layers and/or organic polymer layers to form the light emitting or absorbing portion of electro-optic pixel components, such as liquid crystal displays, OLED's, light emitting diodes, and photodetectors.
Flexible circuit board 102 includes flexible substrate 118, circuit board contacts 116, and a number of electrical traces formed on the front surface of flexible substrate 118. These electrical traces include column electrical traces 122 and row electrical traces 124, 126, and 128. In one exemplary embodiment, the row electrical traces 124, 126, and 128 may be used to provide operational power for different colors of pixels. For example, row electrical traces 124 may be coupled to red pixels, row electrical traces 126 may be coupled to blue pixels, and row electrical traces 128 may be coupled to green pixels.
Flexible substrate 118 may desirably be formed of a flexible organic substrate material such as polyester, polyimide or a laminate of these materials. Electrical traces 122, 124, 126, and 128 and circuit board electrical contacts 116 are desirably formed of a conductive material such as aluminum, aluminum-calcium, gold, silver, copper, nickel, titanium, tungsten, platinum, germanium, polyaniline, polyamide, polysilicon, or a combination thereof. It may be desirable for electrical traces 122, 124, 126, and 128 and circuit board electrical contacts 116 to be formed of the same material.
In this exemplary embodiment, electronic device 100 and flexible circuit board 102 are electrically and mechanical coupled together by Z-interconnections 114. These Z-interconnections are desirably, formed of an electrically conductive material such as indium, a conductive solder, a conductive thermally-curable epoxy, a conductive radiation-curable epoxy, a conductive thermoplastic, and/or a conductive elastomer.
In addition to electrically and mechanically coupling electronic device 100 and flexible circuit board 102, Z-interconnections 114 desirably thermally couple electronic device 100 and flexible circuit board 102. Flexible substrate 118 may desirably be very thin <10 mils, therefore, even though the thermal conductivity of many flexible substrate materials may be low, thermal transfer from the front to back surfaces of the flexible substrate may be quite high, but lateral diffusion of heat may be poor. The relatively high thermal conductivity of the electrical traces may help with lateral diffusion of heat.
Also, this relative insensitivity to camber means that Z-interconnections 114 may desirably be smaller. With a rigid circuit board, the Z-interconnections should be large enough to compensate for the anticipated camber. In locations where the camber of both the rigid circuit board and the electronic device lead to large gaps, the Z-interconnection is desirably formed from a material with a sufficient thickness to cross the gap. When the Z-interconnections are made using deformable solder bumps, for example, it is desirable for the deformable bumps from which the Z-interconnections are formed to be at least as large as the largest expected gap, which constrains the minimum separation for the Z-interconnections. In locations where the combined cambers lead to a narrower gap, the deformable bumps may have too much material and expand laterally when deformed, further enlarging the minimum separation of the Z-interconnections. This issue may be further accentuated for large area arrays, as larger substrates tend to have larger cambers.
As
Overall weight reduction of the completed device may also be possible because flex circuit is thinner and weights less than an equivalent ceramic, glass, or rigid organic circuit board.
It may be desirable to form the solder bumps on one side of each Z-interconnection and an organic conductor, such as a conductive thermally-curable epoxy, a conductive radiation-curable epoxy, a conductive thermoplastic, or a conductive elastomer, on the other side. This method may provide better yield than organic conductor bumps alone. It may also be desirable to use the exemplary embodiment of
As an alternative embodiment, a non-conductive fill layer may also be formed on the back surface of electronic device 100, the front surface of flexible circuit board 102, or both, alternative step 404. The non-conductive fill layer is desirably formed on a portion of the facing surfaces on which there are no Z-interconnections. This non-conductive fill layer may desirably be formed of a non-conductive (electrically) organic material such as a non-conductive epoxy, a non-conductive thermoplastic, and a non-conductive elastomer. Electrically conductive organic materials such as conductive epoxies, conductive thermoplastics, and conductive elastomers, are often formed by suspending metal particles in an organic matrix. The non-conductive organic material of the non-conductive fill layer may include thermally (but not electrically) conductive particle within its organic matrix to enhance its thermal conductivity. It may be desirable for conductive bumps 500 and the non-conductive fill layer to include the same organic matrix, but different suspended particles to simplify the curing process of step 410.
The non-conductive fill layer may desirably provide for addition thermal and mechanical coupling of electronic device 100 and flexible circuit board 102. This layer may also assist in forming a hermetic seal around electronic components, such as active material 110, coupled to the back surface of device substrate 104. Device substrate 104 and/or flexible substrate 118 may also form part of this hermetic seal.
Following either step 402 or step 404, the plurality of device electrical contacts 112 and the corresponding plurality of circuit hoard electrical contacts 116 are aligned with one another, step 406.
Electronic device 100 and flexible circuit board 102 are then pressed together until each conductive bump contacts either the corresponding conductive bump (the exemplary embodiment of
Conductive bumps 500 are then “cured” to form the Z-interconnections 114, step 410. The non-conductive fill layer may also be “cured” to form non-conductive fill 800, as shown in
It is contemplated that steps 406, 408, and 410 may be performed in stages with only a subset of the Z-interconnections being aligned, contacted, and cured at one time. This “piece meal” method may allow for improved yield of large area array devices, by allowing alignment corrections between sequential operations across the large surface area and numerous Z-interconnections.
For indium, or other cold welded Z-interconnections, the curing process involves applying sufficient pressure to electronic device 100 and flexible circuit board 102 to deform and cold weld conductive bumps 500 into Z-interconnections 114. This pressure may be applied uniformly or a pressor such as a roller may move across the back surface of the flexible substrate. This moving pressor method may be particular useful when large camber and/or non-uniformity of Z-interconnection size is expected, or a non-planar substrate is used.
Conductive bumps formed of conductive solder may be cured into Z-interconnections by using standard solder reflow techniques. It is noted that although a solder interconnection may be preferred to achieve high electrical conductivity, the desirable use of flux to facilitate solder wetting and the relatively high temperatures needed for solder reflow may be detrimental to the device. Therefore it may be desirable in some applications to combine a conductive solder bump on one electrical contact with a conductive organic material on the other electrical contact to form a hybrid Z-interconnection. These exemplary hybrid Z-interconnections are cured according to the type of conductive organic material used.
To cure conductive bumps formed of conductive epoxies or elastomers it is desirable to press electronic device 100 and flexible circuit board 102 together to desirably deform the conductive epoxy or elastomer bumps into the shape of the Z-interconnections. For radiation-curable conductive epoxy, the deformed bumps are then irradiated with the appropriate light, i.e. UV for UV-curable epoxies, to harden the epoxy. Thermally-curable conductive epoxy bumps are heated to their curing temperature and allowed to harden. Conductive elastomer Z-interconnections are held in place until the elastomer material has set.
Conductive thermoplastic bumps are cured by heating the bumps to above the softening temperature of the thermoplastic. Electronic device 100 and flexible circuit board 102 are then desirably pressed together to desirably deform the conductive thermoplastic bumps into the shape of the Z-interconnections. The Z-interconnections are then cooled to below the softening temperature to harden the Z-interconnection.
If a non-conductive fill layer was formed in alternative step 404, this layer may be cured using the same method as the corresponding conductive bump material. If identical organic matrices are used, the curing parameters may be almost identical, greatly simplifying the curing process.
With the possible exception of the embodiment using conductive solder Z-interconnections, which may require high reflow temperatures, this method does not introduce any stresses to the glass device panel during assembly. In addition, when the module is thermal cycled, thermal expansion mismatch between the glass front panel and the flex circuit does not lead to significant stresses because of the relatively low elastic modulus of the flex circuit.
It is noted that, flexible substrate 118 may have a thermal expansion coefficient which is significantly different from the thermal expansion coefficient of electronic device 100 and they may be at different temperatures, which may lead to large differences in thermal expansion. Differences in the thermal expansion of the electronic device and a rigid circuit board are largely absorbed by the elasticity of the Z-interconnections, but this may lead to failure of some of the Z-interconnections. The relatively much larger elasticity of flexible circuit board 102 compared to standard rigid circuit boards results in less strain on the Z-interconnections due to thermal expansion differences.
The second alternative exemplary feature shown in
Heat sinks 604 may be mounted on the back surface of the flexible substrate to assist with heat dissipation. Due to high heat transfer through the relatively thin, flexible substrate these heat sink may have a significant effect.
Exemplary dual-sided folded flexible substrate 1000 in
Although the invention is illustrated and described herein with reference to specific embodiments, the invention is not intended to be limited to the details shown. Rather, various modifications may be made in the details within the scope and range of equivalents of the claims and without departing from the invention.
Claims
1. A method of manufacturing an electronic device, which includes a substrate having a non-planar back surface and a first thermal expansion coefficient, a plurality of electronic components coupled to the substrate, and a plurality of device electrical contacts coupled to the non-planar back surface of the substrate and electrically coupled to the plurality of electronic components, and a coupled flexible circuit board, which includes a flexible substrate having a front surface and a back surface, and a plurality of circuit board electrical contacts coupled to the front surface of the flexible substrate corresponding to plurality of device electrical contacts, comprising the steps of:
- a) providing the electronic device;
- b) providing the flexible circuit board;
- c) forming a plurality of conductive bumps on at least one of the electronic device and the flexible circuit board, for each device electrical contact, a conductive bump formed on at least one of that device electrical contact and a corresponding circuit board electrical contact;
- d) aligning the plurality of device electrical contacts of the electronic device and the corresponding plurality of circuit board electrical contacts;
- e) pressing the electronic device and the flexible circuit board together such that at least one of the plurality of conductive bumps spans the gap between each device electrical contact and the corresponding circuit board electrical contact; and
- f) curing the plurality of conductive bumps to form a plurality of Z-interconnections electrically and mechanically coupling the plurality of device electrical contacts to the corresponding plurality of circuit board electrical contacts, wherein the at least one of the front or back surfaces of the flexible substrate is non-planar.
2. The method of claim 1, wherein the plurality of conductive bumps are formed of at least orie of indium, a conductive solder, a conductive thermally-curable epoxy, a conductive radiation-curable epoxy, a conductive thermoplastic, and a conductive elastomer.
3. The method of claim 1, wherein:
- the plurality of conductive bumps are indium bumps; and
- step (f) includes the step of pressing the electronic device and the flexible circuit board together to deform the indium bumps and cold weld the plurality of device electrical contacts to the corresponding plurality of circuit board electrical contacts.
4. The method of claim 1, wherein:
- the plurality of conductive bumps are conductive solder bumps; and
- step (f) includes the steps of: f1) beating the conductive solder bumps to at least a melting point temperature; and f2) forming the plurality of Z-interconnections by solder reflow.
5. The method of claim 1, wherein:
- the plurality of conductive humps include a plurality of conductive thermally-curable epoxy bumps having a first curing temperature; and
- step (f) includes the steps of: f1) pressing the electronic device and the flexible circuit board together to deform the plurality of conductive thermally-curable epoxy bumps; and f2) heating the plurality of deformed conductive thermally-curable epoxy bumps to at least the first curing temperature.
6. The method of claim 5, wherein:
- step (c) further includes the step of forming a non-conductive thermally-curable epoxy fill layer on at least one of a portion of the non-planar back surface of the electronic device and a portion of the front surface of the flexible circuit board, the non-conductive thermally-curable epoxy fill layer having a second curing temperature approximately equal to the first curing temperature of the conductive thermally-curable epoxy bumps; and
- step (f2) further includes heating the non-conductive thermally-curable epoxy fill layer to at least the second curing temperature.
7. The method of claim 1, wherein:
- the plurality of conductive humps include a plurality of conductive radiation-curable epoxy bumps; and
- step (f) includes the steps of: f1) pressing the electronic device and the flexible circuit board together to deform the plurality of conductive radiation-curable epoxy bumps; and f2) irradiating the plurality of deformed conductive radiation-curable epoxy bumps.
8. The method of claim 7, wherein:
- step (c) further includes the step of forming a non-conductive radiation-curable epoxy fill layer on at least one of a portion of the non-planar back surface of the electronic device and a portion of the front surface of the flexible circuit board; and
- step (f2) further includes irradiating the non-conductive radiation-curable epoxy fill layer.
9. The method of claim 1, wherein:
- the plurality of conductive bumps include a plurality of conductive thermoplastic bumps having a first softening temperature; and
- step (f) includes the steps of: f1) heating the plurality of conductive thermoplastic bumps to at least the first softening temperature; f2) pressing the electronic device and the flexible circuit board together to deform the plurality of conductive thermoplastic bumps; and f3) cooling the plurality of deformed conductive thermoplastic bumps to below the first softening temperature.
10. The method of claim 9, wherein:
- step (c) further includes the step of forming a non-conductive thermoplastic fill layer on at least one of a portion of the non-planar back surface of the electronic device and a portion of the front surface of the flexible circuit board, the non-conductive thermoplastic fill layer having a second softening temperature approximately equal to the first softening temperature of the conductive thermoplastic bumps;
- step (f1) further includes heating the non-conductive thermoplastic fill layer to at least the second softening temperature; and
- step (f3) further includes cooling the non-conductive thermoplastic fill layer to below the second softening temperature.
11. The method of claim 1, wherein:
- the plurality of conductive bumps include a plurality of conductive elastomer bumps; and
- step (f) includes the steps of: f1) pressing the electronic device and the flexible circuit board together to deform the plurality of conductive elastomer bumps; and f2) holding the electronic device and the flexible circuit board together until the plurality of deformed conductive elastomer bumps are set.
12. The method of claim 11, wherein:
- step (c) further includes the step of forming a non-conductive elastomer fill layer on at least one of a portion of the non-planar back surface of the electronic device and a portion of the front surface of the flexible circuit board; and
- step (f2) further includes holding the electronic device and the flexible circuit board together until the non-conductive elastomer fill layer is set.
13. The method of claim 1, wherein at least one of the plurality of conductive bumps has a diameter of less than 5 mils.
14. The method of claim 1, further comprising the step of:
- g) laminating a rigid substrate to at least a portion of the back surface of the flexible substrate of the flexible circuit board, the rigid substrate having a second thermal expansion coefficient approximately equal to the first thermal expansion coefficient of the substrate of the electronic device.
15. The method of claim 1, wherein:
- the plurality of conductive bumps include a plurality of conductive solder bumps and a plurality of conductive organic bumps, for each device electrical contact; a conductive solder bump formed on one of that device electrical contact and a corresponding circuit board electrical contact; and a conductive organic bump formed on a remaining one of that device electrical contact and the corresponding circuit board electrical contact.
16. The method of claim 15, wherein:
- the plurality of conductive organic bumps are a plurality of conductive thermally-curable epoxy bumps having a first curing temperature; and
- step (f) includes the steps of: f1) pressing the electronic device and the flexible circuit board together to deform the plurality of conductive thermally-curable epoxy bumps against the plurality of conductive solder bumps; and f2) heating the plurality of deformed conductive thermally-curable epoxy bumps to at least the first curing temperature.
17. The method of claim 15, wherein:
- the plurality of conductive organic bumps are a plurality of conductive radiation-curable epoxy bumps; and
- step (f) includes the steps of: f1) pressing the electronic device and the flexible circuit board together to deform the plurality of conductive radiation-curable epoxy bumps against the plurality of conductive solder bumps; and f2) irradiating the plurality of deformed conductive radiation-curable epoxy bumps.
18. The method of claim 15, wherein:
- the plurality of conductive organic bumps are a plurality of conductive thermoplastic bumps having a first softening temperature; and
- step (f) includes the steps of: f1) heating the plurality of conductive thermoplastic bumps to at least the first softening temperature; f2) pressing the electronic device and the flexible circuit board together to deform the plurality of conductive thermoplastic bumps against the plurality of conductive solder bumps; and f3) cooling the plurality of deformed conductive thermoplastic bumps to below the first softening temperature.
19. The method of claim 15, wherein:
- the plurality of conductive organic bumps are a plurality of conductive elastomer bumps; and
- step (f) includes the steps of: f1) pressing the electronic device and the flexible circuit board together to deform the plurality of conductive elastomer bumps against the plurality of conductive solder bumps; and f2) holding the electronic device and the flexible circuit board together until the plurality of deformed conductive elastomer bumps are set.
20. A method comprising:
- forming an electrical contact on a first surface of a flexible substrate;
- forming a device electrical contact on a non-planar surface of a device substrate; and
- forming a Z-interconnection, wherein the Z-interconnection electrically and mechanically couples the electrical contact on the flexible substrate to the device electrical contact on the non-planar surface of the device substrate, and wherein the first surface of the flexible substrate is non-planar after said forming a Z-interconnection.
21. The method of claim 20, wherein the Z-interconnection is formed from at least one of indium, a conductive solder, a conductive thermally-curable epoxy, a conductive radiation-curable epoxy, a conductive thermoplastic, or a conductive elastomer.
22. The method of claim 20, wherein said forming a Z-interconnection comprises:
- forming a conductive bump on the electrical contact of the flexible substrate or the device electrical contact on the non-planar surface of the device substrate;
- aligning the electrical contact with the device electrical contact;
- pressing the flexible substrate and the device substrate together; and
- curing the conductive bump to form the Z-interconnection.
23. The method of claim 22, wherein the conductive bump is formed by deposition or screen printing.
24. The method of claim 22, wherein said pressing comprises pressing the flexible substrate with a rubber sheet such that an approximately even pressure is applied over the flexible substrate.
25. The method of claim 22, wherein said pressing comprises utilizing an isostatic lamination method.
26. The method of claim 22, wherein the conductive bump is formed from indium, and wherein said curing the conductive bump comprises applying pressure to deform and cold weld the conductive bump into the Z-interconnection.
27. The method of claim 22, wherein the conductive bump is formed from conductive solder, and wherein said curing the conductive bump comprises heating the conductive solder to a melting temperature and forming the Z-interconnection by solder reflow.
28. The method of claim 22, wherein the conductive bump is formed from an epoxy that is conductive and radiation-curable, and wherein said curing the conductive bump comprises irradiating the conductive bump.
29. The method of claim 22, wherein the conductive bump is formed from an epoxy that is conductive and thermally-curable, and wherein said curing the conductive bump comprises heating the conductive bump to a hardening temperature.
30. The method of claim 22, wherein the conductive bump is formed from a conductive elastomer, and wherein said curing the conductive bump comprises holding the conductive bump in place until the conductive elastomer sets.
31. The method of claim 22, wherein the conductive bump is formed from a conductive thermoplastic, and wherein said curing the conductive bump comprises:
- heating the conductive bump to a softening temperature;
- pressing the flexible substrate and the device substrate together to deform the conductive bump; and
- cooling the conductive bump to below the softening temperature to harden the conductive bump.
32. The method of claim 22, wherein the conductive bump is one of a plurality of conductive bumps, and wherein the plurality of conductive bumps comprises a plurality of conductive solder bumps formed on one of the flexible substrate or the device substrate and a plurality of organic conductive bumps formed on the other of the flexible substrate or the device substrate.
33. The method of claim 20, further comprising forming a non-conductive fill layer on at least one of the flexible substrate or the device substrate.
34. The method of claim 33, further comprising:
- heating the non-conductive fill layer to a softening temperature; and
- cooling the non-conductive fill layer below the softening temperature.
35. The method of claim 33, wherein the non-conductive fill layer comprises a non-conductive organic material.
36. The method of claim 35, wherein the non-conductive organic material comprises thermally-conductive particles.
37. The method of claim 33, wherein the non-conductive fill layer forms a hermetic seal around an electronic component.
38. The method of claim 20, further comprising mounting a heat sink to the flexible substrate.
39. The method of claim 20, further comprising electrically coupling a first electrical trace on the first surface of the flexible substrate to a second electrical trace on a second surface of the flexible substrate using a wirebond or via in the flexible substrate.
40. The method of claim 20, wherein the flexible substrate comprises an elevated portion.
41. The method of claim 40, further comprising mounting an electronic component to the elevated portion of the flexible substrate, wherein the electronic component is isolated from a non-elevated portion of the flexible substrate.
42. The method of claim 20, further comprising folding a portion of the flexible substrate to create a folded elevated portion.
43. The method of claim 20, further comprising laminating a third substrate to at least a portion of the flexible substrate, wherein the third substrate has a first thermal expansion coefficient approximately equal to a second thermal expansion coefficient of the device substrate.
44. A method comprising:
- forming a conductive bump on at least one of a flexible substrate or a device substrate;
- aligning an electrical contact of the flexible substrate with a corresponding device electrical contact located on a non-planar surface of the device substrate such that the flexible substrate comprises a non-planar surface; and
- curing the conductive bump to form a Z-interconnection between the flexible substrate and the device substrate, wherein the Z-interconnection electrically and mechanically couples the electrical contact of the flexible substrate to the corresponding device electrical contact located on the non-planar surface of the device substrate.
45. The method of claim 44, further comprising pressing the flexible substrate and the device substrate together to deform the conductive bump.
46. The method of claim 44, wherein the Z-interconnection is formed from at least one of indium, a conductive solder, a conductive thermally-curable epoxy, a conductive radiation-curable epoxy, a conductive thermoplastic, or a conductive elastomer.
47. The method of claim 44, further comprising forming a non-conductive fill layer on at least one of the flexible substrate or the device substrate.
48. A method comprising:
- forming a conductive bump between an electrical contact of a flexible substrate and a corresponding device electrical contact on a non-planar surface of a device substrate; and
- curing the conductive bump to form a Z-interconnection between the flexible substrate and the device substrate, wherein the Z-interconnection is configured to electrically and mechanically couple the electrical contact of the flexible substrate to the corresponding device electrical contact on the non-planar surface of the device substrate.
49. The method of claim 48, wherein the Z-interconnection is formed from at least one of indium, a conductive solder, a conductive thermally-curable epoxy, a conductive radiation-curable epoxy, a conductive thermoplastic, or a conductive elastomer.
50. The method of claim 48, further comprising forming a non-conductive fill layer on at least one of the flexible substrate or the device substrate.
51. The method of claim 48, wherein the flexible substrate comprises a non-planar surface after formation of the Z-interconnection.
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Type: Grant
Filed: Sep 6, 2007
Date of Patent: Jul 12, 2011
Assignee: Transpacific Infinity, LLC (Wilmington, DE)
Inventor: Ponnusamy Palanisamy (Lansdale, PA)
Primary Examiner: David A Zarneke
Assistant Examiner: Jenny L Wagner
Application Number: 11/900,009
International Classification: H01L 21/44 (20060101);