Abstract: A method of generating a mask design having optical proximity correction features disposed therein. The methods includes the steps of obtaining a desired target pattern having features to be imaged on a substrate; determining an interference map based on the target pattern, the interference map defining areas of constructive interference and areas of destructive interference between at least one of the features to be imaged and a field area adjacent the at least one feature; and placing assist features in the mask design based on the areas of constructive interference and the areas of destructive interference.

Abstract: A method for manufacturing a semiconductor device with plural semiconductor chips is provided. The method includes the step of attaching a second semiconductor chip to a first surface of a supporting member in a manner such that a third set of electrodes are wirelessly connected to the supporting member at positions outwardly from an opening of the supporting member. The method also includes the step of mounting a first semiconductor chip to the second semiconductor chip in a manner such that the main surfaces of the first and second semiconductor chips face each other while a first set of electrodes of the first semiconductor chip are wirelessly connected to a second set of electrodes in the opening of the supporting member.

Abstract: A method for manufacturing a semiconductor device deposits a plurality of bottom antireflective coating films to prevent a standing wave caused by a light source of a short wavelength in forming a fine pattern. The method includes forming a pattern formation layer on an entire surface of a wafer, forming two or more bottom antireflective coating films on the pattern formation layer, forming a photoresist film pattern on a predetermined region of the bottom antireflective coating films, etching the bottom antireflective coating films using the photoresist film pattern as a mask, forming sidewall spacers at sides of the photoresist film pattern, and etching the pattern formation layer using the sidewall spacers and the photoresist film pattern as masks.

Abstract: A method of enhancing the adhesion between photoresist material and a substrate that can be applied to fabricate bumps on the substrate is provided. The bump fabrication process uses at least photoresist materials each having a different viscosity. A photoresist material having a smaller viscosity, that is, a higher fluidity, is permitted to contact a passivation layer so that all the gaps on the surface of the passivation layer are completely filled and a strong bond is formed between the photoresist layer and the passivation layer. With all the gaps on the substrate completely filled, solder material is prevented from filling the gaps to form a conductive bridge between neighboring bonding pads in a subsequent bump fabrication process.

Abstract: The invention relates to a method for preventing contamination of the surfaces of reflective optical elements for the soft X-ray and EUV wavelength range during their irradiation at operating wavelength in an evacuated closed system having a residual gas atmosphere, said elements comprising a cover layer consisting of at least one transition metal. According to said method a residual gas atmosphere is adjusted. The aim of the invention is to prevent a degradation of the surfaces by deposition of carbon and by surface oxidation. For this purpose, both a reducing gas or gas mixture and a gas or gas mixture containing oxygen atoms are introduced.

Abstract: The invention generally encompasses a method for forming a pattern on a substrate. The method comprises applying a precursor comprising at least one metal to a substrate to form a precursor layer, exposing a predetermined portion of the precursor layer and developing the predetermined portion of the precursor layer. The developing step removes, or at least substantially removes, the predetermined portion from the substrate, thereby forming a pattern on the substrate that comprises a remaining portion of the precursor. In one embodiment, the precursor layer comprises Ti(PriO)2(EAA)2.

Abstract: Disclosed is a method for forming a contact in a semiconductor device. The method includes the steps of: forming a bit line on a substrate; forming an oxide layer made of high density plasma (HDP) oxide on a substrate structure including the bit line and the substrate; forming a hard mask on the oxide layer; and performing an etching process for forming a storage node contact, wherein the etching process is performed after the bit line, the oxide layer and the hard mask are formed with a predetermined thickness and a predetermined tensile stress such that a total compressive stress value of the bit line, the oxide layer and the hard mask layer is less than a critical value of a lifting phenomenon.

Abstract: Methods and structures are provided for increasing alignment margins when contacting pitch multiplied interconnect lines with other conductive features in memory devices. The portions of the lines at the periphery of the memory device are formed at an angle and are widened relative to the portions of the lines in the array region of the memory device. The widened lines allow for an increased margin of error when overlaying other features, such as landing pads, on the lines. The possibility of contacting and causing electrical shorts with adjacent lines is thus minimized. In addition, forming the portions of the lines in the periphery at an angle relative to the portions of the lines in the array regions allows the peripheral portions to be widened while also allowing multiple landing pads to be densely packed at the periphery.

Abstract: Via holes are formed in a continuous inline shadow mask production system by depositing a first conductor layer and subsequently depositing a first insulator layer over a portion of the first conductor layer. The first insulator layer is deposited in a manner to define at least one notch along its edge. The second insulator layer is then deposited on another portion of the first conductor layer in a manner whereupon the second insulator layer slightly overlaps each notch of the first insulator layer, thereby forming the one or more via holes. A conductive filler can optionally be deposited in each via hole. Lastly, a second conductive layer can be deposited over the first insulator layer, the second insulator layer and, if provided, the conductive filler.

Abstract: An optical device includes a semiconductor substrate and an optical part having a plurality of columnar members disposed on the substrate. Each columnar member is disposed in a standing manner and adhered each other so that the optical part is provided. The optical part is integrated with the substrate. This optical part has high design freedom.

Abstract: For patterning an IC (integrated circuit) material, a rigid organic under-layer is formed over the IC material, and the rigid organic under-layer is patterned to form a rigid organic mask structure. In addition, the rigid organic mask structure is trimmed to lower a critical dimension of the rigid organic mask structure beyond the limitations of traditional BARC mask structures. Any portion of the IC material not under the rigid organic mask structure is etched away to form an IC structure.

Abstract: The invention includes a method of patterning radiation. The radiation is simultaneously passed through a structure and through a subresolution assist feature that is transmissive of at least a portion of the radiation. The subresolution assist feature alters a pattern of radiation intensity defined by the structure relative to a pattern of radiation intensity that would be defined in the absence of the subresolution assist feature. The invention further includes methods of forming radiation-patterning tools, and the radiation-patterning tools themselves.

Abstract: A partially manufactured semiconductor device includes a semiconductor substrate. The device includes a first oxide layer formed on the substrate, with a mask placed over the oxide-covered substrate, a plurality of first trenches and at least one second trench etched through the oxide layer forming mesas. The at least one second trench is deeper and wider than each of the first trenches. The device includes a second oxide layer that is disposed over an area of mesas and the plurality of first trenches. The device includes a layer of masking material that is deposited over a an area of an edge termination region adjacent to an active region. The area of mesas and first trenches not covered by the masking layer is etched to remove the oxidant seal. The device includes an overhang area that is formed by a wet process etch.

Abstract: A mechanism and methodology is provided for performing high-throughput thin-film experimentation with the use and integration of a heater. A single flange assembly contains an automated two-dimensional shutter system (which provides variable masking schemes for spatially selective shadow deposition) and a rotatable (indexed) chip/wafer/substrate heater. The automated two-dimensional shutter system comprises two shutter plate mounts that move in two perpendicular (x and y) directions, so that mounted shutters overlap with each other in certain regions. The substrate heater can be used in the gradient temperature mode or uniform temperature mode. The shutter plates and the heater plate are detachable and exchangeable from experiment to experiment in order to minimize cross contamination of materials.