Abstract: In an InGaN-based nitride semiconductor optical device having a long wavelength (440 nm or more) equal to or more than that of blue, the increase of a wavelength is realized while suppressing In (Indium) segregation and deterioration of crystallinity. In the manufacture of an InGaN-based nitride semiconductor optical device having an InGaN-based quantum well active layer including an InGaN well layer and an InGaN barrier layer, a step of growing the InGaN barrier layer includes: a first step of adding hydrogen at 1% or more to a gas atmosphere composed of nitrogen and ammonia and growing a GaN layer in the gas atmosphere; and a second step of growing the InGaN barrier layer in a gas atmosphere composed of nitrogen and ammonia.

Abstract: A method of making a group III nitride-based compound semiconductor includes providing a semiconductor substrate comprising group III nitride-based compound semiconductor, polishing a surface of said semiconductor substrate such that said polished surface includes an inclined surface that has an off-angle ? of 0.15 degrees or more and 0.6 degrees or less to one of an a-face, a c-face and an m-face of the semiconductor substrate, providing a stripe-shaped specific region on the polished surface, the specific region comprising a material that prevents the growth of the group III nitride-based compound semiconductor on its surface, and growing a semiconductor epitaxial growth layer of group III nitride-based compound semiconductor on the polished surface of the semiconductor substrate.

Abstract: In one embodiment a method for fabricating a compound nitride semiconductor device comprising positioning one or more substrates on a susceptor in a processing region of a metal organic chemical vapor deposition (MOCVD) chamber comprising a showerhead, depositing a gallium nitride layer over the substrate with a thermal chemical-vapor-deposition process within the MOCVD chamber by flowing a first gallium containing precursor and a first nitrogen containing precursor through the showerhead into the MOCVD chamber, removing the one or more substrates from the MOCVD chamber without exposing the one or more substrates to atmosphere, flowing a chlorine gas into the processing chamber to remove contaminants from the showerhead, transferring the one or more substrates into the MOCVD chamber after removing contaminants from the showerhead, and depositing an InGaN layer over the GaN layer with a thermal chemical-vapor-deposition process within the MOCVD chamber is provided.

Abstract: A manufacturing method of a nitride substrate includes the steps of: preparing a ground substrate; forming a mask on the ground substrate; placing the ground substrate in a reactor, and heating the ground substrate to a temperature of 850° C. to 1100° C. In the step of heating the ground substrate, HCl and NH3 are supplied into the reactor so that partial pressure PHCl satisfies (1.5+0.0005p) kPa?PHCl?(4+0.0005p) kPa and partial pressure PNH3 satisfies (15?0.0009p) kPa?PNH3?(26?0.0017p) kPa, whereby an AlxGayIn1-x-yN crystal (0?x<1, 0<y?1) is grown, and whereby a ridge-volley structure including a plurality of ridges and valleys parallel to one another is formed. The AlxGayIn1-x-yN crystal is grown so that the ridge-valley structure is not buried while a height of the volleys from the ground substrate is allowed to exceed 2.5 (p?s).

Abstract: A method of manufacturing semiconductor light emitting elements with improved yield and emission power uses laser lift-off and comprises the steps of forming a semiconductor grown layer formed of a first semiconductor layer, an active layer, and a second semiconductor layer on a first principal surface of a growth substrate; forming a plurality of junction electrodes apart on the second semiconductor layer and forming guide grooves arranged in a lattice to surround each of the junction electrodes in the second semiconductor layer; joining together a support and the semiconductor grown layer via the junction electrodes; projecting a laser to separate the growth substrate; dividing the semiconductor grown layer into respective element regions for the semiconductor light emitting elements; and cutting the support, thereby separating into the semiconductor light emitting elements.

Abstract: Fluidic nanotube devices are described in which a hydrophilic, non-carbon nanotube, has its ends fluidly coupled to reservoirs. Source and drain contacts are connected to opposing ends of the nanotube, or within each reservoir near the opening of the nanotube. The passage of molecular species can be sensed by measuring current flow (source-drain, ionic, or combination). The tube interior can be functionalized by joining binding molecules so that different molecular species can be sensed by detecting current changes. The nanotube may be a semiconductor, wherein a tubular transistor is formed. A gate electrode can be attached between source and drain to control current flow and ionic flow. By way of example an electrophoretic array embodiment is described, integrating MEMs switches.

Abstract: The present invention provides a method for producing an n-type Group III nitride semiconductor product having a high Si concentration and exhibiting favorable crystallinity. In the production method, specifically, an AlN buffer layer is formed on a sapphire substrate by MOCVD, and then a first layer (thickness: 2 ?m) is formed from undoped GaN on the buffer layer by MOCVD at 1,140° C. Subsequently, a second layer (thickness: 200 nm) is formed from SiO2 on the first layer by plasma CVD, and then the second layer is removed by use of BHF (buffered hydrofluoric acid). Next, a GaN layer (thickness: 50 nm) is grown, by MOCVD at 1,140° C., on the first layer exposed by removal of the second layer without supply of an n-type dopant gas. Thus, on the first layer is provided a third layer formed of n-type GaN doped with Si at a high concentration and exhibiting favorable crystallinity.

Abstract: A semiconductor light emitting device includes a semiconductor light emitting element, a lead electrically connected to the semiconductor light emitting element, and a resin package covering the semiconductor light emitting element and part of the lead. The resin package includes a lens facing the semiconductor light emitting element. The lead includes an exposed portion that is not covered by the resin package. The exposed portion includes a first portion and a second portion, where the first portion has a first mount surface oriented backward along the optical axis of the lens, and the second portion has a second mount surface oriented perpendicularly to the optical axis of the lens.

Abstract: A method of manufacturing epitaxial material used for GaN based LED with low polarization effect, which includes steps of growing n-type InGaAlN layer composed of GaN buffer layer (2) and n-type GaN layer (3), low polarizing active layer composed of InGaAlN multi-quantum well structure polarized regulating and controlling layer (4) and InGaAlN multi-quantum well structure light emitting layer (5) and p-type InGaAlN layer (6) on sapphire or SiC substrate (1) in turn. The method adds InGaAlN multi-quantum well structure polarized regulating and controlling layer, thus reduces polarization effect of quantum well active region.

Abstract: A semiconductor device for preventing the leaning of storage nodes and a method of manufacturing the same is described. The semiconductor device includes support patterns that are formed to support a plurality of cylinder type storage nodes. The support patterns are formed of a BN layer and have a hexagonal structure. The BN layer forming the support patterns has compressive stress as opposed to tensile stress and can therefore withstand cracking in the support patterns.

Abstract: A method and apparatus that may be utilized for chemical vapor deposition and/or hydride vapor phase epitaxial (HVPE) deposition are provided. In one embodiment, the apparatus a processing chamber that includes a showerhead with separate inlets and channels for delivering separate processing gases into a processing volume of the chamber without mixing the gases prior to entering the processing volume. In one embodiment, the showerhead includes one or more cleaning gas conduits configured to deliver a cleaning gas directly into the processing volume of the chamber while by-passing the processing gas channels. In one embodiment, the showerhead includes a plurality of metrology ports configured to deliver a cleaning gas directly into the processing volume of the chamber while by-passing the processing gas channels. As a result, the processing chamber components can be cleaned more efficiently and effectively than by introducing cleaning gas into the chamber only through the processing gas channels.

Abstract: A method of manufacturing a low defect density GaN material comprising at least two steps of growing epitaxial layers of GaN with differences in growing conditions, (a.) a first step of growing an epitaxial layer GaN on an epitaxially competent layer under first growing conditions selected to induce island features formation, followed by (b.) a second step of growing an epitaxial layer of GaN under second growing conditions selected to enhance lateral growth until coalescence.

Abstract: A nitride semiconductor laser device uses a substrate with low defect density, contains reduced strains inside a nitride semiconductor film, and thus offers a satisfactorily long useful life. On a GaN substrate (10) with a defect density as low as 106 cm?2 or less, a stripe-shaped depressed portion (16) is formed by etching. On this substrate (10), a nitride semiconductor film (11) is grown, and a laser stripe (12) is formed off the area right above the depressed portion (16). With this structure, the laser stripe (12) is free from strains, and the semiconductor laser device offers a long useful life. Moreover, the nitride semiconductor film (11) develops reduced cracks, resulting in a greatly increased yield rate.

Abstract: A deposition process involves the formation of multicomponent semiconductor layers, in particular III-V epitaxial layers, on a substrate. Due to pyrolytic decomposition inside the reaction chamber, one of the process gases forms a first decomposition product. Together with a second decomposition product of a second process gas, the decomposition products form a layer on the surface of a heated substrate and also adhere to surfaces of the process chamber. To remove these adherences, during an etching step a purge gas containing a reactive substance formed by free radicals is introduced into the process chamber. The etching step may be performed before or after the deposition process.

Abstract: Provided is a method of forming optical waveguide. The method includes forming a trench on a semiconductor substrate to define an active portion, and partially oxidizing the active portion. An non-oxidized portion of the active portion is included in a core through which an optical signal passes, and an oxidized portion of the active portion is included in a cladding.

Abstract: A P-type nitride semiconductor and a method for manufacturing the same are provided. A nitride semiconductor includes a P-type nitride layer formed on a active layer, wherein the P-type nitride layer is a P-type nitride layer with the group 4 element doped.

Abstract: An object of the present invention is to provide a new n-type transistor, different from the prior art, using a channel having a nanotube-shaped structure, and having n-type semiconductive properties. To realize this, a film of a nitrogenous compound 6 is formed directly on a channel 5 of a transistor 1 comprising a source electrode 2, a drain electrode 3, a gate electrode 4 and the n-type channel 5 having a nanotube-shaped structure and provided between the source electrode 2 and the drain electrode 3.

Abstract: Provided is a III nitride semiconductor electronic device having a structure capable of reducing leakage current. A laminate 11 includes a substrate 13 and a III nitride semiconductor epitaxial film 15. The substrate 13 is made of a III nitride semiconductor having a carrier concentration of more than 1×1018 cm?3. The epitaxial structure 15 includes a III nitride semiconductor epitaxial film 17. A first face 13a of the substrate 13 is inclined at an angle ? of more than 5 degrees with respect to an axis Cx extending in a direction of the c-axis. A normal vector VN and a c-axis vector VC make the angle ?. The III nitride semiconductor epitaxial film 17 includes first, second and third regions 17a, 17b and 17c arranged in order in a direction of a normal to the first face 13a. A dislocation density of the third region 17c is smaller than that of the first region 17a. A dislocation density of the second region 17b is smaller than that of the substrate 13.

Abstract: Provided is a Group III nitride-based compound semiconductor light-emitting device including aluminum regions. The Group III nitride-based compound semiconductor light-emitting device includes a sapphire substrate; aluminum regions which are formed on the substrate; an AlN buffer layer; an Si-doped GaN n-contact layer; an n-cladding layer formed of multiple layer units, each including an undoped In0.1Ga0.9N layer, an undoped GaN layer, and a silicon (Si)-doped GaN layer; an MQW light-emitting layer including alternately stacked eight well layers formed of In0.2Ga0.8N and eight barrier layers formed of GaN and Al0.06Ga0.94N; a p-cladding layer formed of multiple layers including a p-type Al0.3Ga0.7N layer and a p-type In0.08Ga0.92N layer; a p-contact layer having a layered structure including two p-type GaN layers having different magnesium concentrations; and an ITO light-transmitting electrode.

Abstract: Affords III-nitride crystals having a major surface whose variance in crystallographic plane orientation with respect to an {hkil} plane chosen exclusive of the {0001} form is minimal. A method of manufacturing the III-nitride crystal is one of: conditioning a plurality of crystal plates (10) in which the deviation in crystallographic plane orientation in any given point on the major face (10m) of the crystal plates (10), with respect to an {hkil} plane chosen exclusive of the {0001} form, is not greater than 0.5°; arranging the plurality of crystal plates (10) in a manner such that the plane-orientation deviation, with respect to the {hkil} plane, in any given point on the major-face (10m) collective surface (10a) of the plurality of crystal plates (10) will be not greater than 0.5°, and such that at least a portion of the major face (10m) of the crystal plates (10) is exposed; and growing second III-nitride crystal (20) onto the exposed areas of the major faces (10m) of the plurality of crystal plates (10).

Abstract: Large area single crystal III-V nitride material having an area of at least 2 cm2, having a uniformly low dislocation density not exceeding 3×106 dislocations per cm2 of growth surface area, and including a plurality of distinct regions having elevated impurity concentration, wherein each distinct region has at least one dimension greater than 50 microns, is disclosed. Such material can be formed on a substrate by a process including (i) a first phase of growing the III-V nitride material on the substrate under pitted growth conditions, e.g., forming pits over at least 50% of the growth surface of the III-V nitride material, wherein the pit density on the growth surface is at least 102 pits/cm2 of the growth surface, and (ii) a second phase of growing the III-V nitride material under pit-filling conditions.

Abstract: In the method of fabricating a quantum well structure which includes a well layer and a barrier layer, the well layer is grown at a first temperature on a sapphire substrate. The well layer comprises a group III nitride semiconductor which contains indium as a constituent. An intermediate layer is grown on the InGaN well layer while monotonically increasing the sapphire substrate temperature from the first temperature. The group III nitride semiconductor of the intermediate layer has a band gap energy larger than the band gap energy of the InGaN well layer, and a thickness of the intermediate layer is greater than 1 nm and less than 3 nm in thickness. The barrier layer is grown on the intermediate layer at a second temperature higher than the first temperature. The barrier layer comprising a group III nitride semiconductor and the group III nitride semiconductor of the barrier layer has a band gap energy larger than the band gap energy of the well layer.

Abstract: A method of producing a group III nitride such as aluminum nitride, comprising the step of reacting a group III halide gas such as aluminum trichloride gas with a nitrogen source gas such as ammonia gas in a growth chamber to grow a group III nitride on a substrate held in the growth chamber, wherein the method further comprises premixing together the group III halide gas and the nitrogen source gas to obtain a mixed gas and then introducing the mixed gas into the growth chamber without forming a deposit in the mixed gas substantially to be reacted each other. For the growth of a group III nitride such as an aluminum-based group III nitride by HVPE, there are provided a method of producing the group III nitride having as high quality as that obtained by the method of the prior art at a high yield and an apparatus used in the method.

Abstract: An object of the present invention is to provide a Group III nitride semiconductor multilayer structure having a smooth surface and exhibiting excellent crystallinity, which multilayer structure employs a low-cost substrate that can be easily processed. Another object is to provide a Group III nitride semiconductor light-emitting device comprising the multilayer structure. The inventive Group III nitride semiconductor multilayer structure comprises a substrate; an AlxGa1-xN (0?x?1) buffer layer which is provided on the substrate and has a columnar or island-like crystal structure; and an AlxInyGa1-x-yN (0?x?1, 0?y?1, 0?x+y?1) single-crystal layer provided on the buffer layer, wherein the substrate has, on its surface, non-periodically distributed grooves having an average depth of 0.01 to 5 ?m.

Abstract: It is an object of the present invention to provide a nitride semiconductor device with low parasitic resistance by lowering barrier height to reduce contact resistance at an interface of semiconductor and metal. The nitride semiconductor device includes a GaN layer, a device isolation layer, an ohmic electrode, an n-type Al0.25Ga0.75N layer, a sapphire substrate, and a buffer layer. A main surface of the n-type Al0.25Ga0.75N layer is on (0 0 0 1) plane as a main surface, and concaves are arranged in a checkerboard pattern on the surface. The ohmic electrode contacts the sides of the concaves of the n-type Al0.25Ga0.75N layer, and the sides of the concaves are on non-polar surfaces such as (1 1 ?2 0) plane or (1 ?1 0 0) plane.

Abstract: A substrate for forming a semiconductor layer includes a plurality of linear convexes or grooves on a surface of the substrate by crystal growth. The plurality of linear convexes or grooves are formed along a direction of a cleavage plane of the semiconductor layer.

Abstract: A nitride semiconductor laser device uses a substrate with low defect density, contains reduced strains inside a nitride semiconductor film, and thus offers a satisfactorily long useful life. On a GaN substrate (10) with a defect density as low as 106 cm?2 or less, a stripe-shaped depressed portion (16) is formed by etching. On this substrate (10), a nitride semiconductor film (11) is grown, and a laser stripe (12) is formed off the area right above the depressed portion (16). With this structure, the laser stripe (12) is free from strains, and the semiconductor laser device offers a long useful life. Moreover, the nitride semiconductor film (11) develops reduced cracks, resulting in a greatly increased yield rate.

Abstract: A nitride semiconductor light-emitting device wherein a substrate or nitride semiconductor layer has a defect concentration region and a low defect density region other than the defect concentration region. A portion including the defect concentration region of the nitride semiconductor layer or substrate has a trench region deeper than the low defect density region. Thus by digging the trench in the defect concentration region, the growth detection is uniformized, and the surface planarity is improved. The uniformity of the characteristic in the wafer surface leads to improvement of the yield.

Abstract: A nitride semiconductor light-emitting device wherein a substrate or nitride semiconductor layer has a defect concentration region and a low defect density region other than the defect concentration region. A portion including the defect concentration region of the nitride semiconductor layer or substrate has a trench region deeper than the low defect density region. Thus by digging the trench in the defect concentration region, the growth detection is uniformized, and the surface planarity is improved. The uniformity of the characteristic in the wafer surface leads to improvement of the yield.

Abstract: An object of the present invention is to provide a new n-type transistor, different from the prior art, using a channel having a nanotube-shaped structure, and having n-type semiconductive properties. To realize this, a film of a nitrogenous compound 6 is formed directly on a channel 5 of a transistor 1 comprising a source electrode 2, a drain electrode 3, a gate electrode 4 and the n-type channel 5 having a nanotube-shaped structure and provided between the source electrode 2 and the drain electrode 3.

Abstract: Nanofluidic devices incorporating inorganic nanotubes fluidly coupled to channels or nanopores for supplying a fluid containing chemical or bio-chemical species are described. In one aspect, two channels are fluidly interconnected with a nanotube. Electrodes on opposing sides of the nanotube establish electrical contact with the fluid therein. A bias current is passed between the electrodes through the fluid, and current changes are detected to ascertain the passage of select molecules, such as DNA, through the nanotube. In another aspect, a gate electrode is located proximal the nanotube between the two electrodes thus forming a nanofluidic transistor. The voltage applied to the gate controls the passage of ionic species through the nanotube selected as either or both ionic polarities. In either of these aspects the nanotube can be modified, or functionalized, to control the selectivity of detection or passage.

Abstract: A method of forming a semiconductor structure includes providing a substrate; forming a buffer/nucleation layer over the substrate; forming a group-III nitride (III-nitride) layer over the buffer/nucleation layer; and subjecting the III-nitride layer to a nitridation. The step of forming the III-nitride layer comprises metal organic chemical vapor deposition.

Abstract: A semiconductor light emitting device includes a semiconductor light emitting element, a lead electrically connected to the semiconductor light emitting element, and a resin package covering the semiconductor light emitting element and part of the lead. The resin package includes a lens facing the semiconductor light emitting element. The lead includes an exposed portion that is not covered by the resin package. The exposed portion includes a first portion and a second portion, where the first portion has a first mount surface oriented backward along the optical axis of the lens, and the second portion has a second mount surface oriented perpendicularly to the optical axis of the lens.

Abstract: A vertical cavity surface emitting laser having a dielectric gain guide. The gain guide may provide current confinement, device isolation and possibly optical confinement. The first mirror and an active region may be grown. A pattern may be placed on or near the active region. A dielectric material may be deposited on the pattern and the pattern may be removed resulting in a gain guide. Then a top mirror may be grown on the gain guide. This structure with the dielectric gain guide may have specific characteristics and/or additional features.

Abstract: A P-type nitride semiconductor and a method for manufacturing the same are provided. A nitride semiconductor includes a P-type nitride layer formed on a active layer, wherein the P-type nitride layer is a P-type nitride layer with the group 4 element doped.

Abstract: A GaN-based thin film (thick film) is grown using a metal buffer layer grown on a substrate. (a) A metal buffer layer (210) made of, for example, Cr or Cu is vapor-deposited on a sapphire substrate (120). (b) A substrate obtained by vapor-depositing the metal buffer layer (210) on the sapphire substrate (120) is nitrided in an ammonia gas ambient, thereby forming a metal nitride layer (212). (c) A GaN buffer layer (222) is grown on the nitrided metal buffer layers (210, 212). (d) Finally, a GaN single-crystal layer (220) is grown. This GaN single-crystal layer (220) can be grown to have various thicknesses depending on the objects. A freestanding substrate can be fabricated by selective chemical etching of the substrate fabricated by the above steps. It is also possible to use the substrate fabricated by the above steps as a GaN template substrate for fabricating a GaN-based light emitting diode or laser diode.

Abstract: In one embodiment a method for fabricating a compound nitride semiconductor device comprising positioning one or more substrates on a susceptor in a processing region of a metal organic chemical vapor deposition (MOCVD) chamber comprising a showerhead, depositing a gallium nitride layer over the substrate with a thermal chemical-vapor-deposition process within the MOCVD chamber by flowing a first gallium containing precursor and a first nitrogen containing precursor through the showerhead into the MOCVD chamber, removing the one or more substrates from the MOCVD chamber without exposing the one or more substrates to atmosphere, flowing a chlorine gas into the processing chamber to remove contaminants from the showerhead, transferring the one or more substrates into the MOCVD chamber after removing contaminants from the showerhead, and depositing an InGaN layer over the GaN layer with a thermal chemical-vapor-deposition process within the MOCVD chamber is provided.

Abstract: The invention relates to a device for depositing one or more layers, in particular crystalline layers, on one or more substrates, in particular crystalline substrates (6), which are situated on a susceptor (3) in a process chamber (2) of a reactor (1). A process chamber wall (4) that can be actively heated by a process chamber heating unit (11) lies opposite the susceptor (3) that can be actively heated by the susceptor heating unit (11). The device is provided with a gas inlet organ (7) for introducing process gases into the process chamber and the process chamber heating unit (11) has a coolant channel (13) and is situated at a distance from the exterior (18) of the process chamber wall (4) during the active heating of the latter (4). The aim of the invention is to also allow the device to be used with hybrid technology.

Abstract: The invention discloses a method for fabricating a light-emitting diode. In an embodiment of the invention, the method comprises the following steps of (a) preparing a substrate; (b) forming an epitaxial layer on the substrate, wherein the epitaxial layer has an upper surface; (c) forming a mask layer on a first region of the upper surface of the epitaxial layer; (d) forming a semiconductor multi-layer structure on a second region of the upper surface of the epitaxial layer, wherein the second region is distinct from the first region; (e) removing the mask layer formed on the first region of the upper surface of the epitaxial layer; and (f) forming an electrode on the first region of the upper surface of the epitaxial layer.

Abstract: A method for fabricating a semiconductor device includes the steps of forming a first ferroelectric film over a lower electrode, crystallizing the first ferroelectric film, forming a second ferroelectric film in an amorphous state over the first ferroelectric film so as to fill voids existing on a surface of the first ferroelectric film, and forming an upper electrode over the second ferroelectric film of the amorphous state, wherein the crystallizing step of the first ferroelectric film is conducted by a thermal annealing process at a temperature of 585° C. or higher.

Abstract: The present invention generally provides apparatus and methods for forming LED structures. One embodiment of the present invention provides a method for fabricating a compound nitride structure comprising forming a first layer comprising a first group-III element and nitrogen on substrates in a first processing chamber by a hydride vapor phase epitaxial (HVPE) process or a metal organic chemical vapor deposition (MOCVD) process, forming a second layer comprising a second group-III element and nitrogen over the first layer in a second processing chamber by a MOCVD process, and forming a third layer comprising a third group-III element and nitrogen over the second layer by a MOCVD process.

Abstract: An AlGaN composition is provided comprising a group III-Nitride active region layer, for use in an active region of a UV light emitting device, wherein light-generation occurs through radiative recombination of carriers in nanometer scale size, compositionally inhomogeneous regions having band-gap energy less than the surrounding material. Further, a semiconductor UV light emitting device having an active region layer comprised of the AlGaN composition above is provided, as well as a method of producing the AlGaN composition and semiconductor UV light emitting device, involving molecular beam epitaxy.

Abstract: A nitride semiconductor light emitting device comprises a first nitride semiconductor layer, an active layer of a single or multiple quantum well structure formed on the first nitride semiconductor layer and including an InGaN well layer and a multilayer barrier layer, and a second nitride semiconductor layer formed on the active layer. A fabrication method of a nitride semiconductor light emitting device comprises: forming a buffer layer on a substrate, forming a GaN layer on the buffer layer, forming a first electrode layer on the GaN layer, forming an InxGa1-xN layer on the first electrode layer, forming on the first InxGa1-xN layer an active layer including an InGaN well layer and a multilayer barrier layer for emitting light, forming a p-GaN layer on the active layer, and forming a second electrode layer on the p-GaN layer.

Abstract: A semiconductor device includes: a first semiconductor layer which is made of a first group III nitride semiconductor; a cap layer which is formed on the first semiconductor layer, which is made of a second group III nitride semiconductor, and which has an opening for exposing the first semiconductor layer; and a source electrode and a drain electrode which are formed on the cap layer so as to oppose to each other with the opening interposed. A gate electrode is formed on the bottom face of the opening with an insulating film interposed. The insulating film is formed on at least a part of the first semiconductor layer which is exposed through the opening.

Abstract: A manufacturing method for three-dimensional GaN epitaxial structure comprises a disposing step, in which a substrate of LiAlO2 and a source metal of Ga are disposed inside an vacuum chamber. An exposing step is importing N ions in plasma state and generated by a nitrogen source into the chamber. A heating step is heating up the source metal to generate Ga vapor. A growing step is forming a three-dimensional GaN epitaxial structure with hexagonal micropyramid or hexagonal rod having a broadened disk-like surface on the substrate by reaction between the Ga vapor and the plasma state of N ions.

Abstract: A method for reducing dislocation density between an AlGaN layer and a sapphire substrate involving the step of forming a self-organizing porous AlN layer of non-coalescing column-like islands with flat tops on the substrate.

Abstract: It is an object of the present invention to provide a nitride semiconductor device with low parasitic resistance by lowering barrier height to reduce contact resistance at an interface of semiconductor and metal. The nitride semiconductor device includes a GaN layer, a device isolation layer, an ohmic electrode, an n-type Al0.25Ga0.75N layer, a sapphire substrate, and a buffer layer. A main surface of the n-type Al0.25Ga0.75N layer is on (0 0 0 1) plane as a main surface, and concaves are arranged in a checkerboard pattern on the surface. The ohmic electrode contacts the sides of the concaves of the n-type Al0.25Ga0.75N layer, and the sides of the concaves are on non-polar surfaces such as (1 1 ?2 0) plane or (1 ?1 0 0) plane.

Abstract: Non-polar or semi-polar (Al, Ga, In)N substrates are fabricated by re-growth of (Al, Ga, In)N crystal on (Al, Ga, In)N seed crystals, wherein the size of the seed crystal expands or is increased in the lateral and vertical directions, resulting in larger sizes of non-polar and semi-polar substrates useful for optoelectronic and microelectronic devices. One or more non-polar or semi-polar substrates may be sliced from the re-grown crystal. The lateral growth rate may be greater than the vertical growth rate. The seed crystal may be a non-polar seed crystal. The seed crystal may have crystalline edges of equivalent crystallographic orientation.

Abstract: A method for preparing an AlGaN crystal layer with good surface flatness is provided. A surface layer of AlN is epitaxially formed on a c-plane sapphire single crystal base material by MOCVD method, and the resulting laminated body is then heated at a temperature of 1300° C. or higher so that a template substrate applying in-plane compressive stress and having a surface layer flat at a substantially atomic level is obtained. An AlGaN layer is formed on the template substrate at a deposition temperature higher than 1000° C. by an MOCVD method that includes depositing alternating layers of a first unit layer including a Group III nitride represented by the composition formula AlxGa1-xN (0?x?1) and a second unit layer including a Group III nitride represented by the composition formula AlyGa1-yN (0?y?1 and y?x) such that the AlGaN layer has a superlattice structure.

Abstract: In a method for manufacturing a high-quality GaN-based semiconductor layer on a substrate of different material, an AlN nucleation layer is grown on a substrate, a GaN buffer layer is grown on the AlN nucleation layer, and the substrate annealed. The AlN nucleation layer is formed to have a thickness greater than a critical radius of a nucleus of AlN crystal and less than a critical resilient thickness of AlN, and the GaN buffer layer is formed to have a thickness greater than a critical radius of a nucleus of GaN crystal and less than a critical resilient thickness of GaN. Annealing time is greater than L2/DGa where L indicates a diffusion distance of Ga, and DGa indicates a diffusion coefficient of Ga in the AlN nucleation layer.