Abstract: A nitride semiconductor light-emitting device wherein a substrate or nitride semiconductor layer has a defect concentration region and a low defect density region other than the defect concentration region. A portion including the defect concentration region of the nitride semiconductor layer or substrate has a trench region deeper than the low defect density region. Thus by digging the trench in the defect concentration region, the growth detection is uniformized, and the surface planarity is improved. The uniformity of the characteristic in the wafer surface leads to improvement of the yield.

Abstract: A manufacturing method of a nitride substrate includes the steps of preparing a ground substrate; forming a mask on the ground substrate; placing the ground substrate in a reactor, and heating the ground substrate to a temperature of 850° C. to 1100° C. In the step of heating the ground substrate, HCl and NH3 are supplied into the reactor so that partial pressure PHCl satisfies (1.5+0.0005 p) kPa?PHCl?(4+0.0005 p) kPa and partial pressure PNH3 satisfies (15?0.0009 p) kPa?PNH3?(26?0.0017 p) kPa, whereby an AlxGayIn1-x-yN crystal (0?x<1, 0<y?1) is grown, and whereby a ridge-valley structure including a plurality of ridges and valleys parallel to one another is formed. The AlxGayIn1-x-yN crystal is grown so that the ridge-valley structure is not buried while a height of the valleys from the ground substrate is allowed to exceed 2.5 (p?s).

Abstract: A method of making a group III nitride-based compound semiconductor has the steps of: providing a semiconductor substrate with a polished surface, the semiconductor substrate being of group III nitride-based compound semiconductor; and growing a semiconductor epitaxial growth layer of group III nitride-based compound semiconductor on the semiconductor substrate. The polished surface is an inclined surface that has an off-angle ? of 0.15 degrees or more and 0.6 degrees or less to a-face, c-face or m-face of the semiconductor substrate.

Abstract: A fabrication method of fabricating a structure capable of being used for generation or detection of electromagnetic radiation includes a forming step of forming a layer containing a compound semiconductor on a substrate at a substrate temperature below about 300° C., a first heating step of heating the substrate with the layer in an ambience containing arsenic, and a second heating step of heating the substrate with the layer at the substrate temperature above about 600° C. in a gas ambience incapable of chemically reacting on the compound semiconductor. Structures of the present invention capable of being used for generation or detection of electromagnetic radiation can be fabricated using the fabrication method by appropriately regulating the substrate temperature, the heating time, the gas ambience and the like in the second heating step.

Abstract: In a method for fabricating a nitride-based semiconductor laser which forms, by a selective deposition, a current narrowing structure and a structure confining a light in a horizontal direction in parallel to a substrate, when the nitride-based semiconductor is selectively deposited by a metal organic chemical vapor deposition, silicon generated by decomposition of the silicon oxide film used as the mask for the selective deposition is prevented from being deposited on a re-growth boundary. For this purpose, a silicon nitride film is used as the mask for the selective deposition, and when the nitride-based semiconductor is selectively deposited by the metal organic chemical vapor deposition, a V-group material of the nitride-based semiconductor, namely, a nitrogen material, for example, ammonia, is supplied so that the decomposition of the silicon nitride film used as the mask for the selective deposition, is prevented.

Abstract: A method of forming a semiconductor structure includes providing a substrate; forming a buffer/nucleation layer over the substrate; forming a group-III nitride (III-nitride) layer over the buffer/nucleation layer; and subjecting the III-nitride layer to a nitridation. The step of forming the III-nitride layer comprises metal organic chemical vapor deposition.

Abstract: A GaN-based thin film (thick film) is grown using a metal buffer layer grown on a substrate. (a) A metal buffer layer (210) made of, for example, Cr or Cu is vapor-deposited on a sapphire substrate (120). (b) A substrate obtained by vapor-depositing the metal buffer layer (210) on the sapphire substrate (120) is nitrided in an ammonia gas ambient, thereby forming a metal nitride layer (212). (c) A GaN buffer layer (222) is grown on the nitrided metal buffer layers (210, 212). (d) Finally, a GaN single-crystal layer (220) is grown. This GaN single-crystal layer (220) can be grown to have various thicknesses depending on the objects. A freestanding substrate can be fabricated by selective chemical etching of the substrate fabricated by the above steps. It is also possible to use the substrate fabricated by the above steps as a GaN template substrate for fabricating a GaN-based light emitting diode or laser diode.

Abstract: There is provided a method for preparing an AlGaN crystal layer having an excellent surface flatness. A buffer layer effective in stress relaxation is formed on a template substrate having a surface layer that is flat at a substantially atomic level and to which in-plane compressive stress is applied, and an AlGaN layer is formed on the buffer layer, so that an AlGaN layer can be formed that is flat at a substantially atomic level. Particularly when the surface layer of the template substrate includes a first AlN layer, a second AlN layer may be formed thereon at a temperature of 600° C. or lower, while a mixed gas of TMA and TMG is supplied in a TMG/TMA mixing ratio of 3/17 or more to 6/17 or less, so that a buffer layer effective in stress relaxation the can be formed in a preferred manner.

Abstract: A Pendeo-epitaxy growth substrate and a method of manufacturing the same are provided. The Pendeo-epitaxy growth substrate includes a substrate, a plurality of pattern areas formed on the substrate in a first direction for Pendeo-epitaxy growth, and at least one solution blocking layer contacting the plurality of pattern areas and formed on the substrate in a second direction, thereby preventing contamination of a semiconductor device due to air gaps and reducing the percentage defects of the semiconductor device during a Pendeo-epitaxy growth process.

Abstract: There is provided a method of growing a nitride single crystal. A method of growing a nitride single crystal according to an aspect of the invention may include: growing a first nitride single crystal layer on a substrate; forming a dielectric pattern having an open area on the first nitride single crystal layer, the open area exposing a part of an upper surface of the first nitride single crystal layer; and growing a second nitride single crystal layer on the first nitride single crystal layer through the open area while the second nitride single crystal layer grows to be equal to or larger than a height of the dielectric pattern, wherein the height of the dielectric pattern is greater than a width of the open area so that dislocations in the second nitride single crystal layer move laterally, collide with side walls of the dielectric pattern, and are terminated.

Abstract: HVPE method for simultaneously fabricating multiple Group III nitride semiconductor structures during a single reactor run. A HVPE reactor includes a reactor tube, a growth zone, a heating element and a plurality of gas blocks. A substrate holder is capable of holding multiple substrates and can be a single or multi-level substrate holder. The gas delivery blocks are independently controllable. Gas flows from the delivery blocks are mixed to provide a substantially uniform gas environment within the growth zone. The substrate holder can be controlled, e.g., rotated and/or tilted, for uniform material growth. Multiple Group III nitride semiconductor structures can be grown on each substrate during a single fabrication run of the HVPE reactor. Growth on different substrates is substantially uniform and can be performed on larger area substrates, such as 3-12? substrates.

Abstract: A method utilizes HVPE to grow high quality flat and thick compound semiconductors (15) onto foreign substrates (10) using nanostructure compliant layers. Nanostructures (12) of semiconductor materials car be grown on foreign substrates (10) by molecular beam epitaxy (MBE), chemical vapour deposition (CVD), metalorganic chemical vapour deposition (MOCVD) and hydride vapour phase epitaxy (HVPE). Further growth of continuous compound semiconductor thick films (15) or wafer is achieved by epitaxial lateral overgrowth using HVPE.

Abstract: An electronic device contains a substrate, a sub-collector supported by the substrate, an un-doped layer having a selectively implanted buried sub-collector and supported by the sub-collector, an As-based nucleation layer partially supported by the un-doped layer, a collector layer supported by the As-based nucleation layer, a base layer supported by the collector layer, an emitter layer and a base contact supported by the base layer, an emitter cap layer supported by the emitter layer, an emitter contact supported by the emitter cap layer, and a collector contact supported by the sub-collector. A method provides for selecting a first InP layer, forming an As-based nucleation layer on the first InP layer, and epitaxially growing a second InP layer on the As-based nucleation layer.

Abstract: In a method for making a compound semiconductor including a substrate and a compound semiconductor layer having a lattice mismatch ratio of 2% or more relative to the substrate, the method includes a first epitaxial growth step of forming a buffer layer on the substrate, the buffer layer having a predetermined distribution of lattice mismatch ratios in the thickness direction so as to reduce strain; and a second epitaxial growth step of forming the compound semiconductor layer on the buffer layer. The first epitaxial growth step is carried out by metal organic chemical vapor deposition at a deposition temperature of 600° C. or less.

Abstract: A method of manufacturing a low defect density GaN material comprising at least two step of growing epitaxial layers of GaN with differences in growing conditions, (a.) a first step of growing an epitaxial layer GaN on an epitaxially compentent layer under first growing conditions selected to induce island features formation, followed by (b.) a second step of growing an epitaxial layer of GaN under second growing conditions selected to enhance lateral growth until coalescence.

Abstract: The present invention relates to a I?-nitride compound semiconductor light emitting device comprising an active layer with the multi-quantum wells interposed between an n-InxAlyGazN(x+y+z=1, 0<x<1, 0<y<1, 0<z?1) layer and a p-InxAlyGazN(x+y+z=1, 0<x<1, 0<y<1, 0<z<1) layer, wherein the active layer comprises an alternate stacking of a quantum-well layer made of InxGa1-xN(0.05<x<1) and a sandwich barrier layer, the sandwich barrier layer comprising a first outer barrier layer of InaGa1-aN(0<a<0.05), a middle barrier layer of AlyGa1-yN(0<y<1) formed on the first outer barrier layer and a second outer barrier layer of InbGa1-bN(0<b<0.05) formed on the middle barrier layer, thereby a high-efficiency/high-output light emitting device with high-current and high-temperature properties can be obtained, and it is possible to easily achieve a high-efficiency green light emission at a wavelength equal to or over 500 nm, and high-efficiency near UV light emission.

Abstract: HVPE method for simultaneously fabricating multiple Group III nitride semiconductor structures during a single reactor run. A HVPE reactor includes a reactor tube, a growth zone, a heating element and a plurality of gas blocks. A substrate holder is capable of holding multiple substrates and can be a single or multi-level substrate holder. The gas delivery blocks are independently controllable. Gas flows from the delivery blocks are mixed to provide a substantially uniform gas environment within the growth zone. The substrate holder can be controlled, e.g., rotated and/or tilted, for uniform material growth. Multiple Group III nitride semiconductor structures can be grown on each substrate during a single fabrication run of the HVPE reactor. Growth on different substrates is substantially uniform and can be performed on larger area substrates, such as 3-12? substrates.

Abstract: The object of the present invention is to provide a gallium nitride-based compound semiconductor multilayer structure useful for manufacturing a gallium nitride-based compound semiconductor light-emitting device which requires a low operating voltage and from which a good emission output can be obtained. The present gallium nitride-based compound semiconductor multilayer structure comprises a substrate having thereon an n-type layer, a light-emitting layer and a p-type layer, the light-emitting layer having a multiple quantum well structure in which a well layer and a barrier layer are alternately stacked repeatedly and the light-emitting layer being provided between the n-type layer and the p-type layer, wherein the well layers consisting of the multiple quantum well structure comprise a well layer having an ununiform thickness and a well layer having a uniform thickness.

Abstract: GaN layer on semiconductor substrate is grown by using GaN nanorod buffer layer. Firstly, semiconductor substrate is cleaned and thermally degassed to remove the contaminant in the growth chamber. After the above step, the GaN nanorods layer is grown under the N-rich condition. Then, GaN epilayer is overgrown on the GaN nanorods layer under the Ga-rich condition for forming Group of III-Nitrides semiconductor layer on the semiconductor substrate.

Abstract: A method forms a gallium nitride crystal sheet. According to the method a metal melt, including gallium, is brought to a vacuum of 0.01 Pa or lower and is heated to a growth temperature of between approximately 860° C. and approximately 870° C. A nitrogen plasma is applied to the surface of the melt at a sub-atmospheric working pressure, until a gallium nitride crystal sheet is formed on top. Preferably, the growth temperature is of 863° C., and the working pressure is within the range of 0.05 Pa and 2.5 Pa. Application of the plasma includes introducing nitrogen gas to the metal melt at the working pressure, igniting the gas into plasma, directing the plasma to the surface of the metal melt, until gallium nitride crystals crystallize thereon, and maintaining the working pressure and the directed plasma until a gallium nitride crystal sheet is formed.

Abstract: Non-polar or semi-polar (Al, Ga, In)N substrates are fabricated by re-growth of (Al, Ga, In)N crystal on (Al, Ga, In)N seed crystals, wherein the size of the seed crystal expands or is increased in the lateral and vertical directions, resulting in larger sizes of non-polar and semi-polar substrates useful for optoelectronic and microelectronic devices. One or more non-polar or semi-polar substrates may be sliced from the re-grown crystal. The lateral growth rate may be greater than the vertical growth rate. The seed crystal may be a non-polar seed crystal.

Abstract: Disclosed herein is a semiconductor light emitting device including: a light emitting part formed of a multilayer structure arising from sequential stacking of a first compound semiconductor layer, an active layer, and a second compound semiconductor layer; a current block layer; and a burying layer, wherein a planar shape of the active layer is a strip shape in which a width of a center part is smaller than a width of both end parts, the current block layer is composed of third and fourth compound semiconductor layers, the burying layer is formed of a multilayer structure arising from sequential stacking of a first burying layer and a second burying layer, and an impurity for causing the second burying layer is such that a substitution site of the impurity in the second burying layer does not compete with a substitution site of an impurity in the third compound semiconductor layer.

Abstract: A manufacturing method of a group III nitride semiconductor includes the steps of: depositing a metal layer on an AlN template substrate or an AlN single crystal substrate formed by depositing an AlN single crystal layer with a thickness of not less than 0.1 ?m nor more than 10 ?m on a substrate made of either one of sapphire, SiC, and Si; forming a metal nitride layer having a plurality of substantially triangular-pyramid-shaped or triangular-trapezoid-shaped microcrystals by performing a heating nitridation process on the metal layer under a mixed gas atmosphere of ammonia; and depositing a group III nitride semiconductor layer on the metal nitride layer.

Abstract: A zinc-blende nitride semiconductor free-standing substrate has a front surface and a back surface opposite the front surface. The distance between the front and back surfaces is not less than 200 ?m. The area ratio of the zinc-blende nitride semiconductor to the front surface is not less than 95%.

Abstract: A semiconductor device composed of III-nitride materials is produced with epitaxial growth that permits vertical and lateral growth geometries to improve device characteristics. The resulting device has a greater breakdown voltage due to the greater integrity of the semiconductor material structure since no ion implantation processes are used. The epitaxially grown layers also exhibit greater thermal conductivity for improved operation with power semiconductor devices. The device may include a laterally grown charge compensated area to form a superjunction device. The resulting device may be bidirectional and have improved breakdown voltage in addition to higher current capacity for a given voltage rating.

Abstract: A III-nitride film, grown on an m-plane substrate, includes multiple quantum wells (MQWs) with a barrier thickness of 27.5 nm or greater and a well thickness of 8 nm or greater. An emission wavelength can be controlled by selecting the barrier thickness of the MQWs. Device fabricated using the III-nitride film include nonpolar III-nitride light emitting diodes (LEDs) with a long wavelength emission.

Abstract: A nonpolar III-nitride film grown on a miscut angle of a substrate. The miscut angle towards the <000-1> direction is 0.75° or greater miscut and less than 27° miscut towards the <000-1> direction. Surface undulations are suppressed and may comprise faceted pyramids. A device fabricated using the film is also disclosed. A nonpolar III-nitride film having a smooth surface morphology fabricated using a method comprising selecting a miscut angle of a substrate upon which the nonpolar III-nitride films are grown in order to suppress surface undulations of the nonpolar III-nitride films. A nonpolar III-nitride-based device grown on a film having a smooth surface morphology grown on a miscut angle of a substrate which the nonpolar III-nitride films are grown. The miscut angle may also be selected to achieve long wavelength light emission from the nonpolar film.

Abstract: An object of the present invention is to provide a new n-type transistor, different from the prior art, using a channel having a nanotube-shaped structure, and having n-type semiconductive properties. To realize this, a film of a nitrogenous compound 6 is formed directly on a channel 5 of a transistor 1 comprising a source electrode 2, a drain electrode 3, a gate electrode 4 and the n-type channel 5 having a nanotube-shaped structure and provided between the source electrode 2 and the drain electrode 3.

Abstract: A process for producing a nitride compound semiconductor represented by a general formula, InxGayAlzN (where x+y+Z=1, 0?x?1, 0?y?1, and 0?z?1), characterized in that a non-doped nitride compound semiconductor (A) represented by a general formula, InaGabAlcN (where a+b+c=1, 0?a?1, 0?b?1, and 0?c?1) of a thickness of 500 to 5000 ? is formed between a p-type contact layer and an n-type contact layer at a temperature within a range between 550 and 850° C.

Abstract: Affords a GaN substrate from which enhanced-emission-efficiency light-emitting and like semiconductor devices can be produced, an epi-substrate in which an epitaxial layer has been formed on the GaN substrate principal surface, a semiconductor device, and a method of manufacturing the GaN substrate. The GaN substrate is a substrate having a principal surface with respect to whose normal vector the [0001] plane orientation is inclined in two different off-axis directions.

Abstract: A nonpolar III-nitride film grown on a miscut angle of a substrate, in order to suppress the surface undulations, is provided. The surface morphology of the film is improved with a miscut angle towards an a-axis direction comprising a 0.15° or greater miscut angle towards the a-axis direction and a less than 30° miscut angle towards the a-axis direction.

Abstract: There is disclosed a method for forming a gallium nitride layer of which resistivity is 1×106?·cm or more, including steps of: forming a gallium nitride layer containing iron on a substrate; and heating said gallium nitride layer formed on said substrate.

Abstract: A method of fabricating a thick gallium nitride (GaN) layer includes forming a porous GaN layer having a thickness of 10-1000 nm by etching a GaN substrate in a reaction chamber in an HCI and NH3 gas atmosphere and forming an in-situ GaN growth layer in the reaction chamber. The method of forming the porous GaN layer and the thick GaN layer in-situ proceeds in a single chamber. The method is very simplified compared to the prior art. In this way, the entire process is performed in one chamber, and in particular, GaN etching and growth are performed using an HVPE process gas such that costs are greatly reduced.

Abstract: The present invention provides nitride semiconductors having a moderate density of basal plane stacking faults and a reduced density of threading dislocations, various products based on, incorporating or comprising the nitride semiconductors, including without limitation substrates, template films, templates, heterostructures with or without integrated substrates, and devices, and methods for fabrication of templates and substrates comprising the nitride semiconductors.

Abstract: A method of producing a GaN crystal is directed to growing a GaN crystal on a GaN seed crystal substrate. The method includes the steps of preparing a GaN seed crystal substrate including a first dopant such that the thermal expansion coefficient of the GaN seed crystal substrate becomes greater than that of the GaN crystal, and growing the GaN crystal to a thickness of at least 1 mm on the GaN seed crystal substrate. Accordingly, there can be provided a method of producing a GaN crystal that can suppress generation of a crack and grow a thick GaN crystal, and a GaN crystal substrate.

Abstract: A semiconductor-containing heterostructure including, from bottom to top, a III-V compound semiconductor buffer layer, a III-V compound semiconductor channel layer, a III-V compound semiconductor barrier layer, and an optional, yet preferred, III-V compound semiconductor cap layer is provided. The barrier layer may be doped, or preferably undoped. The III-V compound semiconductor buffer layer and the III-V compound semiconductor barrier layer are comprised of materials that have a wider band gap than that of the III-V compound semiconductor channel layer. Since wide band gap materials are used for the buffer and barrier layer and a narrow band gap material is used for the channel layer, carriers are confined to the channel layer under certain gate bias range. The inventive heterostructure can be employed as a buried channel structure in a field effect transistor.

Abstract: Affords high-carrier-concentration, low-cracking-incidence gallium nitride substrates and methods of forming gallium nitride films. A gallium nitride film 52 in which the carrier concentration is 1×1017 cm?3 or more is created. Initially, a gallium nitride layer 51 including an n-type dopant is formed onto a substrate 50. Then, the gallium nitride layer 51 formed on the substrate 50 is heated to form a gallium nitride film 52.

Abstract: A microelectronic assembly in which a semiconductor device structure is directionally positioned on an off-axis substrate (201). In an illustrative implementation, a laser diode is oriented on a GaN substrate (201) wherein the GaN substrate includes a GaN (0001) surface off-cut from the <0001> direction predominantly towards either the <1120> or the <11 00> family of directions. For a <11 20> off-cut substrate, a laser diode cavity (207) may be oriented along the <1 100> direction parallel to lattice surface steps (202) of the substrate (201) in order to have a cleaved laser facet that is orthogonal to the surface lattice steps. For <11 00> off-cut substrate, the laser diode cavity may be oriented along the <1 100> direction orthogonal to lattice surface steps (207) of the substrate (201) in order to provide a cleave laser facet that is aligned with the surface lattice steps.

Abstract: Disclosed are a (Al, Ga, In)N-based compound semiconductor device and a method of fabricating the same. The (Al, Ga, In)N-based compound semiconductor device of the present invention comprises a substrate; a (Al, Ga, In)N-based compound semiconductor layer grown on the substrate; and an electrode formed of at least one material or an alloy thereof selected from the group consisting of Pt, Pd and Au on the (Al, Ga, In)N-based compound semiconductor layer.

Abstract: Disclosed is a semiconductor device comprising a Ge semiconductor area, and an insulating film area, formed in direct contact with the Ge semiconductor area, containing metal, germanium, and oxygen.

Abstract: A GaN-based thin film (thick film) is grown using a metal buffer layer grown on a substrate. (a) A metal buffer layer (210) made of, for example, Cr or Cu is vapor-deposited on a sapphire substrate (120). (b) A substrate obtained by vapor-depositing the metal buffer layer (210) on the sapphire substrate (120) is nitrided in an ammonia gas ambient, thereby forming a metal nitride layer (212). (c) A GaN buffer layer (222) is grown on the nitrided metal buffer layers (210, 212). (d) Finally, a GaN single-crystal layer (220) is grown. This GaN single-crystal layer (220) can be grown to have various thicknesses depending on the objects. A freestanding substrate can be fabricated by selective chemical etching of the substrate fabricated by the above steps. It is also possible to use the substrate fabricated by the above steps as a GaN template substrate for fabricating a GaN-based light emitting diode or laser diode.

Abstract: A method of preparing a nitride semiconductor capable of forming a nitride-based semiconductor layer having a small number of dislocations as well as a small number of crystal defects resulting from desorption with excellent crystallinity on the upper surface of a substrate through a small number of growth steps is proposed. The method of preparing a nitride-based semiconductor comprises steps of forming a mask layer on the upper surface of a substrate to partially expose the upper surface of the substrate, forming a buffer layer on the exposed part of the upper surface of the substrate and the upper surface of the mask layer and thereafter growing a nitride-based semiconductor layer. Thus, the outermost growth surface of the nitride-based semiconductor layer laterally grown on the mask layer does not come into contact with the mask layer.

Abstract: An object of the present invention is to provide a Group III nitride semiconductor multilayer structure having a smooth surface and exhibiting excellent crystallinity, which multilayer structure employs a low-cost substrate that can be easily processed. Another object is to provide a Group III nitride semiconductor light-emitting device comprising the multilayer structure. The inventive Group III nitride semiconductor multilayer structure comprises a substrate; an AlxGa1-xN (0?x?1) buffer layer which is provided on the substrate and has a columnar or island-like crystal structure; and an AlxInyGa1-x-yN (0?x?1, 0?y?1, 0?x+y?1) single-crystal layer provided on the buffer layer, wherein the substrate has, on its surface, non-periodically distributed grooves having an average depth of 0.01 to 5 ?m.

Abstract: An object of the present invention is to provide a low-resistance n-type Group III nitride semiconductor layered structure having excellent flatness and few pits. The inventive n-type group III nitride semiconductor layered structure comprises a substrate and, stacked on the substrate, an n-type impurity concentration periodic variation layer comprising an n-type impurity atom higher concentration layer and an n-type impurity atom lower concentration layer, said lower concentration layer being stacked on said higher concentration layer.

Abstract: There is provided a method for preparing an AlGaN crystal layer having an excellent surface flatness. A buffer layer effective in stress relaxation is formed on a template substrate having a surface layer that is flat at a substantially atomic level and to which in-plane compressive stress is applied, and an AlGaN layer is formed on the buffer layer, so that an AlGaN layer can be formed that is flat at a substantially atomic level. Particularly when the surface layer of the template substrate includes a first AlN layer, a second AlN layer may be formed thereon at a temperature of 600° C. or lower, while a mixed gas of TMA and TMG is supplied in a TMG/TMA mixing ratio of 3/17 or more to 6/17 or less, so that a buffer layer effective in stress relaxation the can be formed in a preferred manner.

Abstract: It is an object of the present invention to provide a nitride semiconductor device with low parasitic resistance by lowering barrier height to reduce contact resistance at an interface of semiconductor and metal. The nitride semiconductor device includes a GaN layer, a device isolation layer, an ohmic electrode, an n-type Al0.25Ga0.75N layer, a sapphire substrate, and a buffer layer. A main surface of the n-type Al0.25Ga0.75N layer is on (0001) plane as a main surface, and concaves are arranged in a checkerboard pattern on the surface. The ohmic electrode contacts the sides of the concaves of the n-type Al0.25Ga0.75N layer, and the sides of the concaves are on non-polar surfaces such as (11-20) plane or (1-100) plane.

Abstract: A nitride semiconductor substrate having properties preferable for the manufacture of various nitride semiconductor devices is made available, by specifying or controlling the local variation in the off-axis angle of the principal surface of the nitride semiconductor substrate. The substrate, being misoriented, is manufactured to have an off-axis angle distribution across its principal surface such that variation ?? in the off-axis angle is continuous within a predetermined angular range.

Abstract: This invention provides high quality and low defect density Sb-containing alloys on lattice-mismatched substrates using Sb-containing buffer layers. More specifically, provided is a method of forming an epitaxial semiconductor alloy on a substrate, comprising: providing a substrate (such as InP); growing an Sb-containing buffer layer on the substrate; and growing a layer of As/Sb-containing semiconductor alloy on the buffer layer.

Abstract: The present invention relates to a method for producing an epitaxial substrate having a III-V group compound semiconductor crystal represented by the general formula InxGayAlzN (wherein, x+y+z=1, 0?x?1, 0?y?1, 0?z?1) having reduced dislocation density, comprising a first step of covering with a mask made of a different material from the III-V group compound semiconductor so that only portions around points of the crystal constitute openings by using a III-V group compound semiconductor crystal having a plurality of projection shapes and a second step of growing the III-V group compound semiconductor crystal laterally by using the III-V group compound semiconductor crystal at the opening as a seed crystal. According to the present invention, an epitaxial substrate having a III-V group compound semiconductor crystal having low dislocation density and little warp is obtained.

Abstract: Group III nitride layers which are grown with standard c-axis orientation have a maximum hole concentration by means of magnesium doping of around 5×1017 cm?3. This restriction of the doping results in a limitation of the possible component power. The object is to achieve a higher hole concentration and thus conductivity of the p-doped layer. This is made possible by the growth of higher index facets, which proceeds by roughening of the c-planar surface, structuring and subsequent preferentially lateral overgrowth with magnesium-doped group III nitride layers.