Abstract: Method of high-yield manufacturing superior semiconductor devices includes: a step of preparing a GaN substrate having a ratio St/S—of collective area (St cm2) of inversion domains in, to total area (S cm2) of the principal face of, the GaN substrate—of no more than 0.5, with the density along the (0001) Ga face, being the substrate principal face, of inversion domains whose surface area where the polarity in the [0001] direction is inverted with respect to the principal domain (matrix) is 1 ?m2 or more being D cm?2; and a step of growing on the GaN substrate principal face an at least single-lamina semiconductor layer to form semiconductor devices in which the product Sc×D of the area Sc of the device principal faces, and the density D of the inversion domains is made less than 2.3.

Abstract: A semiconductor device includes: an AlN layer provided on a substrate; a Si-doped GaN layer provided on the AlN layer; an undoped GaN layer provided on the Si-doped GaN layer; and an operation layer provided on the undoped GaN layer.

Abstract: The nitride semiconductor material according to the present invention includes a group III nitride semiconductor and a group IV nitride formed on the group III nitride semiconductor, where an interface between the group III nitride semiconductor and the group IV nitride has a regular atomic arrangement. Moreover, an arrangement of nitrogen atoms of the group IV nitride in the interface and an arrangement of group III atoms of the group III nitride semiconductor in the interface may be substantially identical.

Abstract: Methods and systems are provided of fabricating a compound nitride semiconductor structure. A substrate is disposed within a processing chamber into which a group-III precursor and a nitrogen precursor are flowed. A layer is deposited over the substrate with a thermal chemical-vapor-deposition process using the precursors. The substrate is transferred to a transfer chamber where a temperature and a curvature of the layer are measured. The substrate is then transferred to a second processing chamber where a second layer is deposited.

Abstract: A method of manufacturing a III group nitride semiconductor thin film and a method of manufacturing a nitride semiconductor light emitting device employing the III group nitride semiconductor thin film manufacturing method, the III group nitride semiconductor thin film manufacturing method including: growing a first nitride single crystal on a substrate for growing a nitride; applying an etching gas to a top surface of the first nitride single crystal to selectively form a plurality of pits in a high dislocation density area; and growing a second nitride single crystal on the first nitride single crystal to maintain the pits to be void.

Abstract: A crystal producing apparatus includes a crystal forming unit and a crystal growing unit. The crystal forming unit forms a first gallium nitride (GaN) crystal by supplying nitride gas into melt mixture containing metal sodium (Na) and metal gallium (Ga). The first GaN crystal is sliced and polished to form GaN wafers. The crystal growing unit grows a second GaN crystal on a substrate formed by using a GaN wafer, by the hydride vapor phase epitaxy method, thus producing a bulked GaN crystal.

Abstract: The method of manufacturing the semiconductor device comprises the step of forming quantum dots 16 on a base layer 10 by self-assembled growth; the step of irradiating Sb or GaSb to the surface of the base layer 10 before or in the step of forming quantum dots 16; the step of etching the surfaces of the quantum dots 16 with an As raw material gas to thereby remove an InSb layer 18 containing Sb deposited on the surfaces of the quantum dots 16; and growing a capping layer 22 on the quantum dots 16 with the InSb layer 18 removed.

Abstract: A method for removing a mask in a selective area epitaxy process is provided. The method includes forming a first layer on a substrate and oxidizing the first layer. A patterned photoresist can be formed on the oxidized first layer. A portion of the oxidized first layer can then be removed using a wet chemical etch to form a mask. After removing the patterned photoresist a second layer can be epitaxially grown in a metal organic chemical vapor deposition (MOCVD) chamber or a chemical beam epitaxy (CBE) chamber on a portion of the first layer exposed by the mask. The mask can then be removed the mask in the MOCVD/MBE chamber. The disclosed in-situ mask removal method minimizes both the atmospheric exposure of a growth surface and the number of sample transfers.

Abstract: An efficient method of fabricating a high-quality heteroepitaxial microstructure having a smooth surface. The method includes detaching a layer from a base structure to provide a carrier substrate having a detached surface, and then forming a heteroepitaxial microstructure on the detached surface of the carrier substrate by depositing an epitaxial layer on the detached surface of a carrier substrate. Also included is a heteroepitaxial microstructure fabricated from such method.

Abstract: A single step process for nucleation and subsequent epitaxial growth on a lattice mismatched substrate is achieved by pre-treating the substrate surface with at least one group III reactant or at least one group II reactant prior to the introduction of a group V reactant or a group VI reactant. The group III reactant or the group II reactant is introduced into a growth chamber at an elevated growth temperature to wet a substrate surface prior to any actual crystal growth. Once the pre-treatment of the surface is complete, a group V reactant or a group VI reactant is introduced to the growth chamber to commence the deposition of a nucleation layer. A buffer layer is then grown on the nucleation layer providing a surface upon which the epitaxial layer is grown preferably without changing the temperature within the chamber.

Abstract: There is provided a method of producing multiple semiconductor components on a substrate, said method comprising the steps of: forming a predetermined relief pattern on a surface of said substrate; and epitaxially depositing a layer formed of a mixture of two or more Group III elements and two or more Group V elements on said surface; wherein said relief pattern results in said layer deposited in a single step forming with a different ratio between said Group V elements within areas having different relief pattern characteristics so as to provide different band gaps within said different areas.

Abstract: A method of fabricating a compound semiconductor layer has steps of forming a first layer made of an oxidizable material on a substrate, forming a second layer made of a compound semiconductor on the first layer, oxidizing the first layer made of the oxidizable material to an oxide layer and forming a third layer made of compound semiconductor that constitutes a semiconductor element on the second layer.

Abstract: Lateral epitaxial overgrowth of non-polar (11{overscore (2)}0) a-plane GaN seed layers reduces threading dislocations in the GaN films. First, a thin patterned dielectric mask is applied to the seed layer. Second, a selective epitaxial regrowth is performed to achieve a lateral overgrowth based on the patterned mask. Upon regrowth, the GaN films initially grow vertically through openings in the dielectric mask before laterally overgrowing the mask in directions perpendicular to the vertical growth direction. Threading dislocations are reduced in the overgrown regions by (1) the mask blocking the propagation of dislocations vertically into the growing film and (2) the bending of dislocations through the transition from vertical to lateral growth.

Abstract: In an optical semiconductor integrated circuit device in which a vertical pnp transistor and a photodiode are formed, the preferred embodiments of the present invention eliminates difficulty in performance improvement of the two elements. In an illustrative optical semiconductor integrated circuit device, a vertical pnp transistor and a photodiode have been formed, and first and second epitaxial layers and are stacked without doping. This enables a depletion layer forming region to be remarkably increased in the photodiode, and high-speed response becomes possible. Additionally, in the vertical pnp transistor, an n+ type diffusion region surrounds the transistor forming region. This can remarkably improve voltage endurance of the vertical pnp transistor 21.