Abstract: A filtering integrated circuit comprises: a storing circuit; a filter coefficient calculating unit configured to receive frequency information that identifies a characteristic frequency of an output signal in a filtering process, and to set filter coefficients calculated based on the frequency information in the storing circuit; and a filtering unit configured to output the output signal after applying a filtering process to an inputted signal based on the filter coefficients set in the storing circuit.

Abstract: An adaptive filter according to one embodiment includes an N×N two-dimensional convolution, where N is an odd integer greater than one. Pixels of an image are filtered by moving the N×N kernel across the image. At each pixel location, the kernel coefficients are determined by the image pixels within the N×N region, such that the kernel coefficients may change from one pixel location to the next. Such a filter may be implemented to use a lookup table to approximate a floating-point operation.

Abstract: A method and device operable per the method for high-pass filtering an input signal having a sequence of signal values to provide a high-pass filtered output signal having a sequence of filtered signal values. The method includes selecting a first signal value of the input signal and a second signal value preceding the first signal value and a third signal value following the first signal value, determining an interval defined by the second and third signal values, determining a mean value of the interval, and determining whether the first signal value lies within the interval.

Abstract: The invention has been described in the context of a system and method of removing artifacts from an audio signal during shutdown of the output. The system includes a means by which the average value may be found to be zero or sufficiently close to zero as determined by the resolution of the filter output and a means by which the filter average value being zero or close to zero is used to disconnect (or equivalently change impedance or power) of the device or devices rendering the PWM signal into the analog domain as may be implemented by a Class D bridge chip and disconnection means.

Abstract: The invention has been described in the context of a system and method of removing artifacts from an audio signal during shutdown of the output. The system includes a means by which the average value may be found to be zero or sufficiently close to zero as determined by the resolution of the filter output and a means by which the filter average value being zero or close to zero is used to disconnect (or equivalently change impedance or power) of the device or devices rendering the PWM signal into the analog domain as may be implemented by a Class D bridge chip and disconnection means. The invention further includes a means by which channels are in succession compared to prior channels and switched to share the fixed output signal and a means by which upon finding the last channel is at the zero average value in synchrony with the prior channel or channels the output of the entire group of channels may be simultaneously disconnected.

Abstract: A system is provided for use in an audio signal processor to reduce the order of the loop to remove sound artifacts from an audio signal that includes an input for receiving an audio input signal a control loop of order greater than one configured to process the audio input signal and to output a Pulse Width Modulated audio output signal, a circuit for performing a gradual reduction of the order of the control loop such that prior to entering a shut down state the order is reduced to a single order and a circuit to disconnect a Driver Circuit from the Pulse Width modulated signal operated by a timing device designed to switch at the moment of zero average output value.

Abstract: A method, computer program product and data processing apparatus for filtering data, in particular for use in deblocking filters. The method comprising applying a plurality of m filter coefficients which each have a value which is a negative power of two and which sum to one, to a plurality of m input data items to produce a filtered output data item, by performing a sequence of averaging calculations comprising averaging input data items to which a smallest filter coefficient is to be applied to produce first averaged data and averaging the first averaged data with other averaged input data or with input data items to which larger filter coefficients are to be applied the plurality of m filter coefficients being applied to the plurality of m input data items via a sequence of averaging calculations such that a data width of any calculated data does not exceed that of the input data being averaged.

Abstract: Included are embodiments for processing video data. At least one embodiment includes receive logic configured to receive the video data chosen from a plurality of formats and filter logic configured to filter the video data according to the instruction. Similarly, some embodiments include transform logic configured to transform the video data according to the instruction, where the instruction contains a mode indication in which the filter logic and the transform logic execute based on the format of the video data.

Abstract: In the digital filtering of an input signal (3), which has been produced by interpolation of a pilot signal (2), under certain circumstances numerous values originating from the past have to be stored. In order to reduce the storage space required for these and the associated power consumption, the values of the input signal (3), which are needed for computation of the values of an output signal (4), are compressed and stored in compressed form. More particularly here the values of the input signal (3) are divided into symbol periods, in which a coherent range of memory values, which are the only data-carrying values in the symbol period, occurs in each case. These values are stored together with the length of the symbol period, so that although each symbol period can be described completely, storage space is reduced.

Abstract: A method and apparatus for acquiring an analog signal. The method of the invention comprising the steps of acquiring a first portion of the analog signal by a first channel, the first portion of the analog signal spanning a first bandwidth range, and acquiring a second portion of the analog signal by a second channel, the second portion of the analog signal spanning a second bandwidth range adjacent the first bandwidth range. At least one spur in the signal acquired by the first channel corresponding to a portion of the analog signal that should have properly been acquired by the second channel is offset with an opposite spur in the second channel.

Abstract: Apparatus, methods and articles of manufacture are disclosed for modifying electromagnetic waves by reducing noise in those waves. A transfer function for a plurality of segments is derived through identifying a desired output parameter. That transfer function is then applied, via a plurality of filters or other devices, to a wave, in order to achieve said transfer function.

Abstract: A multiplexed FIR/IIR digital filter structure (300) which offers linear phase response and low group delay by switching on a FIR filter portion (31) or a IIR filter portion (32). To reduce the silicon area, the FIR/IIR filter (300) shares registers which is enabled because the FIR and IIR processing do not use the registers at the same time but rather consecutively. Further, the multiplexed FIR/IIR digital filter structure (300) can offer limit-cycle-free IIR operation using two's-complement truncation in combination with positive valued allpass coefficients.

Abstract: A signal processing method, receiver and equalizing method are provided. The receiver comprises an estimator estimating a channel coefficient matrix from a received signal, a first calculation unit determining a channel correlation matrix based on the channel coefficient matrix a converter converting the channel correlation matrix into a circulant matrix. A second calculation unit determines equalization filter coefficients by applying a first transform to the real parts of a first subset of the terms in the first column of the circulant matrix and by applying a second transform to the imaginary parts of a second subset of the terms in the first column of the circulant matrix. An equalizer equalizes the received signal by using the determined equalization filter coefficients.

Abstract: Disclosed is a method of providing signal processing operations, including convolution/filtering, where each parallel stream is processing signals at a lower rate than the signal data rate itself while still resulting in an overall signal processing rate suitable for high rate signal processing. This allows devices with a lower signal processing rate to be used in the parallel processing paths, avoiding many of the problems facing prior art high data rate signal processing. The invention converts a signal from the time domain to the frequency domain and takes advantage of associative and communicative properties of data processing to perform signal processing operations in parallel.

Abstract: A series of digit processing units (DPUs) are connected to form a finite impulse response (FIR) filter. Each DPU includes a register, a multiplexer, and a coefficient multiplier. The register stores and delays an input digital signal to be filtered. The multiplexer has inputs connected to the input node and to an output of the register, an output of the multiplexer for connecting to a next stage DPU. The coefficient multiplier is connected to the output of the register and multiplies the input signal by a coefficient or part of a coefficient. A group of DPUs can have multiplexers set so that the register of each DPU stores the same part of the input signal for processing a single filter coefficient. An adder is provided to sum output of the DPUs and output a filtered signal. The critical path of the FIR filter is independent of coefficient number and precision.

Abstract: A dual path equalization structure is used to equalize DMT systems operating over channels in which different impairments dominate the performance of different parts of the channel. Two TEQ/DFT structures are used to process the received signal, each optimized for a different part of the channel. The outputs of the two paths are combined with appropriate frequency-domain equalization to achieve an overall equalization architecture which is better optimized for the whole channel.

Abstract: An asynchronous sample rate converter interpolates and filters a digital audio input signal to produce a filtered, up-sampled first signal. A FIFO memory receives the first signal and stores samples thereof at locations determined by a write address and presents stored samples from locations determined by a read address. The presented samples are passed through an interpolation and resampling circuit to produce a continuous-time signal which is re-sampled to produce a signal that is up-sampled relative to a desired output. That signal then is filtered and down-sampled to produce the output signal. Sample rate estimating circuitry computes a difference signal representative of a time at which a data sample of the audio input signal is received and a time at which a corresponding audio output sample is required, and address generation circuitry generates the read and write addresses.

Abstract: One embodiment of the present invention provides a system that reconstructs a high-resolution signal from a set of low-resolution quantized samples. During operation, the system receives a time series containing low-resolution quantized signal values which are sampled from the high-resolution signal. Next, the system performs a spectral analysis on the time series to obtain a frequency series for the low-resolution quantized signal values. The system next selects a subset of frequency terms from the frequency series which have the largest amplitudes. The system then reconstructs the high-resolution signal by performing an inverse spectral analysis on the subset of the frequency terms.

Abstract: The present invention is applicable to a wavelet transform in JPEG 2000 and makes it possible to implement a convolution operation while reversibility is achieved. To this end, an implementation of a two-stage integer-type lifting operation shown in FIG. 28A is decomposed in the order of FIGS. 28B and 28C, and finally is separated into a real-number processing unit and integerizing processing unit as shown in FIG. 28C.

Abstract: Subtraction of a signal 111 from a pulse response 110, where signal 111 provides a good approximation of the tail of pulse response 110, can provide a method for canceling the tail of pulse response 110. For continuous data streams, signals X(t), 223 and Y(t) can correspond to, respectively, signals 110, 111 and 112. X(t) differs from 110 in being a continuous data stream. 223 differs from 111 in being the low pass filtering of X(t), such low pass filtering accomplished by a unit LPF 211. Y(t) differs from 112 in being a continuous stream of equalized data, produced by subtracting the signal at 223 from X(t). A measurement unit 213, analysis unit 214 and decision unit 215 can act to continuously adapt LPF 211 such that tail cancellation equalization is continuously achieved. Measurement unit 213 can construct, from Y(t), a set of correlation measurements that can be used to adapt LPF 211.

Abstract: A method and apparatus for generating a reflection filter. The method comprises the steps of determining an averaged step response of an acquired signal and generating a spectrum response from the averaged step response. A time at which a reflection in the averaged step response begins is determined and information in the averaged step response after the determined time when the reflection begins is replaced with an ideal flat line response to generate a required step response. A spectrum response is generated from the required step response and each frequency point of the spectrum response corresponding to the required step response is divided by each frequency point of the spectrum response corresponding to the averaged step response to generate a spectrum of the reflection filter. The result of the dividing step is processed to generate a reflection filter impulse response.

Abstract: This invention describes an apparatus and method to improve the performance of a decision feedback equalizer (DFE) for time-varying multi-path channels. For minimum-phase channels, the equalization is performed in a time-forward manner. For maximum-phase channels, the equalization is performed in a time-reversed manner. More specifically, for maximum-phase channels, the filter coefficients are computed based on the channel estimates reversed in time, and the filtering and equalization operations are performed with the received block of symbols in a time-reversed order. In the context of this invention, the term “minimum-phase channel” implies that the energy of the leading part of the channel profile is greater than the energy of the trailing part. The term “maximum-phase channel” implies that the energy of the leading part of the channel profile is less than the energy of the trailing part.

Abstract: The present invention relates generally to the problem of filtering, decimation or interpolation and frequency conversion in the digital domain, and more particularly to its use in wideband multichannel receiver, channelization, and transmitter, de-channelization, structures. The invention combines a stand-alone fast convolution algorithm which is further modified and then combined with additional signal processing. By intelligently splitting the filtering effort between the modified fast convolution algorithm block and an additional signal processing block a synergy is created between the two blocks which provides for decreased costs, reduced delay and a reduction in the size of the Fast Fourier Transforms (FFTs). The resulting advantages are especially useful in any system handling multiple channels simultaneously, but especially where there exist strict requirements on both delay and on input Fast Fourier Transform (FFT) size.

Abstract: A digital Intermediate Frequency (IF) processing block including a decimation filter having Finite Impulse Response (FIR) decimation stages provides improved performance over a Hogenauer decimating filter. The filter comprises multiple integrator stages followed by multiple FIR decimating stages. The zeros of the filter are tunable by adjusting the integer coefficients of the FIR stages providing tunability of the cut-off response, as opposed to the fixed sinc response of the Hogenauer filter. As a result, the number of required stages for a particular steepness is reduced, dramatically reducing the amount of digital circuitry required to implement a particular filter design. The improved filter is especially suitable for use in digital IF stages in receivers, and for code-based applications where selectable decimation rate is desired and a fast multiply is not available.

Abstract: A Kalman filtering technique employing an adaptive measurement variance estimator is disclosed. The Kalman filtering technique includes a signal filtering mechanism, the signal filtering mechanism futher includes a Kalman filter and a variance estimator. The variance estimation used in the filtering includes estimating the variance of the measured quantity signal and generating the variance estimate signal for use in filtering the input signal and the measured quantity signal, wherein estimating the variance of the measured quantity signal includes determining a smoothed estimate of the measured quantity's variance from the measured quantity signal. The invention also manifests itself as a method for filtering and estimating, a program storage medium encoded with instructions that, when executed by a computer, performs such a method, an electronic computing device programmed to perform such a method, and a transmission medium over which the method is performed.

Abstract: The present invention provides a dual stage digital filter and a method for filtering digital data signals. The dual stage digital filter includes a pre-filter, a main filter, and an output register. The pre-filter receives a set of first data bits as inputs and is arranged to filter single noise bits from the set of input data bits to output a set of second data bits. The main filter is coupled to receive the set of second data bits as inputs and is arranged to filter burst noise bits from the set of second data bits to output a set of third data bits. The output register is coupled to receive and store the set of third data bits for output.

Abstract: A circuit and method for receiving digital signals are disclosed. The circuit includes an input connected to a communications channel over which a digital signal is communicated and operates a plurality of multiple decision circuits at a frequency that is a fraction of the bit rate of the digital signal. A feedback and/or equalizer circuit receives the output of the decision circuits and applies a feedback signal to the input of the decision circuits that is representative of a combination of output signals of the decision circuits. The result is seen to improve the noise margin for correctly interpreting signals communicated over a communications channel having a low-pass characteristic.

Abstract: A method for processing a received signal at a mobile receiver of a wireless communications system is disclosed. The method comprises demodulating the received signal to obtain an analog base band signal and converting the analog base band signal into a digital base band signal. The signal strength of the digital base band signal is estimated and, using the estimation, the digital base band signal is scaled by a scaling factor. The digital base band signal is equalized into an equalized digital signal which is then rescaled by a resealing factor.

Abstract: A system (10) for providing an integer number N of filters. The system comprises an input (Di) for receiving a digital audio signal and an output (Do) for providing a filtered audio signal. The system also comprises circuitry (16) for storing at least a first set of fixed filter coefficients and circuitry for storing estimation data. The system also comprises circuitry (14) for estimating a number of sets of estimated filter coefficients in response to the estimation data and the fixed filter coefficients. The system also comprises circuitry (14) for applying a transfer function to the digital audio signal and in response for providing the filtered audio signal. The circuitry for applying the transfer function applies a set of filter coefficients selected from the first set of fixed filter coefficients and the sets of estimated filter coefficients. Also, the transfer function is selected from a transfer function set consisting of a high pass filter transfer function and a low pass filter transfer function.

Abstract: The device (10) for digital demodulation comprises a polyphase filter (14) comprising a set of N distinct elementary digital filters and means (16) of selection, for each block of an elementary digital filter (Hi). It comprises a decimating stage (18) for selecting samples in each block on completion of the digital filtering and means (20) for determining samples to be selected comprising means (28) for computing an error signal for each filtered block and means (31) for evaluating the error signal suitable for determining the samples to be selected in the relevant block. That the means (16) of selection of an elementary digital filter (Hi) comprise means (28) for calculating an error signal. The means (28) for calculating an error signal are common to the means (16) of selection of the elementary digital filter (Hi) to be implemented and to the means (20) for determining samples to be selected. Application to a mobile telephone or base station.

Abstract: A method in a signal processor for filtering samples in a digital signal is provided. An approximate filtered sample is generated as a function of less than four samples of the digital signal. A correction is generated as a function of the less than four samples, and a filtered sample is generated by modifying the approximate filtered sample with the correction.

Abstract: The device (10) for digital demodulation comprises a polyphase filter (14) comprising a set of N distinct elementary digital filters (Hi) and means (16) of selection, for each block of an elementary digital filter (Hi). These latter comprise means (28) for computing an error signal, means (30) for comparing performance indicators for the digital filters arising from the error signals and means (30) for determining the elementary digital filter (Hi) to be implemented in respect of the following block as a function of the result of the comparison. The digital filters (Hi) are ordered. They are chosen according to the order of the filters, as a function of the result of the comparison performed on the performance indicators for the elementary digital filters (Hi) implemented in respect of at least one previous block. Application to a mobile telephone or base station.

Abstract: An in-phase and guadrature (IQ) imbalance error-correction method includes estimating, on the basis of a constellation error in a received orthogonal frequency division multiplexing (OFDM) signal, an extent of an I/Q imbalance error, caused by direct IQ conversion of the received OFDM signal. On the basis of that extent, an equalizing transformation that reduces that error is estimated.

Abstract: The invention relates to a method of suppressing pulsed signals in particular of DME or TACAN type present in the radio signals received (Ue) by a radio-frequency receiver, characterized in that the reception frequency band of the receiver is divided into frequency sub-bands corresponding to the transmission channels of the pulsed signals, in that the presence of the pulsed signals and the transmission channel of said pulsed signals in the frequency sub-bands are detected, and in that the frequency sub-band comprising the detected pulsed signals is filtered over the duration of the pulsed signal so as to eliminate said pulsed signals pulse type.

Abstract: In a signal processing integrated circuit having an analog to digital converter and a digital filter having a plurality of taps separated in time, when starting a conversion after a reset or a change of input channel, the filter will have an incomplete set of input data as the delayed inputs to an output calculation are all zero from the reset operation. After reset, during the time that data are filling up the filter pipeline, the calculation of an output value will give a result that holds information about the input, but does not present the data with the same scaling and frequency content as the fully settled filter. The integrated circuit selectively provides two modes, on that provides only fully settled data from the filter or and another that provides all data from the filter, including unsettled data. Knowledge about the filter coefficients can be utilized by a user or user process to extract information about the input from the unsettled data.

Abstract: A system for generating a target pixel in a target grid from a plurality of source pixels in a source grid, said system comprising, a filter controller for determining a first distance between said target pixel and a source pixel to the left of said target pixel, and a second distance between said target pixel and a source pixel to the right of said target pixel; a left portion lookup circuit for determining filter coefficients for a left portion of said target pixel in accordance with said first difference; a right portion lookup circuit for determining filter coefficients for a right portion of said target pixel in accordance with said second difference; and a filter reconstruction unit for creating a filter in accordance with said left and right portion filter coefficients, said created filter for generating said target pixel from said plurality of source pixels.

Abstract: The invention provides a method and system for forming an output impulse response function. The method includes the steps of creating an initial impulse response, and dividing the impulse response into a head portion and a tail portion. The tail portion is high pass filtered, and low frequency components of the head portion are boosted. The low frequency boosted and high pass filtered respective head and tail portions are then combined into a modified output impulse response, which can then be used to spatialize an audio signal by convolving it.

Abstract: An apparatus and method for filtering data that include retrieving a plurality of data samples from memory; computing a locus of the samples; computing a distance between an input value and the locus; comparing the distance between the input value and the locus with a first threshold value; applying a distance-based filter to the samples; and comparing an output value of the median filter with a second threshold value.

Abstract: A digital parallelized Infinite Impulse Response (IIR) integrator filter comprising a first channel having a first input and second channel having a second input, a first adder to add the two channel inputs, an integrator to integrate the added channel inputs to provide a first channel output is described herein. The second input channel is adjacent in time to the first channel input. The second channel further comprises a second adder which adds the first output with the second channel input in order to produce a second output, adjacent in time with the first output. This configuration can be generalized to n inputs and m outputs.

Abstract: An apparatus and method for implementing an equalizer which (1) combines the benefits of a decision feedback equalizer (DFE) with a maximum-a-posterori (MAP) equalizer (or a maximum likelihood sequence estimator, MLSE) (2) performs equalization in a time-forward or time-reversed manner based on the channel being minimum-phase or maximum-phase to provide an equalization device with significantly lower complexity than a full-state MAP device, but which still provides improved performance over a conventional DFE. The equalizer architecture includes two DFE-like structures, followed by a MAP equalizer. The first DFE forms tentative symbol decisions. The second DFE is used thereafter to truncate the channel response to a desired memory of L1 symbols, which is less than the total delay spread of L symbols of the channel. The MAP equalizer operates over a channel with memory of L1 symbols (where L1<=L), and therefore the overall complexity of the equalizer is significantly reduced.

Abstract: The invention includes a method of determining a control input. Such a control input may be used to dictate an input to a system, in order to bring the system from one state to another. In a method according to the invention, a set of values may be determined. The values in the set may be a solution to each of (a) a jerk parameter equation, (b) a first constraint equation and (c) a second constraint equation. The set of values may be used to determine a corresponding transfer function. The transfer function may be coupled with a filter to provide an augmented transfer function. The augmented transfer function may then be used to act upon an input signal in order to produce a control input.

Abstract: Method and arrangement for converting the sample rate of a higher sample rate discrete time signal to a lower sample rate discrete time signal or vice versa. A recursive signal processing algorithm with low pass filtering function is used, which entirely takes place at the lower sample rate.

Abstract: N-sample level-crossing estimator methods and devices are provided that extract more information from given time samples than the current two-sample approach and that are more resistant to interference from noises. The two-mean level-crossing time-interval estimation method extracts more information from given time samples than existing methods, advantageously estimates a level-crossing time interval with a limited number of time samples and is quieter than current noisy estimation techniques. The two-mean level crossing time-interval estimation method for N-sample estimation uses all N time samples by calculating the mean value of the first N/2 time samples and subtracting it by the second N/2 time sample to average out the noises in time samples.

Abstract: The present invention relates to a method for weighing items and in particular to a method of filtering signals representing the weight of an item. The invention is applicable in all measuring instruments which indicate an average value calculated from a signal which also has unwanted components of one or more unknown frequencies. This is, for example, the case in volumeters, ampere meters and weighing-scales. Normally, the indicated result is the average value of the signal measured for a much longer time than the expected period of the slowest frequency component. This method is well known and reliable, but has the drawback of being very slow in situations where measuring speed is of importance.

Abstract: A non-uniform filter bank is created by joining sections of oversampled uniform filter bands that are based on complex exponential modulation (as opposed to cosine modulation). Each filter bank handles a given, non-overlapping frequency band. The bands are not of uniform bandwidth, and the filters of different banks have different bandwidths. The frequency bands of the different filter banks cover the frequency of interest with gaps in the neighborhoods of the filter band edges. A set of transition filters fills those gaps.

Abstract: The present invention relates to a digital filter suitable for receiving a digital input signal (INPUT(G)) comprising a voltage peak also known as glitch (G). It is characterized in that it comprises: a delay line (T) adapted to produce a delayed digital input signal (INPUT(G)+?t), rising edge (PD) and falling edge (ND) detectors adapted to produce rising (P) and falling (N) edge indicator signals respectively from the delayed digital input signal (INPUT(G)+?t), first (M1) and second (M2) mixing means adapted to produce rising (P?) and falling (N?) edge filter indicator signals respectively from said digital input signal (INPUT(G)) and said rising (P) and falling (N) edge indicator signals respectively, third mixing means (M3) adapted to produce a digital output signal (OUTPUT) without a glitch from the rising edge filter indicator signal (P?) and from the falling edge filter indicator signal (N?).

Abstract: Methods and apparatus of signal processing are described. In a method according to one embodiment, a high-frequency region of a digital signal is detected. In response to the detecting, the high-frequency content of the digitized signal is increased in at least a portion of that region.

Abstract: A Q-Filter is a reconfigurable technique that performs a continuum of linear and nonlinear filtering operations. It is modeled by unique mathematical structure, utilizing a function called the Q-Measure, defined using a set of adjustable kernel parameters to enable efficient hardware and software implementations of a variety of useful, new and conventional, filtering operations. The Q-Measure is is based on an extension of the well-known Sugeno ?-Measure.

Abstract: A circular filtering system that prevents the problem of inter-symbol interference. The circular filtering system utilizes a buffer memory to store samples of a given symbol and provide only these samples to a linear filter such that the output of the filter, for any given symbol is formed by filtering only samples of that input symbol. Each symbol being filtered independent of other symbols hence eliminating inter-symbol interference caused by filtering. Where symbols are tolerant to a fixed phase shift for each symbol, the circular filtering system can be simplified by reducing the size of the buffer and introducing a multiplexer.

Abstract: A digital signal processing system capable of compensating for frequency response variations and generating a response characteristic that complies with a provided specification. The system automatically generates digital filters to provide this compensation with almost any form of channel frequency response information and with user defined specifications. The capability of this system to trade-off noise performance, pulse response, and frequency response flatness in order to provide an optimized response is demonstrated. The system also provides feedback to the user on the final response characteristics.