Abstract: The physical server includes a hypervisor for managing an association between the virtual server and the I/O device allocated to the virtual server. The I/O switch includes: a setting register for retaining a request to inhibit a transaction from being issued from the I/O device to the virtual server; a Tx inhibition control module for performing an inhibition of the transaction from the I/O device to the virtual server, and guaranteeing a completion of a transaction from the I/O device issued before the inhibition; a virtualization assist module for converting an address of the virtual server into an address within a memory of the physical server; and a switch management module for managing a configuration of the I/O switch.

Abstract: Peripherals and data processing systems are disclosed which can be configured to interact based upon sensor data. In one embodiment, a peripheral, which is configured to be used with a data processing system, includes an interface to couple the peripheral to the data processing system, and at least one sensor, such as a proximity sensor, to sense a user of the peripheral, and a processor coupled to the interface and to the at least one sensor, wherein the processor configures the peripheral in response to data from the at least one sensor. The peripheral may communicate sensor data from its sensors to the data processing system, which may be a wireless PDA, and the data processing system analyzes the sensor data from its sensors and from the peripheral's sensors to decide how to configure the peripheral and/or the data processing system based on the sensor.

Abstract: A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.

Abstract: A redundancy manager manages commands to peripheral devices in a computer system. These peripheral devices have multiple pathways connecting it to the computer system. The redundancy manager determines the number of independent pathways connected to the peripheral device, presents only one logical device to the operating system and any device driver and any other command or device processing logic in the command path before the redundancy manager. For each incoming command, the redundancy manager determines which pathways are properly functioning and selects the best pathway for the command based at least partly upon a penalty model where a path may be temporarily penalized by not including the pathway in the path selection process for a predetermined time. The redundancy manager further reroutes the command to an alternate path and resets the device for an alternate path that is not penalized or has otherwise failed.

Abstract: A load balancing system is described herein that proactively balances client requests among multiple destination servers using information about anticipated loads or events on each destination server to inform the load balancing decision. The system detects one or more upcoming events that will affect the performance and/or capacity for handling requests of a destination server. Upon detecting the event, the system informs the load balancer to drain connections around the time of the event. Next, the event occurs on the destination server, and the system detects when the event is complete. In response, the system informs the load balancer to restore connections to the destination server. In this way, the system is able to redirect clients to other available destination servers before the tasks occur. Thus, the load balancing system provides more efficient routing of client requests and improves responsiveness.

Abstract: A data backup system is provided that when coupled to a data source, such as a personal computer, and a media player, such an Apple Computer IPod media player, the data backup system blocks certain communications between the data source and the media player thus preventing the data source from recognizing the media player as such thereby avoiding the launching of synchronization software for the media player, the data backup system also causing the automatic launching of a backup application stored on the data backup system so that data files can be located on the data source and then backed up to the media player.

Abstract: A method for arbitrating between a host device and a cellular base band mode for use of a shared SD storage, including requesting, by a cellular base band modem from a host device, access to an SD storage, including writing an access request message, notifying the host device of the access request message, reading, by the host device, the access request message, granting, by the host device, the access request, including writing an access grant message, notifying the cellular base band modem of the access grant message, reading, by the cellular base band mode, the access grant message, holding an SD host bus in a busy state, thereby forcing the host device to hold and not access the bus, accessing, by the cellular base band modem, the SD storage, and upon completion of the accessing, removing the busy state from the SD host bus.

Abstract: A method, apparatus, and system to synchronize multiple host controllers with non-uniform frame rates. The apparatus includes a first host controller, a second host controller, and logic. The first host controller is configured to access memory at a first frame rate. The second host controller is configured to access the memory at a second frame rate which is different from the first frame rate. The logic is coupled to the first and second host controllers to synchronize the memory accesses of the first and second host controllers at a common frame rate. Other embodiments are described.

Abstract: A connection device restriction program for preventing use of uncalled-for connection devices. A permission list setting unit sets a connection permission list holding information defining connection devices whose connection is to be permitted, and a list memory stores the connection permission list. When a connection device is connected to one of first to third connection ports, a connection restriction unit acquires device information from the connection device, and collates the device information with the connection permission list to determine whether or not the connection device corresponds to any one of the connection-permitted devices. If the connection device corresponds to any one of the connection-permitted devices, connection of the device is permitted; if not, connection of the device is forbidden.

Abstract: A Direct Memory Access (DMA) device includes a first buffer which holds a first transfer information required for a first transfer request, and a second buffer which holds a second transfer information required for a second transfer request, and a transfer request comparison circuit which determines whether or not a current transfer request, which is newly inputted, matches with the first transfer request or the second transfer request.

Abstract: An apparatus and a method for processing high speed data using hybrid Direct Memory Access (DMA) are provided. The method includes determining a size of data to be transmitted, determining a memory access method of the data by comparing the determined size of the data with a first threshold, and determining an I/O bus access method of the data by comparing the determined size of the data with a second threshold.

Abstract: A memory controller including an address incrementer and a page crossing detect logic. The address incrementer may be configured to generate a next address in a burst from a current address in the burst. The page crossing detect logic may be configured to determine whether the burst will cross a memory page boundary based on the current address and the next address. The memory controller may be configured to automatically split bursts crossing page boundaries.

Abstract: An apparatus, system, and method are disclosed for coordinating storage requests in a multi-processor/multi-thread environment. An append/invalidate module generates a first append data storage command from a first storage request and a second append data storage command from a second storage request. The storage requests overwrite existing data with first and second data including where the first and second data have at least a portion of overlapping data. The second storage request is received after the first storage request. The append/invalidate module updates an index by marking data being overwritten as invalid. A restructure module updates the index based on the first data and updates the index based on the second data. The updated index is organized to indicate that the second data is more current than the first data regardless of processing order. The modules prevent access to the index until the modules have completed updating the index.

Abstract: Disclosed is an information processing apparatus. The information processing apparatus includes a first hard disk drive, a conversion circuit and a signal control circuit. The conversion circuit is connected with the first hard disk drive to determine whether a second hard disk drive corresponding to a slave exists when the first hard disk drive serves as a master, and the determine whether a first control signal has a first logic level in a first predetermined time.

Abstract: A technique for user notification involves modifying a title associated with a process to include information about an event that calls for user notification. A method according to the technique may include running a process, processing an event, generating a string of characters that includes information associated with the event, and displaying the string of characters as a title associated with the process. A system constructed according to the technique may include a client, a title array, an event processing engine, and a title provisioning engine.

Abstract: In one embodiment of the invention, a memory integrated circuit is provided including an address decoder to selectively access memory cells within a memory array; a mode register with bit storage circuits to store an enable bit and at least one sub-channel select bit; and control logic. The control logic is coupled to a plurality of address signal lines, the address decoder, and the mode register. In response to the enable bit and the at least one sub-channel select bit, the control logic selects one or more of the address signal lines to capture independent address information to support independent sub-channel memory accesses into the memory array. The control logic couples the independent address information into the address decoder.

Abstract: A method, computer program product, and distributed data processing system that enables host software or firmware to allocate virtual resources to one or more system images from a single physical I/O adapter, such as a PCI, PCI-X, or PCI-E adapter, is provided. Adapter resource groups are assigned to respective system images. An adapter resource group is exclusively available to the system image to which the adapter resource group assignment was made. Assignment of adapter resource groups may be made per a relative resource assignment or an absolute resource assignment. In another embodiment, adapter resource groups are assigned to system images on a first come, first served basis.

Abstract: A memory module having reduced access granularity. The memory module includes a substrate having signal lines thereon that form a control path and first and second data paths, and further includes first and second memory devices coupled in common to the control path and coupled respectively to the first and second data paths. The first and second memory devices include control circuitry to receive respective first and second memory access commands via the control path and to effect concurrent data transfer on the first and second data paths in response to the first and second memory access commands.

Abstract: A system for communicating command parameters between a processor and a memory flow controller is provided. The system makes use of a channel interface as the primary mechanism for communicating between the processor and a memory flow controller. The channel interface provides channels for communicating with processor facilities, memory flow control facilities, machine state registers, and external processor interrupt facilities, for example. These channels may be designated as blocking or non-blocking. With blocking channels, when no data is available to be read from the corresponding registers, or there is no space available to write to the corresponding registers, the processor is placed in a low power “stall” state. The processor is automatically awakened, via communication across the blocking channel, when data becomes available or space is freed. Thus, the channels of the present invention permit the processor to stay in a low power state.

Abstract: A method of enabling access to resources includes detecting an input to access a resource of a multi-mode processing module coupled to a host processor and a control module. The method can further include detecting an operating mode of the host processor and the control module and an availability of independent peripheral resources of the multi-mode processing module. Additionally, the method can enable the multi-mode processing module in response to the detecting the operating mode and the availability of the independent peripheral resources.

Abstract: The invention relates to a method and a device for controlling access to multiple applications which are each implemented as a client application in an operating system environment of a data processing device from a shared memory system. The problem addressed by the invention is that of providing an improved method and an improved device for controlling access to multiple applications which are each implemented as a client application in an operating system environment of a data processing device from a shared memory system, which allow an efficient exchange of data for input/output. In particular, interaction with multimedia data in such an operating environment should be optimized.

Abstract: A mobile communication terminal system includes a serial interface port, a multimedia output/input module, a multimedia processor, a frequency-signal output/input module, and a baseband processor. The serial interface port is coupled to a computer system via a serial interface. The multimedia output/input module provides a first input signal. The multimedia processor processes the first input signal to generate a first serial interface signal. The frequency-signal output/input module provides a second input signal. The baseband processor processes the second input signal to generate a second serial interface signal to the multimedia processor.

Abstract: A network interface adapter includes a network interface and a client interface, for coupling to a client device so as to receive from the client device work requests to send messages over the network using a plurality of transport service instances. Message processing circuitry, coupled between the network interface and the client interface, includes an execution unit, which generates the messages in response to the work requests and passes the messages to the network interface to be sent over the network. A memory stores records of the messages that have been generated by the execution unit in respective lists according to the transport service instances with which the messages are associated. A completion unit receives the records from the memory and, responsive thereto, reports to the client device upon completion of the messages.

Abstract: A disk drive is disclosed having a disk, a head actuated over the disk, a buffer memory for storing control routine op codes and control routine data, and a microprocessor for receiving the control routine op codes and control routine data. Control circuitry within the disk drive services an access request generated by the microprocessor by accessing the buffer memory, and monitors at least one interrupt. If the interrupt occurs while servicing the access request, the control circuitry enables the microprocessor to execute an interrupt service routine corresponding to the interrupt. Enabling the microprocessor to execute the interrupt service routine rather than wait for the access request reduces the latency in servicing the interrupt.

Abstract: In a system in which an information processing apparatus and a peripheral are connected to each other. Initially, the information processing apparatus transmits, to the peripheral, a request to use a service provided by the peripheral. The peripheral determines whether to grant use permission to the received request, and notifies the information processing apparatus which has transmitted the request of the determination result. The peripheral stores information associated with the information processing apparatus to which use permission is granted in response to the request. The information processing apparatus then receives, from the peripheral, a response to the request.

Abstract: A security program has an ActiveX format for web browsers and application programs, and comprises a software security input window for preventing leakage of keyboard data without an additional hardware device but rather by using a conventional keyboard. Therefore, the present invention protects keyboard data on the web browsers or application programs.

Abstract: In audio/video (AV) capture, two video streaming adapters (VSAs) receive an original input video signal and a compressed input video signal respectively to generate an uncompressed video streaming and a compressed video streaming respectively. The uncompressed video streaming and the compressed video streaming are transmitted to an external device by way of time division duplex. An interlock mechanism prevents concurrent transmission of the uncompressed video streaming and the compressed video streaming, so that the loss of real-time video streaming is reduced.

Abstract: A computer-implemented method, system and computer program product for managing USB ports on blades in a blade center are presented. A set of remotely-transmitted instructions causes a multiplexer to physically disconnect one or more selected USB ports on a blade. In one embodiment, the same one or more selected USB ports are also software-disabled by a USB software-based controller.

Abstract: A storage subsystem and a storage controller adapted to take advantage of high data transfer rates of fiber channels while offering enhanced reliability and availability and capable of connecting with a plurality of host computers having multiple different interfaces. A loop is provided to serve as a common loop channel having fiber channel interfaces. Host interface controllers (HIFC) connected to host computers having different interfaces permit conversion between the fiber channel interface and a different interface as needed. Control processors, shared by the host interface controllers, each reference FCAL (fiber channel arbitrated loop) management information to capture a frame having an address of the processor in question from among the frames passing through the loop. I/O processing is then carried out by the controller in accordance with a range of logical unit numbers (LUN) set in the captured frame.

Abstract: A plurality of system controllers 300 each comprising a memory medium 400 and an I/O device 500 under the control of the system controller 300 are connected to a CPU node 100 by way of a plurality of system buses 200. The CPU node 100 executes a memory interleave for distributing memory accesses to the system buses 200 (i.e., the system controllers 300). In performing an I/O access to the I/O device 500, the CPU node 100 firstly inquires from a representative system controller 300 (SC0) as to which system bus 200 (i.e., a system controller 300) has a target I/O device 500 and then executes an actual I/O access to the system bus 200 returned in a response from the SC0. Even when the CPU node 100 executes a memory interleave in the case of a memory-mapped I/O, the CPU node 100 is not required to manage the location information of the I/O device 500.

Abstract: A semiconductor device coupled to input/output pins includes a first core to operate a first function and a second core to operate a second function. A multiplexer is arranged to set the input/output pins to the first function or to the second function, and an arbiter is configured to receive requests from the cores to use the input/output pins and to grant use of the input/output pins to a selected core. A register is arranged to store a value indicative of a delay to be applied by the arbiter when granting use of the input/output pins to the second core.

Abstract: An architecture and associated methods and devices are described in which a first selectable data path may be associated with a first port operating at a first data rate, a second selectable data path may be associated with a second port operating at a second data rate, and a third selectable data path may be associated with a third port operating at a third data rate that is higher than the first data rate and the second data rate. A plurality of security engines may be included which may be configurable to provide cipher key-based security for data associated with the first port and the second port using the first selectable path and the second selectable path, respectively, and configurable to provide cipher key-based security of data associated with the third port using the third selectable data path.

Abstract: The present invention relates to a SPC comprising at least one data processing means for realizing a first data channel 1 and a second data channel 2, and comprising a data transmission means 3 which is connected to data channels 1,2 in a manner such that, using data transmission means 3, data may be transferred from at least one data channel 1, 2 to a higher-order device 5 that is connectable to the controller. The object of the present invention is to further increase the safety of safety controllers. This aim is achieved by providing an active data lock 4, using which it is possible to influence the data transmission—which may be realized using data transmission means 3—to higher-order device 5. As a result, only error-free data are sent via higher-order device 5 to external I/O assemblies.

Abstract: Arbitration of IO accesses and band control based on the priority of virtual servers is enabled while curbing performance overhead during IO sharing among the virtual servers. A virtual machine system includes a CPU, a memory, a hypervisor that generates plural virtual servers, and an IO controller that controls an IO interface. The IO controller includes: a DMA receiving unit that receives DMA requests from the IO interface; a decoder that decodes received DMA requests and locates the corresponding virtual servers; a DMA monitoring counter that monitors DMA processing status for each of the virtual servers; a threshold register set in advance for each of the virtual servers; and a priority deciding unit that compares the DMA monitoring counter and the value of the threshold register, and based on processing priority obtained as a result of the comparison, decides the priority of processing of the received DMA requests.

Abstract: There is provided a technique of accessing a memory of a processor from a peripheral device, thereby the security is ensured while efficiency is being pursued. An address converter 14 includes an address conversion table for converting an effective address into a physical address. The address conversion table stores the effective address to which an area in a memory of a processor unit 10 is allocated to each peripheral device 30 and identification information of an access source to which access permission is given, in association with each other. When the peripheral device 30 accesses, the address converter 14 determines to permit access to the effective address under the condition that the device identification information, included in an access request packet, by which the peripheral device 30 can be uniquely identified, matches the identification information of the access source corresponding to the effective address, in the address conversion table, designated by the access request packet.

Abstract: There is provided a method that includes (a) inputting data to a buffer, wherein the inputting increases a quantity of the data in the buffer, (b) processing the data from the buffer, wherein the processing decreases a quantity of the data in the buffer, (c) determining an average quantity of the data in the buffer, and (d) converting a data stream for inputting to the buffer, from a first quantity of samples to a second quantity of samples, if the average quantity is outside of a target range.

Abstract: Peripherals and data processing systems are disclosed which can be configured to interact based upon sensor data. In one embodiment, a peripheral, which is configured to be used with a data processing system, includes an interface to couple the peripheral to the data processing system, and at least one sensor, such as a proximity sensor, to sense a user of the peripheral, and a processor coupled to the interface and to the at least one sensor, wherein the processor configures the peripheral in response to data from the at least one sensor. The peripheral may communicate sensor data from its sensors to the data processing system, which may be a wireless PDA, and the data processing system analyzes the sensor data from its sensors and from the peripheral's sensors to decide how to configure the peripheral and/or the data processing system based on the sensor.

Abstract: A port optimization component and method for selecting a pair of ports, each port having predetermined operating parameters, for connecting to a storage device in a storage area network, the port optimization component comprising: a determination component for requesting configuration data and policy data pertaining to a storage device in response to a request to configure access to the storage device; and the determination component for comparing the configuration data to the policy data to determine a difference in operating parameters for each storage device port located on the storage device and in dependence on the detected difference, selecting a pair of ports having a preferred operating parameter.

Abstract: Apparatus, methods, and systems provide for remote management of a set of local computers by transferring screen frames produced by the local computer for viewing at a remote computer. A redirection module captures and transmits video signals from a local computer through over a network, such as the Internet, to a remote computer where the remote computer produces a display that contains the screen frames being transferred. The module is configured for use with and installation within a keyboard, video, and mouse switch configured for receiving the module. The redirection module is further configured for use with and installation on a server-blade to allow remote management of the server-blade.

Abstract: A vehicle computer system has an audio entertainment system implemented in a logic unit and audio digital signal processor (DSP) independent from the host CPU. The audio entertainment system employs a set of ping/pong buffers and direct memory access (DMA) circuits to transfer data between different audio devices. Audio data is exchanged using a mapping overlay technique, in which the DMA circuits for two audio devices read and write to the same memory buffer. The computer system provides an audio manager API (application program interface) to enable applications running on the computer to control the various audio sources without knowing the hardware and implementation details of the underlying sound system. Different audio devices and their drivers control different functionality of the audio system, such as equalization, volume controls and surround sound decoding. The audio manager API transfers calls made by the applications to the appropriate device driver(s).

Abstract: Techniques for managing a storage environment. According to an embodiment of the present invention, high-level application programming interfaces (APIs) are provided that can be used by applications such as storage management applications (e.g., ERM applications, SRM applications) to manage a storage environment. Using these APIs, an application can issue simple high-level commands to perform storage management operations without having to worry about the low level storage array-specific commands. Embodiments of the present invention handle the necessary translations between the high-level commands and the low-level storage array-specific commands or protocols.

Abstract: A data relay apparatus for communication module is disclosed, whereby a plurality of normally operative communication modules can perform data communication thereamong by allowing a data relay unit to relay data received by an input/output (I/O) port of an inoperative communication module in a case there is available an inoperative communication module among the plurality of communication modules, in a network configured by connecting the plurality of communication modules having two I/O Ethernet communication ports connected via a line topology.

Abstract: A method and system for enabling personal digital assistants (PDAs) and protecting stored private data. Specifically, one embodiment in accordance with the present invention includes a removable expansion card about the size of a postage stamp which plugs into a slot of a personal digital assistant. The removable expansion card, referred to as a personality card, is capable of storing all of a user's private information and data which is used within their personal digital assistant. By removing the personality card from the personal digital assistant, all of the user's private information and data may be removed from the personal digital assistant. Furthermore, the personal digital assistant may also be rendered totally or partially useless once the personality card is removed from it. There are several advantages associated with a personality card system in accordance with the present invention.

Abstract: Mechanisms for performing zoning of devices, such as Serial Attached SCSI (SAS) devices, for example, in a storage area network (SAN) in which all host systems of the SAN are automatically mapped to all of the storage systems are provided. Mechanisms for automatically mapping backend storage enclosures to appropriate storage system controllers on the SAN are provided. The zoning is automatically performed based on whether ports/phys are coupled to host systems, storage systems, and whether there are storage system controllers associated with the storage systems. Based on the automatic zoning, mapping of the storage devices of the storage systems to the host systems may be automatically performed via zone permission tables. By automating the zoning, users that do not necessarily have a detailed knowledge of the storage device communication protocol or SANs may configure the SAN even if it utilizes a complex and large architecture.

Abstract: A USB port transmitter includes a plurality of arbiters, each employing a distinct priority rule to select one USB transmission from among multiple scheduled USB transmissions based on their types. A selector selects one of the arbiters to select the one USB transmission from among the multiple scheduled USB transmissions. A programmable storage element controls the selector to select the one arbiter. In one embodiment, at least a first arbiter prioritizes header/data packets higher than link commands, and at least a second arbiter prioritizes link commands higher than header/data packets. In one embodiment, at least one arbiter prioritizes flow control and power management link commands higher than header/data packets. In one embodiment, at least a first of the arbiters prioritizes USB LGO_Ux link commands higher than USB LAU/LXU link commands, and at least a second arbiter prioritizes USB LAU/LXU link commands higher than USB LGO_Ux link commands.

Abstract: Disclosed are a method and system of tracking real time use of I/O control blocks on a processing unit basis, in a multiprocessing system, such that in the case of a processing unit failure, a list accurately and concisely identifies the control blocks that need to be recovered. This eliminates the need to scan all the I/O control blocks, greatly reducing the overall system recovery time and minimizing impact to the rest of the running system. The preferred embodiment of the invention uses a task control block structure to record which I/O control blocks are in use by each Processing Unit. Also, the lock word structure defined in the I/O control blocks is provided with an index back into the task control block to facilitate managing the task control block entries.

Abstract: A method of attempting a write to an entity to cause performance of an action is provided in which a first message is sent to the entity which causes performance of the action and adjustment of initial values in respective security fields of the entity to respective first adjusted values, and a second message is sent to the entity which causes adjustment of the initial values to respective second adjusted values. The security fields have write restrictions which prevent values in the security fields being adjusted, in accordance with the first message, if the initial values have been adjusted in accordance with the second message, and vice versa. The action is only performed when the initial values have been adjusted in accordance with the first message. The respective first adjusted values are different than the respective second adjusted values.

Abstract: In one embodiment of a networking module, a first block receives a serial digital media signal, and provides a parallel digital media signal based on the serial digital media signal. A second block, operative with the first block, stores the parallel digital media signal in a corresponding slot in an outgoing frame, and sends the outgoing frame in response to receiving an incoming frame.

Abstract: A system on a chip for network devices. In one implementation, the system on a chip may include (integrated onto a single integrated circuit), a processor and one or more I/O devices for networking applications. For example, the I/O devices may include one or more network interface circuits for coupling to a network interface. In one embodiment, coherency may be enforced within the boundaries of the system on a chip but not enforced outside of the boundaries.

Abstract: A data prefetching technique optimizes the batch size of prefetch requests. The optimized batch size may be determined based on a prefetch transfer time of a previous prefetch operation, where the prefetch transfer time is measured as an elapsed time interval from when data from the previous prefetch operation is first received to when the data from the previous prefetch operation is finished being received.