Abstract: A system includes a virtualized I/O device coupled to one or more processing units. The virtualized I/O device includes programmed I/O (PIO) configuration registers corresponding to hardware resources, and a storage for storing a resource table that includes a plurality of entries. Each entry corresponds to a respective hardware resource. A system processor may allocate the hardware resources to functions that may include physical and virtual functions, and may program each entry of the resource discovery table for each function with an encoded value that indicates whether a requested hardware resource has been allocated to a requesting process, and whether the requested hardware resource is shared with another function. Processing units may execute a device driver instance associated with a given process to discover allocated resources by requesting access to the resource discovery table. The virtualized I/O device protects the resources by checking access requests against the resource discovery table.

Abstract: In one aspect, a method of compressing data includes splitting an I/O into smaller I/Os based on a throughput of I/Os in a queue, a smaller I/O is equal or smaller than a block size. The method also includes storing the smaller I/Os in the queue. The method further includes asynchronously compressing the smaller I/Os.

Abstract: A USB peripheral device comprising a limited function Universal Serial Bus (USB) host controller configured to control HID compliant USB peripheral devices on a downstream facing USB port is disclosed. The port is also capable of dynamically interfacing to any USB compliant peripheral device.

Abstract: A device, which has not obtained a resource, can securely obtain a required resource without degradation in response to resource obtainment, and obtains the resource which is exclusively controlled between the device and another device. The device includes: a status detector which detects a status of the other device; a resource obtainer which includes flag information and obtains the resource based on the flag information, the flag information indicating whether the obtainment of the resource is permitted or prohibited; and a determiner which switches the flag information to indicate whether the obtainment is permitted or prohibited, based on the status of the other device detected by the status detector. The resource obtainer is prohibited from obtaining the resource when the flag information indicates that the obtainment is prohibited.

Abstract: A storage controller includes a command pointer register. The command pointer register points to a chain of commands in memory, and also includes a security status field to indicate a security status of the first command in the command chain. Each command in the command chain may also include a security status field that indicates the security status of the following command in the chain.

Abstract: A communication apparatus is configured to execute testing of whether or not the responding module is correctly responding to the plurality of commands transmitted and received between a transmission module and a reception module, the testing being performed via a loop-back mode transmission and reception path configured such that the reception module receives the command transmitted by the transmission module; and during the testing, following procedure is performed, which includes: transmitting the specific command by the transmission module; receiving the specific command by the reception module via the transmission and reception path; deactivating reception of the specific command; and transmitting a command different from the specific command subsequent to transmitting the specific command by the transmission module.

Abstract: A method and apparatus for handshaking using a 2-wire protocol is described. An electronic component may be divided into blocks, with the blocks performing one or more functions. The blocks may be in series with one another to form a pipeline. The blocks may use interface circuitry to transfer information upstream from or downstream to another block. The interface circuitry uses the 2-wire handshaking for the transfer including a transmit readiness wire configured to carry a signal indicative of readiness of the upstream circuit to output data and a receive readiness wire configured to carry a signal indicative of readiness of the downstream circuit to receive the data.

Abstract: A transmitting section 7a outputs a transmission signal to the side of a transmission line 1. A first switching section Qa1 outputs the transmission signal to the transmission line 1. A second switching section Qa2 outputs the transmission signal from the transmission line 1. A receiving section 9a receives the transmission signal from the transmission line 1. A first detecting section 13a detects the transmission signal flowing through the first switching section Qa1. A second detecting section 19a detects the transmission signal flowing through the second switching section Qa2. When the transmission signal from the transmitting section 7a is not detected at both the first and second detecting sections 13a and 19a, a selecting section 15a selects the receiving section 9a and outputs a reception signal.

Abstract: The present invention discloses a method for accessing multiple card slots and an apparatus for the same, which relate to data communication field. The method comprises establishing a connection from a CCID to a host, declaring at least a pair of IN/OUT endpoints used for implementing a response pipe and a command pipe as BULK-IN and BULK-OUT endpoints, declaring at least one IN endpoint used for implementing an event notification pipe as an interrupt endpoint, and declaring, by the CCID, the CCID itself as a device compliant with a CCID standard and the number of card slots supported by the CCID to the host; accessing the CCID by the host; receiving, by the CCID, a BULK-OUT packet and determining, by the CCID, a type of a CCID command issued by the host according to the BULK-OUT packet; in case the CCID command is a channel extension command, determining if it is a channel switch command; and if so, parsing the channel switch command and activating a card slot the host tries to access.

Abstract: A module for controlling integrity properties of a data stream input into a device, such as a machine for manufacturing or a management system related to such machines. A plurality of control items are registered in a database. At least one activable control means executes a control of one integrity property according to one of several registered control items. A list is attached to the database with selectable links for activating at least one of the control means. Configuration means perform on at least one of the links a chronological selection according to a predefined management profile on integrity properties of the data stream in order to introduce a selectable relative time delay between activations of control items. Due to that configuration, the integrity control thus obtained is provided with high reliability as well as in a very flexible manner.

Abstract: A disclosed image forming apparatus includes an image processing device including plural image processing units; a control device configured to control the plural image processing units; and a connection unit configured to connect the image processing device to the control device. Each of the plural image processing units is connected to the control device by one of plural channels; the image processing device is connected to the control device by a first bus including the channels; and the connection unit is provided on the first bus so that the image processing device is connected to the control device by a single connection unit.

Abstract: A method to adjust a multi-path device reservation by supplying a computing device and a storage controller interconnected with a communication link. The method further reserves a data storage device in communication with the storage controller, where that data storage device reservation is held by a first communication path group comprising a first plurality of communication paths configured in the communication link. If the method detects a failed communication path configured in the first communication path group, the method configures a second communication path group by removing the failed communication path from the first communication path group, wherein the second communication path group maintains the data storage device reservation.

Abstract: There is provided an apparatus including a plurality of modules. Each module includes a storage unit configured to store a waiting ID and a specific ID of the module, a communication unit configured to transmit and receive packets to and from a bus, and a processing unit configured to process data of a packet which includes a valid flag indicating that the packet is valid, wherein the communication unit takes in data held by a packet which has an ID that coincides with the waiting ID, and stores the processed data in a packet which includes the valid flag indicating invalid and an ID coincident with the specific ID, and transmits the packet.

Abstract: Described are techniques for performing a data storage management task. A presentation technology service layer renders a user interface for user interaction in accordance with one or more rendering techniques. A user interaction template service layer includes one or more templates. Each of the templates describes processing to perform the data storage management task. A user interface data model mapping service layer communicates with at least one of a business logic service layer and a data storage interface layer to perform one or more operations in connection with the data storage management task and to map data received therefrom in a form for use by the user interface in accordance with a user interface data model.

Abstract: To provide a job scheduler, a job scheduling method, and a job control program that are capable of, even with an incapable CPU not equipped with a real-time OS, meeting basic real-time property that is required in a system. The job scheduler is a job scheduler 5 for calling each of a plurality of jobs for controlling an appliance to a main loop and causing each job to be executed. The job scheduler 5 carries out calling control including: dividing the jobs into a plurality of groups according to a degree of need for real-time processing of each jobs; setting a priority on a group basis; and restricting a calling frequency, per cycle, of a job belonging to a group of low priority to a minimum tolerated frequency.

Abstract: The present invention pertains to a graphics processing unit. The graphics processing unit includes a graphics processing core configured for graphics processing. A single-ended I/O interface configured to implement single-ended communication with a frame buffer memory is included in the graphics processing unit. The graphics processing unit further includes a differential I/O interface having a first portion and a second portion. In a first configuration, the first portion and the second portion implement a PCI-Express interface with a computer system. In a second configuration, the first portion implements a PCI-Express interface with the computer system and the second portion implements differential communication with a coupled device.

Abstract: The object of the present invention is to provide a technique in which, in a storage apparatus using a PCI Express switch in an internal network, an EP can be shared among processors even if the EP is incompatible with the MR-IOV. A storage apparatus according to the present invention is provided with a first interface device which controls data input/output to and from a higher-level apparatus, and the first interface device is further provided with multiple virtual function units which provide virtual ports. The first interface device enables any of the virtual function units and does not enable any of the other virtual function units (see FIG. 14).

Abstract: A method for authentication of an external storage device (16) operatively connected to a port of a host computer (10) where the host computer (10) conducts a handshake with the external storage device (16) seeking an authentication key from the external storage device. The host computer (10) electrically disconnects the external storage device (16) from the host computer (10) if the authentication key is incorrect or not provided within a predetermined period. The host computer (10) allows access to the host computer (10) by the external storage device (16) if the authentication key is correct and provided within the predetermined period. Corresponding apparatus and systems are also disclosed.

Abstract: Described are techniques for indicating a state associated with a device. A request is received over a path for information about a device. A response to the request is sent. The response indicates a state regarding the device on the path. The response has a response status of good and a payload of a varying size. The payload is truncated at a location prior to that at which a device identifier for the device is expected. In accordance with the response, a state regarding the device on the path is determined.

Abstract: This document describes techniques (300, 600) and apparatuses (102, 106, 700, 800, 900) for peripheral authentication. These techniques (300, 600) and apparatuses (102, 106, 700, 800, 900) may configure data lines for authentication between host device (102) and peripheral (106), use these configured data lines to authenticate the peripheral (106), and then reconfigure the data lines for use. These techniques (300, 600) may also or instead transmit time stamps to a remote entity (402) for tracking peripheral use and/or present home screens (122) responsive to connection to a peripheral (106).

Abstract: A system includes an initiator device including an initiator interface. A target device includes a target interface that communicates with the initiator interface via a protocol. The protocol supports commands being sent from the initiator device to the target device. The protocol does not support commands being sent from the target device to the initiator device. The target interface is configured to send a command to the initiator device via the protocol. The initiator interface is configured to execute the command.

Abstract: Some embodiments include methods and apparatus to decode a functional request embedded in a portion of a standard device request, and execute the functional request by a universal serial bus (USB) device. The standard device request can include a Get_Descriptor request. Other embodiments are described.

Abstract: Peripherals and data processing systems are disclosed which can be configured to interact based upon sensor data. In one embodiment, a peripheral, which is configured to be used with a data processing system, includes an interface to couple the peripheral to the data processing system, and at least one sensor, such as a proximity sensor, to sense a user of the peripheral, and a processor coupled to the interface and to the at least one sensor, wherein the processor configures the peripheral in response to data from the at least one sensor. The peripheral may communicate sensor data from its sensors to the data processing system, which may be a wireless PDA, and the data processing system analyzes the sensor data from its sensors and from the peripheral's sensors to decide how to configure the peripheral and/or the data processing system based on the sensor.

Abstract: A scanning apparatus and a method thereof include a scanning unit scanning a document and outputting a scanned result, at least one external storage unit detachably attached to the apparatus, at least one internal storage unit, and a controller detecting an attachment state of the external storage unit and storing the scanned result in one of the external storage unit and the internal storage unit according to the attachment state of the external storage unit. The scanning unit of the scanning apparatus is combined with a user scanning unit and a user printing unit into a combination apparatus, and the scanned result is printed in a printing apparatus spaced-apart from the scanning apparatus by a distance, thereby removing cables between the scanning or printing apparatus and a personal computer.

Abstract: An arbiter for a space switch comprising a two buffers, a media access controller having data outputs coupled to the two buffers, and two control outputs coupled to respective buffers for buffering input data at a clock rate one-half that of the input data and a switch fabric connected to the two buffers for matching buffer data throughput with switch data throughput, the arbiter comprising first and second schedulers, each scheduler includes a plurality of inputs for connection to the two buffers for receiving requests, a plurality of outputs for granting requests and a plurality of inter connections to each of the plurality of schedulers for informing them of grants and logic for logically grouping input ports associated with a bifurcate input port, logically grouping output ports associated with a bifurcate output port, establishing round robin pointers for each of two alternate clock ticks for tracking next allowable requests and on one clock tick allowing connection requests from input ports to output po

Abstract: A system and method for coordinating control setting with respect to an automated input/output (I/O) processor. A state machine having a transition algorithm can be configured in association with a storage controller in order to permit multiple entities to safely transmit an I/O request to an I/O device. Specific combinations of control bits associated with a fast path engine can be determined by identifying different modes with respect to the behavior of the fast path engine. Each mode can be assigned as a state with respect to the state machine. An I/O path exception and error condition that can cause transitions between the states can be determined and the transitions can be assigned from one state to another state. A generic logic template can then be configured to govern the transitions with respect to the state machine. The logic can be executed when an event occurs in order to trigger multiple state transition and/or modifications with respect to the hardware control bits of the fast path engine.

Abstract: A data packer of an input/output hub of a computer system packs and formats write data that is supplied to it before the write data is written into a memory unit of the computer system. More particularly, the data packer accumulates write data received from lower bandwidth clients for delivery to a high bandwidth memory interface. Also, the data packer aligns the write data, so that when the write data is read out from the write data packer, no further alignment is needed.

Abstract: To schedule workloads of requesters of a shared storage resource, a scheduler specifies relative fairness for the requesters of the shared storage resource. In response to the workloads of the requesters, the scheduler modifies performance of the scheduler to deviate from the specified relative fairness to improve input/output (I/O) efficiency in processing the workloads at the shared storage resource.

Abstract: Methods and apparatus are provided for allowing a component such as a processor on a programmable chip efficient access to properly transformed data an embedded memory. Circuitry is provided with the read data port associated with an embedded memory. The circuitry can be used to perform both static bit width configuration of an embedded memory as well as perform data transformation or data alignment of embedded memory read data. The circuitry can allow efficient data transformations including selection of half words and bytes as well as perform sign extension and zero extension of memory read data.

Abstract: Provided is a method and an apparatus for processing data at a high speed by a UE for data communication. In the method, received data is divided into a header and payload information, which are then stored in different memories. In the method, header processing and payload data processing can be performed in parallel, and two memory devices can perform parallel processing without sharing a bus.

Abstract: In one embodiment, the present invention includes apparatus that is formed on a single semiconductor die having one or more cores, a memory controller, and a hub coupled to the memory controller. The hub includes multiple fabrics each to communicate with a peripheral controller via a target interface and a master interface according to a first protocol, and where the fabrics are serially coupled via a first plurality of target interfaces in an upstream direction and a second plurality of target interfaces in a downstream direction. Other embodiments are described and claimed.

Abstract: A method to improve a solid state disk performance by using a programmable bus arbiter is generally presented. In this regard, in one embodiment, a method is introduced comprising delaying a request from a solid state drive for access to an interface for a time to allow a host to access the interface to transmit a command to the solid state drive. Other embodiments are described and claimed.

Abstract: An image processing apparatus, which includes an input unit configured to input image data and which is communicably connected to multiple external apparatuses via a network, which obtains a document with a predetermined form via the network from one of the multiple external apparatuses and transmits the image data input by the input unit according to instructions from a user based on the predetermined form. Also, in the case that the predetermined form described in the obtained document is recognized as a form to request input of image data, determines whether transmission of the image data should be restricted according to transmission destination of the image data transmitted, and based on the determining results, a control unit restricts transmission of the image data.

Abstract: A data packer of an input/output hub of a computer system packs and formats write data that is supplied to it before the write data is written into a memory unit of the computer system. More particularly, the data packer accumulates write data received from lower bandwidth clients for delivery to a high bandwidth memory interface. Also, the data packer aligns the write data, so that when the write data is read out from the write data packer, no further alignment is needed.

Abstract: Dynamically managing a thread pool associated with a plurality of sub-applications. A request for at least one of the sub-applications is received. A quantity of threads currently assigned to the at least one of the sub-applications is determined. The determined quantity of threads is compared to a predefined maximum thread threshold. A thread in the thread pool is assigned to handle the received request if the determined quantity of threads is not greater than the predefined maximum thread threshold. Embodiments enable control of the quantity of threads within the thread pool assigned to each of the sub-applications. Further embodiments manage the threads for the sub-applications based on latency of the sub-applications.

Abstract: A system including a server apparatus executes an application program and a client apparatus enabling a user to utilize the application program by communicating with the server apparatus based on an instruction of the user. The server apparatus includes: an output detection section for detecting output-processing which is processing of outputting data from the application program into a shared area; and an output control section for storing instruction information in the shares area, instead of storing the output data outputted from the application program therein, in response to the detection of the output-processing, the instruction information specifying an acquisition method by which an authorized client apparatus acquires the output data.

Abstract: A host I/F unit has a management table for managing an MPPK which is in-charge of the control of input/output processing for a storage area of an LDEV, and if a host computer transmits an input/output request for the LDEV, the host I/F unit transfers the input/output request to the MPPK which is in-charge of the input/output processing for the LDEV based on the management table, an MP of the MPPK performs the input/output processing based on the input/output request, and the MP of the MPPK also judges whether the MPPK that is in-charge of the input/output processing for the LDEV is to be changed, and sets the management table so that an MPPK which is different from the MPPK that is in-charge is to be in-charge of the input/output processing for the LDEV.

Abstract: A data packer of an input/output hub of a computer system packs and formats write data that is supplied to it before the write data is written into a memory unit of the computer system. More particularly, the data packer accumulates write data received from lower bandwidth clients for delivery to a high bandwidth memory interface. Also, the data packer aligns the write data, so that when the write data is read out from the write data packer, no further alignment is needed.

Abstract: A connection control method including receiving intrinsic information of a neighboring external device from the external device; detecting time information indicating a time at which the intrinsic information is received; and controlling a connection to the external device based on the intrinsic information and the time information.

Abstract: Described herein are techniques for time limited lock ownership. In one embodiment, in response to receiving a request for a lock on a shared resource, the lock is granted and a lock lease period associated with the lock is established. Then, in response to determining that the lock lease period has expired, one or more lock lease expiration procedures are performed. In many cases, the time limited lock ownership may prevent system hanging, timely detect system deadlocks, and/or improve overall performance of the database.

Abstract: Techniques for portable device data archiving are disclosed. In one particular exemplary embodiment, the techniques may be realized as a computer implemented method for data archiving comprising detecting a connection of a device to a computing platform, identifying the connected device, and archiving data of the connected device according to a specified archive parameter.

Abstract: A system for normalizing capacity utilization within virtual storage pools includes collecting utilization statistics across individual storage devices that are members of a virtualized storage pool. Using the pool utilization level statistics, pool members may be assigned a score and, according to that score, may be marked as source, target or neutral members. Based on the scores of each pool member, data may be migrated among pool members, in particular, from source members to target members. The process may be iterative such that the statistics and scores may be used only to perform a fraction of the data movement that would be needed to normalize the storage pool before the scores are then recalculated. In this way, the system may dynamically adapt to changing conditions within the pool such as device additions, removals and inefficient striping of new data.

Abstract: A memory module having reduced access granularity. The memory module includes a substrate having signal lines thereon that form a control path and first and second data paths, and further includes first and second memory devices coupled in common to the control path and coupled respectively to the first and second data paths. The first and second memory devices include control circuitry to receive respective first and second memory access commands via the control path and to effect concurrent data transfer on the first and second data paths in response to the first and second memory access commands.

Abstract: A composite input signal having an audio component and a video component is routed from an input to an output by separating a stream of audio data words at an average frequency F1 from the video component and supplying the separated stream of audio data words sequentially to a FIFO input register. The output of the FIFO input register is polled at a frequency F2, greater than F1, and, in the event that an audio data word is available at the output of the FIFO input register, the audio data word is conveyed from the output of the FIFO input register to an input of a signal path. Otherwise a null data word is conveyed to the input of the signal path. The signal path thereby conveys a stream of data words that comprises both audio data words and null data words. The audio data words of the stream conveyed by the path are combined with the video component of the composite input signal.

Abstract: A Method to redirect SRB routines from otherwise non-zIIP eligible processes on an IBM z/OS series mainframe to a zIIP eligible enclave is disclosed. This redirection is achieved by intercepting otherwise blocked operations and allowing them to complete processing without errors imposed by the zIIP processor configuration. After appropriately intercepting and redirecting these blocked operations more processing may be performed on the more financially cost effective zIIP processor by users of mainframe computing environments.

Abstract: A memory system is provided. The system includes a controller that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A buffer component operates in conjunction with the controller to regulate read and write access to the one or more FLASH devices. Wear leveling components along with read and write processing components are provided to facilitate efficient operations of the FLASH memory devices.

Abstract: A Method to redirect SRB routines from otherwise non-zIIP eligible processes on an IBM z/OS series mainframe to a zIIP eligible enclave is disclosed. This redirection is achieved by intercepting otherwise blocked operations and allowing them to complete processing without errors imposed by the zIIP processor configuration. After appropriately intercepting and redirecting these blocked operations more processing may be performed on the more financially cost effective zIIP processor by users of mainframe computing environments.

Abstract: Software fault isolation methods using byte-granularity memory protection are described. In an embodiment, untrusted drivers or other extensions to a software system are run in a separate domain from the host portion of the software system, but share the same address space as the host portion. Calls between domains are mediated using an interposition library and access control data is maintained for substantially each byte of relevant virtual address space. Instrumentation added to the untrusted extension at compile-time, before load-time, or at runtime and added by the interposition library enforces the isolation between domains, for example by adding access right checks before any writes or indirect calls and by redirecting function calls to call wrappers in the interposition library. The instrumentation also updates the access control data to grant and revoke access rights on a fine granularity according to the semantics of the operation being invoked.

Abstract: An embodiment of a method for credit-based flow control is disclosed. For this embodiment of the method, a first transaction layer packet from a sending device is loaded into a receiver buffer of a receiving device. A second transaction layer packet is loaded into the receiver buffer, where the second transaction layer packet is of a different packet type than the first transaction layer packet. The first transaction layer packet is unloaded from the receiver buffer without return of a credit for the unloading of the first transaction layer packet from the receiver buffer. The first transaction layer packet is loaded into a side buffer, and the credit for the first transaction layer packet is sent to the sending device responsive to unloading or anticipated unloading of the first transaction layer packet from the side buffer.

Abstract: This invention discloses a storage visualization subsystem and system with host-side redundancy via SAS connectivity. The I/O interconnect interface between the storage visualization controller and the host is a serial-attached SCSI (SAS) interface. At least one SAS expander is inserted on the I/O interconnect path of the host side to provide the function of device expansion. Or, a built-in virtual SAS expander is disposed inside the storage virtualization controller to provide multiple virtual IDs for each SAS port. When one controller in the storage virtualization controller pair malfunctions or fails, the invention provides solutions in accord with different embodiments so that the surviving controller can inherit the ID of the failed one. Thus, the host can keep functioning normally as it is not aware of any change in the device status.