Input/output Access Regulation Patents (Class 710/36)
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Patent number: 8352653Abstract: This invention discloses a storage visualization subsystem and system with host-side redundancy via SAS connectivity. The I/O interconnect interface between the storage visualization controller and the host is a serial-attached SCSI (SAS) interface. At least one SAS expander is inserted on the I/O interconnect path of the host side to provide the function of device expansion. Or, a built-in virtual SAS expander is disposed inside the storage virtualization controller to provide multiple virtual IDs for each SAS port. When one controller in the storage virtualization controller pair malfunctions or fails, the invention provides solutions in accord with different embodiments so that the surviving controller can inherit the ID of the failed one. Thus, the host can keep functioning normally as it is not aware of any change in the device status.Type: GrantFiled: November 22, 2006Date of Patent: January 8, 2013Assignee: Infortrend Technology, Inc.Inventors: Ching-Hua Fang, Ching-Te Pang
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Patent number: 8346998Abstract: A system and method for transmitting data packets from a memory hub to a memory controller is disclosed. The system includes an upstream reception port coupled to an upstream link. The upstream reception port receives the data packets from downstream memory hubs. The system further includes a bypass bus coupled to the upstream reception port. The bypass bus transports the data packets from the upstream reception port. The system further includes a temporary storage coupled to the upstream reception port and configured to receive the data packets from the upstream reception port. The system further includes a bypass multiplexer for selectively coupling an upstream transmission port to either one of a core logic circuit, the temporary storage, or the bypass bus.Type: GrantFiled: April 15, 2011Date of Patent: January 1, 2013Assignee: Micron Technology, Inc.Inventors: Ralph James, Joe Jeddeloh
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Patent number: 8346917Abstract: A unified enterprise level method and system for enhancing a performance of applications and storage subsystems in a storage network are disclosed. In one embodiment, a method for enhancing the performance of the storage network having applications and storage subsystems includes collecting performance data associated with the applications and the storage subsystems, and generating performance profiles for a set of combinations of the applications and the storage subsystems implemented in the storage network based on the performance data. The method also includes receiving desired performance criteria for an application of the storage network, and applying a performance profile to configure the application and a storage subsystem assigned to the application substantially similar to the desired performance criteria.Type: GrantFiled: June 26, 2009Date of Patent: January 1, 2013Assignee: Netapp. Inc.Inventors: Sridhar Balasubramanian, Ken Fugate, Richard Stehno, Mark Pokorny
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Patent number: 8346990Abstract: methods and systems for monitoring data activity may include various operations, including, but not limited to: modifying a value of at least one counter in response to one or more input/output requests directed to at least one data storage region during a first time interval; storing a first cumulative value of the counter modified in response to one or more input/output requests directed to at least one data storage region during the first time interval following the expiration of the first time interval; modifying a value of at least one counter in response to one or more requests directed to the at least one data storage region during a second time interval; storing a second cumulative value of the counter modified in response to one or more requests directed to the at least one data storage region during the second time interval following the expiration of the second time interval; and computing at least one activity index for the at least one data storage region from at least the first cumulative valueType: GrantFiled: January 31, 2011Date of Patent: January 1, 2013Assignee: LSI CorporationInventors: Brian McKean, Donald Humlicek, James Lynn, Timothy Snider
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Patent number: 8346997Abstract: In one embodiment, a computer-implemented method for creating redundant system configurations is presented. The computer-implemented method creates a set of virtual function path authorization tables, and receives a request from a requester to provide requested data from a virtual function wherein the virtual function is performed by a single root or a multi-root peripheral component interconnect device. Further a receive buffer is created in a selected address range in a set of addresses ranges as well as a virtual function work queue entry for the virtual function containing an address of the receive buffer in the selected address range. Responsive to a determination that the virtual function is authorized, writing the requested data into the receive buffer of the selected address range in the one or more systems, and responsive to writing the requested data, issuing a notice of completion to the requester.Type: GrantFiled: December 11, 2008Date of Patent: January 1, 2013Assignee: International Business Machines CorporationInventors: Douglas M. Freimuth, Steven M. Thurber
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Patent number: 8346995Abstract: Techniques are disclosed for managing the flow of IO jobs from a client to a hardware device such that resource starvation is reduced without significantly impacting throughput. Each flow can be assigned an amount of time that a hardware device can deplete completing IO jobs from the client. When the allocated amount of time is used IO jobs associated with the client can be stored in a queue until the client obtains more time.Type: GrantFiled: September 30, 2008Date of Patent: January 1, 2013Assignee: Microsoft CorporationInventors: Dustin L. Green, Yau Ning Chin, Bruce L. Worthington
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Patent number: 8341314Abstract: The host interface module is configured to receive a plurality of I/O request which includes an associated priority; create an I/O request queue for each associated priority; define a threshold value for the queue length for each of the plurality of I/O request queues; and determine if the queue length for one of the plurality of the I/O request queue corresponding to the associated priority is less than the defined threshold value for the queue length for the one of the plurality of the I/O request queues. If the queue length of the one of the plurality of I/O request queues is more than the defined threshold value for the queue then the host interface module is further configured to rejecting the I/O request and sending a queue full message; wherein the threshold value for the queue length is based on the processing rate of the I/O requests in the plurality of the I/O request queues.Type: GrantFiled: March 25, 2010Date of Patent: December 25, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventors: Kishore Kumar Muppirala, Satish Kumar Mopur, Dinkar Sitaram
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Patent number: 8335865Abstract: Some embodiments include methods and apparatus to decode a functional request embedded in a portion of a standard device request, and execute the functional request by a universal serial bus (USB) device. The standard device request can include a Get_Descriptor request. Other embodiments are described.Type: GrantFiled: November 30, 2010Date of Patent: December 18, 2012Assignee: Micron Technology, Inc.Inventors: Girish Desai, Senthil Chellamuthu
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Patent number: 8335872Abstract: Methods and systems for advancing to another service from a plurality of services in a digital radio broadcast receiver are described. The methods and systems include the steps of receiving an instruction to advance to another service from a man-machine interface of the digital radio broadcast receiver, selecting an entry from a set of entries stored in a memory of the digital radio broadcast receiver responsive to the instruction, wherein each entry identifies a service, and wherein at least some of said services correspond to services identified as receivable, tuning to a first service identified by the selected entry, rendering content received on the first service at the digital radio broadcast receiver, and updating the set of entries stored in the memory of the digital radio broadcast receiver based on at least one criteria.Type: GrantFiled: December 31, 2008Date of Patent: December 18, 2012Assignee: iBiquity Digital CorporationInventors: Ashwini Pahuja, Marek Milbar, David Gorelik, Catherine P. Gooi
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Patent number: 8332554Abstract: In one embodiment of a networking module, a first block receives a serial digital media signal, and provides a parallel digital media signal based on the serial digital media signal. A second block, operative with the first block, stores the parallel digital media signal in a corresponding slot in an outgoing frame, and sends the outgoing frame in response to receiving an incoming frame.Type: GrantFiled: June 29, 2011Date of Patent: December 11, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventors: Baranitharan Subbiah, Sanjay Katabathuni, Shoby A. Cherian, Chi-Lie Wang, Maria Hu, Sudhakar Rao, Kap Soh, Scott W. Mitchell, Raymond Su, Lomberto P. Jimenez
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Patent number: 8332555Abstract: A circuit for a storage device that communicates with a host device comprises a first high speed interface. A storage controller communicates with the high speed interface. A buffer communicates with the storage controller. The storage device generates storage buffer data during operation. The storage controller is adapted to selectively store the storage buffer data in at least one of the buffer and/or in the host device via the high speed interface. A bridge chip for enterprise applications couples the circuit to an enterprise device.Type: GrantFiled: June 6, 2011Date of Patent: December 11, 2012Assignee: Marvell World Trade Ltd.Inventor: Sehat Sutardja
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Patent number: 8332549Abstract: A method for communication between an initiator system and a block storage cluster may include receiving a first input/output (I/O) request from the initiator system. The method may also include sending a referral response from a first storage system included in a plurality of storage systems of the block storage cluster to the initiator system when data associated with the first I/O request is stored in more than one storage system of the plurality of storage systems of the block storage cluster. Additionally, the method may include directing a referral I/O to the first storage system and the second storage system for transferring data to or transferring data from the first storage system and the second storage system, and transferring data associated with the referral I/O to or transferring data associated with the referral I/O from the first storage system and the second storage system.Type: GrantFiled: March 31, 2009Date of Patent: December 11, 2012Assignee: LSI CorporationInventors: Andrew J. Spry, Ross Zwisler, Gerald J. Fredin, Kenneth J. Gibson
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Patent number: 8332550Abstract: A method of operating an input/output interface is described. The method comprises eliminating a current path into an output pin of an input/output interface while the input/output interface receives an operational power signal during a first mode of operation; and enabling the current path into the output pin of the input/output interface to limit a voltage magnitude externally applied to the output pin of the input/output interface during a second mode of operation.Type: GrantFiled: August 30, 2010Date of Patent: December 11, 2012Assignee: Xilinx, Inc.Inventors: Phillip A. Young, Honggo Wijaya
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Patent number: 8332542Abstract: A computer program product for procuring information from entities in a network via an Input/Output (I/O) processing system includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes receiving, at a channel subsystem, at least one network topology information request from an operating system. The method also includes building at least one command request that includes the at least one network topology information request, and sending the at least one command request from the channel subsystem to at least one network entity. The method further includes receiving a response to the at least one command request from the at least one network entity by the channel subsystem, and forwarding the response from the channel subsystem to the operating system.Type: GrantFiled: November 12, 2009Date of Patent: December 11, 2012Assignee: International Business Machines CorporationInventors: Daniel F. Casper, Patricia G. Driever, John R. Flanagan, Louis W. Ricci, Gustav E. Sittmann, III
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Patent number: 8327040Abstract: The present disclosure includes methods, devices, and systems for controlling a memory device. One method for controlling a memory device embodiment includes storing device class dependent information and a command in one or more of host system memory and host controller memory, setting a pointer to the command in a register in a host controller, directing access to the one or more of host system memory and host controller memory with the memory device via the host controller; and executing the command with the memory device.Type: GrantFiled: January 26, 2009Date of Patent: December 4, 2012Assignee: Micron Technology, Inc.Inventors: Peter Feeley, Robert N. Leibowitz, William H. Radke, Neal A. Galbo, Victor Y. Tsai
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Patent number: 8327042Abstract: In a first embodiment of the present invention, a method for configuring a plurality of input/output (I/O) interconnect switch ports is provided, the method comprising: starting a link training and status state machine (LTSSM) for each of the plurality of ports; placing each of the LTSSMs in a receiver detect state; changing all of the LTSSMs to a polling state only once receivers are detected or timeouts occur in the receiver detect states in each of the LTSSMs; changing all of the LTSSMs to a configuration state only once polling is successful or timeouts occur in the polling states in each of the LTSSMs; and completing the configuration state of each of the LTSSMs.Type: GrantFiled: September 3, 2010Date of Patent: December 4, 2012Assignee: PLX Technology, Inc.Inventor: Christopher R. Millsaps
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Patent number: 8327093Abstract: A unique system and method for ordering commands may reduce disc access latency while giving preference to pending commands. The method and system involves giving preference to pending commands in a set of priority queues. The method and system involve identifying a pending command and processing other non-pending commands in route to the pending command if performance will not be penalized in doing so. The method and system include a list of command node references referring to a list of sorted command nodes that are to be scheduled for processing.Type: GrantFiled: October 21, 2004Date of Patent: December 4, 2012Assignee: Seagate Technology LLCInventors: Edwin Scott Olds, Stephen R. Cornaby, Mark David Hertz, Kenny Troy Coker
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Patent number: 8321596Abstract: An input port is assigned to a SAS expander device. An output port is assigned to the SAS expander device. The output port and the input port are defined to be paired with each other as a primary subtractive port. Only a SAS initiator address is programmed in the route table of the SAS expander. An OPEN command is sent out the output port upon receiving the OPEN command into the input port if the DEST of the OPEN command is not a direct attached device of the SAS expander device and the DEST is not in the route table of the SAS expander device. An OPEN command is sent out the input port upon receiving the OPEN command into the output port if the DEST of the OPEN command is not a direct attached device of the SAS expander device and the DEST is not in the route table of the SAS expander device.Type: GrantFiled: April 2, 2009Date of Patent: November 27, 2012Assignee: LSI CorporationInventors: Stephen B. Johnson, William K Petty, Owen Parry
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Patent number: 8321926Abstract: A system and method to selectively isolate one or more unprotected computer devices from the rest of the computer system and/or from the network. The ability to isolate and/or authenticate the software and/or hardware on or interacting with the unprotected software and/or hardware provides for a secured system despite the presence or use of an unprotected computer device.Type: GrantFiled: December 2, 2008Date of Patent: November 27, 2012Assignee: Lockheed Martin CorporationInventors: Brian D. Sutterfield, Bradley T. Atwater
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Patent number: 8316160Abstract: A non-volatile memory device having a USB connector with a USB controller, and a wireless antenna with a wireless controller. The USB controller and the wireless controller are both operatively connected to the non-volatile memory. When the non-volatile memory device is operatively connected to a host using the USB connector, the USB controller has priority over the wireless controller for read from, and write to, functions with the non-volatile memory. A corresponding method is also disclosed.Type: GrantFiled: July 13, 2006Date of Patent: November 20, 2012Assignee: Trek 2000 International Ltd.Inventors: Teng Pin Poo, Henry Tan
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Patent number: 8316165Abstract: A device has a controller and a function module configured to be in communication with the controller as a result of the controller receiving a pass-through vendor specific command. In some embodiments, the controller is configured to receive the pass-through vendor specific command from an application software module of a host through an interface that is configured in accordance with a standard that does not allow communication to occur between the controller and the function module.Type: GrantFiled: December 7, 2011Date of Patent: November 20, 2012Assignee: Micron Technology, Inc.Inventors: Anson Ba Phan, Jerrold Allen Beckmann
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Patent number: 8316161Abstract: Described are techniques for indicating a state associated with a device. A request is received over a path for information about a device. A response to the request is sent. The response indicates a state regarding the device on the path. The response has a response status of good and a payload of a varying size. The payload is truncated at a location prior to that at which a device identifier for the device is expected. In accordance with the response, a state regarding the device on the path is determined.Type: GrantFiled: September 30, 2010Date of Patent: November 20, 2012Assignee: EMC CorporationInventors: Cesareo Contreras, Helen S. Raizen, Michael E. Bappe, Ian Wigmore, Arich Don, Xunce Zhou
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Patent number: 8312461Abstract: A system includes a virtualized I/O device coupled to one or more processing units. The virtualized I/O device includes a storage for storing a resource discovery table, and programmed I/O (PIO) configuration registers corresponding to hardware resources. A system processor may allocate the plurality of hardware resources to one or more functions, and to populate each entry of the resource discovery table for each function. The processing units may execute one or more processes. Given processing units may further execute OS instructions to allocate space for an I/O mapping of a PIO configuration space in a system memory, and to assign a function to a respective process. Processing units may execute a device driver instance associated with a given process to discover allocated resources by requesting access to the resource discovery table. The virtualized I/O device protects the resources by checking access requests against the resource discovery table.Type: GrantFiled: June 9, 2008Date of Patent: November 13, 2012Assignee: Oracle America, Inc.Inventor: John E. Watkins
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Patent number: 8312184Abstract: The storage unit of a peripheral device has a first storage area and a second storage area. The first storage area stores a plurality of control programs corresponding to a plurality of operating systems of different types. The second storage area is a storage area which is recognized by an information processing apparatus as an external storage device and in which at least one control program is replicated from the first storage area. The information processing apparatus reads out the control program from the second storage recognized by it as the external storage device, and executes the program. The information processing apparatus thus controls the peripheral device.Type: GrantFiled: November 9, 2010Date of Patent: November 13, 2012Assignee: Canon Denshi Kabushiki KaishaInventors: Kiyoshi Ito, Hirokazu Higuchi, Ayaka Sato, Yuuki Taguchi
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Patent number: 8312293Abstract: An external storage device connectable to an information processing apparatus is provided. The storage device includes: an input/output interface via which data is exchanged with an information processing apparatus; a first storage region where data associated with first and second validity periods is stored; and a second storage region where a control program is stored. While the first validity period is used when the external storage device is connected to one information processing apparatus, the second validity period is used when the external storage device is connected to another information processing apparatus. The control program causes a processor to execute the steps of: establishing connection of the external storage device to an information processing apparatus; identifying any one of the validity periods as a validity period to be used for the data; and executing predetermined security protection processing on the data in accordance with the identified validity period.Type: GrantFiled: March 8, 2010Date of Patent: November 13, 2012Assignee: International Business Machines CorporationInventors: Sanehiro Furuichi, Yasuhide Niimura, Masami Tada
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Patent number: 8312183Abstract: For one disclosed embodiment, an apparatus comprises a display and a circuit. The circuit has a first port to be coupled to communicate over data lines with a Universal Serial Bus (USB) port of a device external to the apparatus. The circuit is operable to detect resume signaling of a duration of less than one millisecond and to transition the first port from a first state corresponding to an idle state of the data lines to a second, enabled state in response to the resume signaling. For one disclosed embodiment, the circuit is operable to drive resume signaling for a duration of less than one millisecond to initiate transition of the first port from a first state corresponding to an idle state of the data lines to a second, enabled state. Other embodiments are also disclosed.Type: GrantFiled: April 20, 2010Date of Patent: November 13, 2012Assignee: Intel CorporationInventor: John S. Howard
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Patent number: 8312185Abstract: A storage apparatus 10 includes channel devices (each being CHA_PK 11) and microprocessors (each being MP_PK 12). CHA_PK 11 and MP_PK 12 respectively store therein control information being information designating logical volumes (LDEVs) 171 accessible by respective MP_PKs 12. Upon receipt of an I/O request from a management apparatus 20, CHA_PK 11 transmits, based on the control information stored therein, an I/O command to MP_PK 12 having an access right to a logical volume to which the I/O request is directed. In the storage apparatus 10, MP_PK 12 having received the I/O command from CHA_PK 11 judges based on the control information stored therein whether MP_PK 12 itself has an access right to the logical volume, and transmits the control information therein to CHA_PK 11 when judging that it does not have the access right, whereby the control information in CHA_PK 11 is updated.Type: GrantFiled: May 6, 2011Date of Patent: November 13, 2012Assignee: Hitachi, Ltd.Inventors: Kunihiko Nashimoto, Shinichi Hiramatsu, Noboru Furuumi
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Publication number: 20120284432Abstract: A server of an elastic computing cloud system includes a block device driver apparatus and at least a block device service apparatus. The server implements a hot deployment for a storage service, such that an upgrade of the storage service may be performed without interrupting the storage service. The block device driver apparatus maintains a waiting queue and a pending queue for each storage service. In response to determining a storage service will perform an upgrade, the block device driver apparatus stops processing data write/read requests that are maintained in the pending queue for the service, and puts the data write/read requests that are currently processed in the pending queue back to the waiting queue for re-dispatching, thus realizing completion of processing the upgrade of the storage service in the elastic computing cloud system without interrupting the storage service.Type: ApplicationFiled: July 18, 2012Publication date: November 8, 2012Inventors: Weicai Chen, Bo Chen, Hua Kong
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Patent number: 8305379Abstract: In accordance with one or more embodiments, a method and system of managing animation data and related control data for recording on an enhanced navigation medium is provided. The method comprises constructing animation data comprising first image data into a first graphic MNG file in chunk data format, wherein the first graphic file comprises a first header portion, a second end portion, first control data and a frame containing additional data; and recording the first graphic file on an enhanced navigation medium.Type: GrantFiled: August 29, 2007Date of Patent: November 6, 2012Assignee: LG Electronics, Inc.Inventors: Woo Seong Yoon, Jea Yong Yoo, Limoniv Alexandre, Byung Jin Kim
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Patent number: 8307128Abstract: A system, computer-implementable method, and computer-readable medium for improving sequential serial attached small computer system interface storage device performance. According to a preferred embodiment, a microprocessor within a target device receives a collection of tasks from at least one initiator device via a collection of initiator paths. The target device is a cyclic non-volatile memory medium. The microprocessor queues the collection of tasks according to a collection of task list. Each task list corresponds to a respective initiator path. The microprocessor combines the collection of tasks in an execution queue. The collection of tasks on the execution queue is reordered based on a priority scheme. The microprocessor executes the collection of tasks from the execution queue.Type: GrantFiled: December 8, 2006Date of Patent: November 6, 2012Assignee: International Business Machines CorporationInventors: Thomas R. Forrer, Jr., Jason E. Moore, Asghar Tavasoli, Abel E. Zuzuarregui
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Patent number: 8300054Abstract: In accordance with one or more embodiments, a method of managing animation data and related control data for recording on an enhanced navigation medium is provided. The method comprises constructing animation data comprising first image data into a first graphic MNG file in chunk data format, wherein the first graphic file comprises a first header portion, a second end portion, first control data and a frame containing additional data; and recording the first graphic file on an enhanced navigation medium.Type: GrantFiled: August 29, 2007Date of Patent: October 30, 2012Assignee: LG Electronics Inc.Inventors: Woo Seong Yoon, Jea Yong Yoo, Limoniv Alexandre, Byung Jin Kim
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Patent number: 8301831Abstract: An extended Universal-Serial-Bus (USB) connector plug and socket each have a pin substrate with one surface that supports the four metal contact pins for the standard USB interface. An extension of the pin substrate carries another 8 extension metal contact pins that mate when both the connector plug and socket are extended. The extension can be an increased length of the plug's and socket's pin substrate or a reverse side of the substrate. Standard USB connectors do not make contact with the extension metal contacts that are recessed, retracted by a mechanical switch, or on the extension of the socket's pin substrate that a standard USB connector cannot reach. Standard USB sockets do not make contact with the extension metal contacts because the extended connector's extension contacts are recessed, or on the extension of the connector pin substrate that does not fit inside a standard USB socket.Type: GrantFiled: October 24, 2011Date of Patent: October 30, 2012Assignee: Super Talent Electronics, Inc.Inventors: Jim Chin-Nan Ni, David Q. Chow, Frank I-Kang Yu, Abraham C. Ma, Ming-Shiang Shen
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Patent number: 8296472Abstract: System and methods for safely sharing universal serial bus (USB) devices are provided. A request is received to switch from a state in which user mode drivers are not enabled to a state in which user mode drivers are enabled. For each kernel mode USB driver in the system, an I/O control (IOCTL) is called in each kernel mode USB driver. The IOCTL requests that the kernel mode USB driver yield devices on which it has a claim. Also, for each kernel mode USB driver in the system, it is determined if the kernel mode USB driver will yield one or more devices on which it has a claim. For each kernel mode USB driver that will yield and for each device claimed by the kernel mode USB driver for which the kernel mode USB driver respects a request to unclaim the device, a process is executed as if there had been a hot unplug event on the device.Type: GrantFiled: April 12, 2012Date of Patent: October 23, 2012Assignee: VMware, Inc.Inventors: Erik Cota-Robles, Igor Korsunsky
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Patent number: 8296466Abstract: A system, a controller, and a method thereof for transmitting data stream from a host to a peripheral device with a chip are provided. At least a part of a data stream is transmitted from the host to the peripheral device. Then, the host inerrably receives a response message generated by the chip by executing a plurality of read commands. The data stream and the response message have corresponding write tokens, and the write token of the data stream is compared with the write token of the response message to verify the accuracy of the response message.Type: GrantFiled: March 31, 2009Date of Patent: October 23, 2012Assignee: Phison Electronics Corp.Inventors: Ching-Wen Chang, Huan-Sheng Li, Meng-Chang Chen
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Publication number: 20120265907Abstract: An access method includes: obtaining, by a computer, a result of monitoring a busy rate and a number of access operations per unit time of a storage device, the storage device having a first storage area and a second storage area; calculating a characteristic of correlation between the busy rate and the number of access operations per unit time based on the result; calculating a second number of access operations per unit time based on the characteristic of the correlation such that a sum of a first busy rate corresponding to a first number of access operations per unit time and a second busy rate corresponding to a second number of access operations per unit time becomes equal to or lower than a given busy rate; and controlling a number of operations to access the second storage area per unit time based on the second number of access operations.Type: ApplicationFiled: March 13, 2012Publication date: October 18, 2012Applicant: FUJITSU LIMITEDInventors: Kazuichi OE, Kazutaka Ogihara, Yasuo Noguchi, Tatsuo Kumano, Masahisa Tamura, Yoshihiro Tsuchiya, Takashi Watanabe, Toshihiro Ozawa
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Patent number: 8291127Abstract: A circuit for controlling a peripheral device interface is to enable a central processing unit to detect a peripheral device. The circuit includes a control chip and first to sixth capacitors. The control chip includes a power supply input pin, first to second differential signal output pins, first to second differential signal input pins, and an expansion pin. The power supply input pin is connected to a power supply and grounded via the first and second capacitors in parallel. The first and second differential signal output pins are connected to the peripheral device interface via the third and fourth capacitors respectively. The first and second differential signal input pins are connected to the peripheral device interface via the fifth and sixth capacitors respectively. The expansion pin is grounded via a resistor.Type: GrantFiled: April 20, 2009Date of Patent: October 16, 2012Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.Inventor: Ke-You Hu
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Patent number: 8291129Abstract: It is assumed that the image data inputted are subjected to run-length compression and compressed encoding based on Huffman encoding. The first step configuration configured on a reconfigurable circuit includes run-length compression circuits 102a and 102b of two ways for parallel processing and FIFOs 108a and 108b which hold the output data from the circuits, respectively. For example, the data of odd pages are supplied to the run-length compression circuit 102a and the data of even pages are supplied to the run-length compression circuit 102b. After the compression processing proceeds, when at least one of the FIFOs 108a and 108b becomes full, the reconfigurable circuit is reconfigured into the second step configuration. In this configuration, the FIFOs 108a and 108b holding the compression results are left and two Huffman encoding circuits for encoding the data supplied from these FIFOs are included.Type: GrantFiled: September 9, 2010Date of Patent: October 16, 2012Assignee: Fuji Xerox Co., Ltd.Inventor: Mitsuyuki Tamatani
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Patent number: 8285933Abstract: A storage system provides virtual ports, and is able to transfer the virtual ports among physical ports located on multiple storage control units making up the storage system. The storage system is able to manage logical volumes and/or virtual volumes and virtual ports as a group when considering whether to move logical/virtual volumes and/or virtual ports to another storage control unit in the storage system. When the storage system is instructed to transfer volumes, virtual ports, or a group of volumes and virtual ports among the storage control units, the storage system determines whether an inter-unit network will be required to be used following the transfer. When the storage system determines that the inter-unit network will be required if the transfer takes place, the storage system determines and presents an alternate storage control unit for the transfer to avoid use of the inter-unit network, thereby avoiding degraded performance.Type: GrantFiled: November 9, 2010Date of Patent: October 9, 2012Assignee: Hitachi, Ltd.Inventors: Junichi Hara, Takashi Oeda
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Patent number: 8281050Abstract: Embodiments of the invention provide a method of storage array with frame forwarding capability to reduce the complexity of an IT platform system having a large number of hardware devices. In one embodiment, a storage system comprises one or more storage devices; a storage controller having a storage controller processor and a storage controller memory and being coupled with the one or more storage devices; an interface controller receiving an input/output command directly from a host computer; and an internal bus. The interface controller and the storage controller are coupled by the internal bus. In another embodiment, a storage system comprises one or more storage devices; a storage controller having a processor and a memory and being coupled with the one or more storage devices; and a network interface controller which provides virtual Ethernet bridging.Type: GrantFiled: August 20, 2010Date of Patent: October 2, 2012Assignees: Hitachi, Ltd., Hitachi Data Systems CorporationInventors: Toshio Otani, Gary John Pilafas
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Patent number: 8281043Abstract: A method, apparatus, system, and computer program product for enabling out-of-band access to storage devices through port-sharing hardware. Providing out-of-band access to storage devices enables system management functions to be performed when an operating system is non-functional as well as when the operating system is active. Storage commands originating with a management service can be interleaved with storage commands issued by the host operating system. The host operating system maintains ownership and control over its storage devices, but management activities can be performed while the host operating system is operational.Type: GrantFiled: July 14, 2010Date of Patent: October 2, 2012Assignee: Intel CorporationInventors: David A. Edwards, Eng Hun Ooi, Venkat R. Gokulrangan, Hormuzd M. Khosravi, Chai Huat Gan
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Patent number: 8281045Abstract: A device control device includes a transmission signal receiving/outputting unit configured to receive/output a signal containing a control signal for controlling an internal status from/to another device, the other device being connected to the transmission signal receiving/outputting unit, an application obtaining unit configured to obtain an application as necessary by accessing an application server via a network, a display control unit configured to control display based on the application obtained by the application obtaining unit, and an operation control unit configured to control an operation of the other device by performing the application obtained by the application obtaining unit. The display control unit changes content to be displayed in accordance with a type of the other device.Type: GrantFiled: December 20, 2010Date of Patent: October 2, 2012Assignee: Sony CorporationInventors: Satoshi Higuchi, Koichi Tashiro, Ken Onogi
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Patent number: 8275913Abstract: Methods and systems for detecting a state of a field asset using a packet capture agent is disclosed. A method may include capturing one or more packets transmitted on a shared bus in a field asset and determining the occurrence of a door event based at least one the one or more captured packets.Type: GrantFiled: July 25, 2008Date of Patent: September 25, 2012Assignee: Crane Merchandising Systems, Inc.Inventors: Steven Joel Blachman, Jon Sven Knudson
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Patent number: 8271706Abstract: The present invention provides a computer implemented method and apparatus to revising logical unit ownership in a host. A host receives an error message from a storage subsystem having at least two storage controllers and at least one logical unit coupled to at least one of the storage controllers. The host suspends I/O from the host to the storage subsystem. The host transmits a verification of logical unit ownership query to the storage subsystem. The host determines that ownership between a host and a logical unit on the at least one of the storage controllers has changed from a mapping table of the host. Responsive to a determination that ownership has changed, the host updates ownership in a mapping table of the host to reflect the ownership between the host and the logical unit. The host resumes I/O from the host to the storage subsystem, wherein the host routinely exchanges I/O with the storage subsystem.Type: GrantFiled: May 22, 2008Date of Patent: September 18, 2012Assignee: International Business Machines CorporationInventors: John L. Neemidge, Nishant B. Shah, Stephen M. Tee, Teerasit Tinnakul
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Patent number: 8271693Abstract: A cable connection support apparatus has a structure in which a master apparatus and a slave apparatus are connected to both ends of a plurality of cables, and each apparatus is connected to each cable by a connecting terminal. The master apparatus and the slave apparatus are grounded. The master apparatus makes, for each connected cable, an inquiry about a position of a terminal of the slave apparatus to which the cable is connected, and inspects for inter-continuity, grounded connection, and unintentional disconnection. The connection destinations and inspection results are displayed on a display apparatus. Consequently, the connection condition for each cable wire in a cable can be confirmed.Type: GrantFiled: June 14, 2010Date of Patent: September 18, 2012Assignee: Hitachi, Ltd.Inventors: Munetoshi Unuma, Shinya Yuda, Ryosuke Shigemi, Toshimi Yokota, Kozo Nakamura
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Patent number: 8266350Abstract: A method is disclosed for a portable peripheral memory storage device. The peripheral memory storage device is coupled with a workstation. In a first mode of operation, a portion of the peripheral memory storage device is mounted on the workstation for operation therewith as a storage medium in a first mode of operation. In a second other mode of operation data within the peripheral memory storage device is used to support a personal desktop on the workstation.Type: GrantFiled: September 30, 2009Date of Patent: September 11, 2012Assignee: Imation Corp.Inventor: Laurence Hamid
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Patent number: 8266333Abstract: The present invention is directed toward a system and method for simultaneously switching multiple input image streams to multiple output devices while providing optional image processing functions on the image streams. The incoming image streams may come from computers, cameras, radar, or other image stream generating devices. The incoming streams may vary in resolution, frame rate, format, and protocol according to the characteristics and purpose of their respective source devices. The incoming image streams can be iteratively routed through a reconfigurable array of image processing circuit cards to operate on one or more streams using preprogrammed algorithms. A processed stream can be routed through another processing function, or to an output circuit card that sends the completed image to the external display, recording device, across a network, or to another logical destination.Type: GrantFiled: May 7, 2010Date of Patent: September 11, 2012Assignee: Z Microsystems, Inc.Inventors: Jack Wade, Charles Siewert
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Patent number: 8261004Abstract: A stacked memory apparatus operating with a compound read buffer is disclosed. The stacked memory apparatus includes an interface device having a main buffer and a plurality of memory devices each having a device read buffer. Systems incorporating one or more stacked memory apparatuses and related method of performing a read operation are also disclosed.Type: GrantFiled: February 14, 2011Date of Patent: September 4, 2012Assignee: Samsung Electronics Co., Ltd.Inventor: Hoe-ju Chung
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Patent number: 8260973Abstract: The present disclosure includes methods and devices for a memory controller. In one or more embodiments, a memory controller includes a plurality of back end channels, and a command queue communicatively coupled to the plurality of back end channels. The command queue is configured to hold host commands received from a host. Circuitry is configured to generate a number of back end commands at least in response to a number of the host commands in the command queue, and distribute the number of back end commands to a number of the plurality of back end channels.Type: GrantFiled: September 23, 2011Date of Patent: September 4, 2012Assignee: Micron Technology, Inc.Inventors: Mehdi Asnaashari, Yu-Song Liao, Jui-Yao Yang, Siamack Nemazie
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Patent number: 8260975Abstract: An HDMI™ (High-Definition Multimedia Interface) switch includes a CEC (Consumer Electronics Control) processor for controlling high-definition audio-visual (AV) equipment. The CEC processor accepts user commands and translates them to control HDMI devices over HDMI; the translations can be manufacturer specific so that devices with different CEC implementations can be combined in a single system. CEC communications between HDMI devices is precluded or at least controlled to avoid problems due to incompatible CEC implementations and unwanted interactions. The CEC processor causes the HDMI switch to appear as an HDMI source to HDMI sink devices and as an HDMI sink to HDMI source devices for the purposes of assigning physical addresses. While CEC is designed to handle AV systems having only one sink (display), the novel HDMI switch provides for CEC-controlled AV systems with multiple displays, e.g., in different rooms.Type: GrantFiled: June 14, 2011Date of Patent: September 4, 2012Assignee: Hydra Connect LLCInventors: David J. Schanin, Anthony Anzelmo
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Patent number: 8255579Abstract: A device control apparatus in a video image display system including a plurality of connected devices. The apparatus includes an obtaining unit which obtains a logical address of a first device connected to the device control apparatus as a control object, a specifying unit which specifies the device type of the first device if the obtained logical address of the first device is not a logical address according to the device type, a selection unit which selects a second device which is connected to the device control apparatus and is of the same device type as the first device, and a control unit which controls a logical address assigned to the selected second device according to the device type thereof so that the first device obtains a logical address.Type: GrantFiled: May 18, 2009Date of Patent: August 28, 2012Assignee: Canon Kabushiki KaishaInventors: Teruki Kikkawa, Michihiro Izumi, Yoshikazu Shibamiya, Yasushi Shikata, Hirofumi Urabe, Daisuke Takayanagi, Chika Masuda