By Masking Or Reconfiguration Patents (Class 714/3)
  • Patent number: 8578209
    Abstract: The described embodiments include a processor that handles faults during execution of a vector instruction. The processor starts by receiving a vector instruction that uses at least one vector of values that includes N elements as an input. In addition, the processor optionally receives a predicate vector that includes N elements. The processor then executes the vector instruction. In the described embodiments, when executing the vector instruction, if the predicate vector is received, for each element in the vector of values for which a corresponding element in the predicate vector is active, otherwise, for each element in the vector of values, the processor performs an operation for the vector instruction for the element in the vector of values. While performing the operation, the processor conditionally masks faults encountered (i.e., faults caused by an illegal operation).
    Type: Grant
    Filed: August 17, 2012
    Date of Patent: November 5, 2013
    Assignee: Apple Inc.
    Inventors: Jeffry E. Gonion, Keith E. Diefendorff
  • Patent number: 8578202
    Abstract: A system and method is provided for ensuring high availability for a distributed application. A management object manages multiple scenarios defined for protection units associated with a distributed application. The management object may coordinate various operations performed at the protection units based on management object configuration information.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: November 5, 2013
    Assignee: CA, Inc.
    Inventors: Guodong Li, Hailin Peng, Zhenghua Xu, Ran Shuai
  • Patent number: 8578247
    Abstract: Systems and methods are described for managing bit errors present in an encoded bit stream representative of a portion of an audio signal, wherein the encoded bit stream is received via a channel in a wireless communications system. The channel may comprise, for example, a Synchronous Connection-Oriented (SCO) channel or an Extended SCO (eSCO) channel in a Bluetooth® wireless communications system.
    Type: Grant
    Filed: April 28, 2009
    Date of Patent: November 5, 2013
    Assignee: Broadcom Corporation
    Inventors: Robert W. Zopf, Vivek Kumar, Michael S. Gustafson
  • Patent number: 8578215
    Abstract: A method for configuring data communication paths between a central controller and a plurality of devices is provided. The method ensures a first appliance is active. For each of the devices, a first communication capability is determined between the first appliance and the device. Signals indicative of the first communication capabilities are transmitted to the central controller. Respective communication paths are mapped between the central controller and the devices via the first appliance as a function of the first communication capabilities. The method ensures an automatic appliance failover is obtained.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: November 5, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Timothy P. Blair, James S Boyce
  • Publication number: 20130290771
    Abstract: A computer system has a plurality of computer nodes, and each computer node has a plurality of virtual computers and a control base unit controlling the virtual computers. Each virtual computer constitutes a multiplexing group with another virtual computer operating on another computer node different from its own computer node, with one operating as the master and the other as the slave. The control base unit controls whether each virtual computer is operating as either the master or the slave, and monitors the respective states of each virtual computer. The control base unit, when it has detected in its own node a failure of the virtual computer operating as the master virtual computer, makes a decision whether to also switch the other virtual computers operating on its own computer node from master virtual computers to slave virtual computers with the virtual computer in which the failure occurred.
    Type: Application
    Filed: November 12, 2010
    Publication date: October 31, 2013
    Applicant: HITACHI, LTD.
    Inventors: Sungho Kim, Eiji Nishijima
  • Publication number: 20130290770
    Abstract: Fault tolerant operation is disclosed for a primary match server of a financial exchange using an active copy-cat instance, a.k.a. backup match server, that mirrors operations in the primary match server, but only after those operations have successfully completed in the primary match server. Fault tolerant logic monitors inputs and outputs of the primary match server and gates those inputs to the backup match server once a given input has been processed. The outputs of the backup match server are then compared with the outputs of the primary match server to ensure correct operation. The disclosed embodiments further relate to fault tolerant failover mechanism allowing the backup match server to take over for the primary match server in a fault situation wherein the primary and backup match servers are loosely coupled, i.e. they need not be aware that they are operating in a fault tolerant environment.
    Type: Application
    Filed: March 28, 2013
    Publication date: October 31, 2013
    Inventors: Paul J. Callaway, Robert C. Hagemann, III, Zuber Shethwala, Troy Reece, Paul A. Bauerschmidt, Enrico Ferrari, Barry L. Galster
  • Patent number: 8570879
    Abstract: A set of one or more receiver parameters is adjusted. It is determined whether to adjust the set of receiver parameters. In the event it is determined to adjust the set of receiver parameters, a new set of values is generated for the set of receiver parameters using a cost function (where the cost function does not assume a noise signal in a receive signal to have a particular statistical distribution) and the set of receiver parameters is changed to have the new set of values.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: October 29, 2013
    Assignee: SK hynix memory solutions inc.
    Inventors: Marcus Marrow, Jason Bellorado
  • Publication number: 20130283092
    Abstract: Data consistency between a primary virtual machine and a recovery virtual machine may employ a resync engine to detect differences in data blocks stored on both virtual machines. For example, the resync engine may calculate a signature (e.g., hash value) for a primary data block and a corresponding signature for a recovery data block, and compare the signature and the corresponding signature to identify a difference between the primary data block and the recovery data block. In some instances, by identifying a difference between the primary data block and the recovery data block, a data block (e.g., primary data block or recovery data block) may be identified to be transferred from a virtual machine to another virtual machine.
    Type: Application
    Filed: April 24, 2012
    Publication date: October 24, 2013
    Applicant: Microsoft Corporation
    Inventors: Partho P. Das, Rohit Jaini, Vijay Krishna Tandra Sistla, Rahul Shrikant Newaskar
  • Publication number: 20130283091
    Abstract: Methods, apparatus, and systems for electronic device recovery are disclosed. An example method includes determining that a software request received from a computing device includes an indication of a repair mode of an electronic device, determining a characteristic of the electronic device, determining software to be provided to the electronic device based on the characteristic, and in response to determining that the software request includes the indication of the repair mode, transmitting location information for the software to the computing device.
    Type: Application
    Filed: April 19, 2012
    Publication date: October 24, 2013
    Inventors: Spencer Leavitt George Quin, Andrey Feldman, Robert David Turner, Timothy Richard Tyhurst
  • Patent number: 8565428
    Abstract: A network device for building up a network connection via a high-definition multimedia interface, includes a scrambler, a descrambler, a comparator and a control unit. The scrambler is utilized for generating a transmission signal according to a first seed. The descrambler is for decoding a receiving signal to generate a second seed. The comparator is for generating a comparing result according to the first seed and the second seed. The control unit is for controlling the network connection according to the comparing result.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: October 22, 2013
    Assignee: Realtek Semiconductor Corp.
    Inventors: Liang-Wei Huang, Shieh-Hsing Kuo, Chun-Hung Liu, Kai-Wen Cheng
  • Patent number: 8566633
    Abstract: A method of dynamically allocating a task or a signal on a statically allocated and embedded software architecture of a vehicle includes identifying a faulty component. The faulty component may include a software component, a hardware component or a signal or communications link between components. Once the faulty component is identified, any tasks performed by or signals associated with the faulty component are identified, and the tasks performed by or the signals associated with the faulty component are re-allocated to an embedded standby component so that performance of the re-allocated task and/or signal for future system operations is performed by the standby component.
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: October 22, 2013
    Assignee: GM Global Technology Operations LLC
    Inventors: Thomas E. Fuhrman, Sandeep Menon
  • Publication number: 20130275801
    Abstract: A computer program product for performing error recovery is configured to perform a method that includes creating, by a processor, a recovery checkpoint. The processor is dynamically switched into a non-recoverable processing mode of operation based on creating the software recovery checkpoint. The non-recoverable processing mode of operation is a mode in which a subset of hardware error recovery resources are powered-down or re-purposed for instruction processing. It is determined, during the non-recoverable processing mode of operation, that a new software recovery checkpoint is required. Based on the determining that a new software recovery checkpoint is required, the processor is dynamically switched into a recoverable processing mode of operation. The recoverable processing mode of operation is a mode in which hardware error recovery resources, including at least one of the hardware error recovery resources in the subset, are purposed for hardware error recovery operations.
    Type: Application
    Filed: April 16, 2012
    Publication date: October 17, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Fadi Y. Busaba, Steven R. Carlough, Christopher A. Krygowski, Brian R. Prasky, Chung-Lung K. Shum
  • Publication number: 20130268798
    Abstract: The invention relates to a microprocessor system for executing software modules, at least some of which are security critical, within the scope of controlling functions or tasks assigned to the software modules, comprising an intrinsically safe microprocessor module having at least two microprocessor cores. At least one further intrinsically safe microprocessor module having at least two microprocessor cores is provided. At least two microprocessor modules are connected via a bus system, at least two software modules are provided which execute functions, at least some of which overlap, the software modules having at least partially overlapping functions are distributed on a microprocessor module or n at least two microprocessor modules, and means for comparing or arbitrating events generated with the software modules for the identical functions are provided in order to detect software or hardware faults.
    Type: Application
    Filed: November 18, 2011
    Publication date: October 10, 2013
    Applicant: Continental Teve AG & Co. oHG
    Inventors: Kai Schade, Peter Zimmerschitt-Halbig, Andreas Heise
  • Publication number: 20130262913
    Abstract: The time in the chipset of backup resources is synchronized easily at the system time. An information processing apparatus including: an operational chipset which includes a first Real Time Clock (RTC); a backup chipset which includes a second RTC: a third RTC which times system time; a difference time calculation unit which calculates a difference time between a system time periodically notified of from the first RTC of the operational chipset and the system time which the third RTC times; a holding unit which holds the difference time; a calculation unit which calculates a temporary system time which is set to the second RTC of the backup chipset to which a chipset switching operated, based on the system time of the third RTC and the difference time at the time of the chipset switching; and a configuration unit which sets the temporary system time to the second RTC of the backup chipset.
    Type: Application
    Filed: March 18, 2013
    Publication date: October 3, 2013
    Applicant: NEC Corporation
    Inventor: Hiroki ARAI
  • Publication number: 20130262912
    Abstract: A computer node includes an integrated management module, a field-programmable gate array, and a plurality of individual hardware devices. The integrated management module receives a user identification and identifies an associated hardware configuration, wherein the hardware configuration identifies hardware devices to be powered off. The integrated management module may instruct the field-programmable gate array to use switches to power off the identified hardware devices without powering off other hardware devices.
    Type: Application
    Filed: April 2, 2012
    Publication date: October 3, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Shiva R. Dasari, Raghuswamyreddy Gundam, Newton P. Liu, Douglas W. Oliver, Terence Rodrigues, Mehul M. Shah, Wingcheung Tam
  • Patent number: 8549364
    Abstract: In one or more embodiments of the invention, communication among host agents providing high availability in a computer cluster is implemented by reading and writing to files on a shared data store. Each host agent holds a lock on a file on the shared data store corresponding to a liveness indicator for the host agent and a coordinator host agent periodically monitors the liveness indicators for host failures.
    Type: Grant
    Filed: February 18, 2009
    Date of Patent: October 1, 2013
    Assignee: VMware, Inc.
    Inventors: Elisha Ziskind, Marc Sevigny, Sridhar Rajagopal, Rostislav Vavrick, Ronald Passerini
  • Publication number: 20130254586
    Abstract: Various embodiments are described herein with regards to performing a selective fault recovery for an electronic device having a plurality of subsystems in which one of the subsystems has a fault. The selective fault recovery techniques described herein allow a user to use non-faulty subsystem of the electronic device while selective fault recovery is being conducted on the subsystem having the fault.
    Type: Application
    Filed: March 20, 2012
    Publication date: September 26, 2013
    Applicant: RESEARCH IN MOTION LIMITED
    Inventors: Lyall Kenneth Winger, Gregory Hall Ward, Mark David Mesaros
  • Publication number: 20130246838
    Abstract: A survey tool for use in a Recover to Cloud (R2C) replication service environment that determines configuration information automatically (such as through SNMP messaging or custom APIs) and stores it in a survey database. A Virtual Data Center (VDC) representation is then instantiated from the survey database, with the VDC being a virtual replica of the production environment including dormant Virtual Machine (VM) definition files, applications, storage requirements, VLANs firewalls, and the like. The survey tool determines the order in which the replicas are brought on line to ensure orderly recovery, determining the order in which each machine makes requests for connections to other machines.
    Type: Application
    Filed: March 16, 2012
    Publication date: September 19, 2013
    Inventor: Chandra Reddy
  • Publication number: 20130227334
    Abstract: Technologies are generally described for systems and methods effective to schedule repair (e.g., allocate repair resources, determine a repair sequence, etc.) of a system effected by a large-scale failure caused by a natural disaster, malicious attack, faulty components, or the like. In an example, the system can generate a schedule that indicates amounts of repair resources allocated for repair of specific components of a disrupted system as well as a time or sequence in which the components are to be repaired. The schedule, in some instance, can operate to maximize an amount of restoration, at each stage of a recovery process, relative to the characteristic of the disrupted system. For example, with a communications network as the disrupted system, the schedule can maximize the amount of total traffic flow capacity recovered after respective steps of the recovery process.
    Type: Application
    Filed: February 23, 2012
    Publication date: August 29, 2013
    Applicant: CITY UNIVERSITY OF HONG KONG
    Inventor: Jianping WANG
  • Publication number: 20130219211
    Abstract: A method, an apparatus and an article of manufacture for cloud-driven application execution. The method includes determining a plurality of attributes of a failed application, wherein the plurality of attributes comprises at least one policy context attribute and at least one context attribute, correlating each of the plurality of attributes to at least one alternative asset, wherein the at least one alternative asset is a part of an environment on which the failed application can be executed, using the plurality of attributes correlated to the at least one alternative asset to identify an alternative asset set of alternative assets, wherein the alternative asset set is capable of enabling an alternative environment on which to execute the failed application, and provisioning the alternative assets in the alternative asset set from at least one cloud network to create the alternative environment on which the failed application is executed.
    Type: Application
    Filed: February 17, 2012
    Publication date: August 22, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ramesh Gopinath, Andrzej Kochut, Kathiravan M. Ramaswami, Anca Sailer, Charles O. Schulz, Hidayatullah Shaikh
  • Patent number: 8516294
    Abstract: When a failure occurs in an LPAR on a physical computer under an SAN environment, a destination LPAR is set in another physical computer to enable migrating of the LPAR and setting change of a security function on the RAID apparatus side is not necessary. When a failure occurs in an LPAR generated on a physical computer under an SAN environment, configuration information including a unique ID (WWN) of the LPAR where the failure occurs is read, a destination LPAR is generated on another physical computer, and the read configuration information of the LPAR is set to the destination LPAR, thereby enabling migrating of the LPAR when the failure occurs, under the control of a management server.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: August 20, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Yukari Hatta, Hitoshi Ueno
  • Patent number: 8510479
    Abstract: A process control system is provided having a plurality of I/O devices in communication using a bus. A primary redundant I/O device and a secondary redundant I/O device are coupled to the bus, where the secondary redundant I/O device is programmed to detect a primary redundant I/O device fault. The secondary redundant I/O device, upon detecting the primary redundant I/O device fault, publishes a primary redundant I/O device fault message on the bus. The controller may deactivate the primary redundant I/O device and activate the secondary redundant I/O device responsive to the primary redundant I/O device fault message.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: August 13, 2013
    Assignee: Fisher-Rosemount Systems, Inc.
    Inventors: Michael D. Apel, Steve Dienstbier
  • Patent number: 8510590
    Abstract: Methods and systems for cluster resource management in virtualized computing environments are described. VM spares are used to reserve (or help discover or otherwise obtain) a set of computing resources for a VM. While VM spares may be used for a variety of scenarios, particular uses of VM spares include using spares to ensure resource availability for requests to power on VMs as well as for discovering, obtaining, and defragmenting the resources and VMs on a cluster, e.g., in response to requests to reserve resources for a VM or to respond to a notification of a failure for a given VM.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: August 13, 2013
    Assignee: VMware, Inc.
    Inventors: Minwen Ji, Elisha Ziskind, Anne Marie Holler
  • Patent number: 8510600
    Abstract: An automated method for provisioning a grid used to run a load test on a target website includes sending one or more requests in a multi-threaded manner to at least one cloud provider, the one or more requests for an allocation of N load server instances and M result server instances which comprise the grid. Requests received back from the cloud provider are also handled in a multi-threaded manner; any errors occurring during the allocation being corrected automatically. The N load server instances and the M result server instances are then verified to be operational and correctly running software deployed to provide defined test services. Errors identified during the verification are automatically corrected either by attempting to restart a failed instance or allocating a different instance.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: August 13, 2013
    Assignee: SOASTA, Inc.
    Inventors: Tal Broda, Matthew Solnit, Kenneth C. Gardner, Craig R. Powers, Michael Hemmert, Charles A. Vazac, Kendall Cosby
  • Publication number: 20130198557
    Abstract: A backup image generator can create a primary image and periodic delta images of all or part of a primary server. The images can be sent to a network attached storage device and one or more remote storage servers. In the event of a failure of the primary server, an updated primary image may be used to provide an up-to-date version of the primary system at a backup or other system. As a result, the primary data storage may be timely backed-up, recovered and restored with the possibility of providing server and business continuity in the event of a failure.
    Type: Application
    Filed: March 13, 2013
    Publication date: August 1, 2013
    Applicant: DSSDR, LLC
    Inventor: Andrew Bensinger
  • Patent number: 8489797
    Abstract: A computer implemented method, data processing system, and apparatus for hardware resource arbitration in a data processing environment having a plurality of logical partitions. A hypervisor receives a request for a hardware resource from a first logical partition, wherein the request corresponds to an operation. The hypervisor determines the hardware resource is free from contention by a second logical partition. The hypervisor writes the hardware resource to a hardware resource pool data structure, as associated with the first logical partition, in response to a determination the hardware resource is free. The hypervisor presents the hardware resource to the first logical partition. The hypervisor determines that the operation is complete. The hypervisor release the hardware resource from a hardware resource pool, responsive to the determination that the operation is complete.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: July 16, 2013
    Assignee: International Business Machines Corporation
    Inventors: Yogesh L. Hegde, Vijayaprasanna Laxmikanthappa, Jorge R. Nogueras
  • Patent number: 8484522
    Abstract: An apparatus, system, and method are disclosed for bad block remapping. A bad block identifier module identifies one or more data blocks on a solid-state storage element as bad blocks. A log update module writes at least a location of each bad block identified by the bad block identifier module into each of two or more redundant bad block logs. A bad block mapping module accesses at least one bad block log during a start-up operation to create in memory a bad block map. The bad block map includes a mapping between the bad block locations in the bad block log and a corresponding location of a replacement block for each bad block location. Data is stored in each replacement block instead of the corresponding bad block. The bad block mapping module creates the bad block map using one of a replacement block location and a bad block mapping algorithm.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: July 9, 2013
    Assignee: Fusion-io, Inc.
    Inventors: David Flynn, John Strasser, Jonathan Thatcher, David Atkisson, Michael Zappe, Joshua Aune, Kevin Vigor
  • Patent number: 8484503
    Abstract: Communication is arrested between a source data entity and a replicated data entity at a location declared in a DR mode. The DR mode is negotiated to a central replication management component as a DR mode entry event. The DR mode entry event is distributed, by the central replication management component, to each member in a shared group. The DR mode is enforced using at least one replication policy.
    Type: Grant
    Filed: August 18, 2010
    Date of Patent: July 9, 2013
    Assignee: International Business Machines Corporation
    Inventors: Shay H. Akirav, Yariv Bachar, Dov N. Hepner, Ofer Leneman, Gil E. Paz, Tzafrir Z. Taub
  • Publication number: 20130173952
    Abstract: An electronic device includes an internal storage module, a baseboard management controller (BMC) and a port. The internal storage module stores a first firmware and a boot application. The port connects to an external storage for storing a second firmware which is a backup of the first firmware. After the electronic device is powered on, the BMC runs the boot application to load the first firmware from the internal storage module. If the first firmware fails to load, the BMC copies the second firmware from the external storage to the internal storage module to replace the first firmware.
    Type: Application
    Filed: August 3, 2012
    Publication date: July 4, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventors: ZHENG-XIN GAO, XIAN-KUI CHEN
  • Patent number: 8479036
    Abstract: Communication is arrested between a source data entity and a replicated data entity at a location declared in a DR mode. The DR mode is negotiated to a central replication management component as a DR mode entry event. The DR mode entry event is distributed, by the central replication management component, to each member in a shared group. The DR mode is enforced using at least one replication policy.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: July 2, 2013
    Assignee: International Business Machines Corporation
    Inventors: Shay H. Akirav, Yariv Bachar, Dov N. Hepner, Ofer Leneman, Gil E. Paz, Tzafrir Z. Taub
  • Publication number: 20130166942
    Abstract: Techniques for managing a fused processing element are described. Embodiments receive streaming data to be processed by a plurality of processing elements. Additionally, an operator graph of the plurality of processing elements is established. The operator graph defines at least one execution path and wherein at least one of the processing elements of the operator graph is configured to receive data from at least one upstream processing element and transmit data to at least one downstream processing element. Embodiments detect an error condition has been satisfied at a first one of the plurality of processing elements, wherein the first processing element contains a plurality of fused operators. At least one of the plurality of fused operators is selected for removal from the first processing element. Embodiments then remove the selected at least one fused operator from the first processing element.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 27, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael J. Branson, John M. Santosuosso, Brandon W. Schulz
  • Patent number: 8473774
    Abstract: A networking system architecture includes a plurality of main devices, one of the main devices acts as a master main device, and the other main devices act as slave main devices. If the master main device malfunctions, one of the slave main devices substitutes for the master main device to act as a new master main device. Priorities are set to the main devices, respectively. If a current master main device malfunctions, the current master main device may be replaced by a new master main device having the highest priority among the other main devices.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: June 25, 2013
    Assignee: NEC Infrontia Corporation
    Inventor: Akinori Hikabe
  • Patent number: 8468385
    Abstract: Method and system for managing error related events while a system is processing input/output (“I/O”) requests for accessing storage space is provided. Various components are involved in processing the I/O requests. Some of these components may also have sub-components. Events related to the various components are classified with respect to their severity levels. Threshold values for a frequency of these events is set and stored in a data structure at a memory location. When an event occurs, the severity level and the threshold value for the event are determined from the data structure. The actual frequency is then compared to the stored threshold value. If the threshold value is violated and there is an alternate path to route the I/O request, then the affected component is restricted and the alternate path is used to route the I/O request.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: June 18, 2013
    Assignee: Netapp, Inc.
    Inventors: Sridhar Balachandriah, Bhaskar Singhal
  • Publication number: 20130145204
    Abstract: A system for applying a recovery mechanism to a network of medical diagnostics instruments is provided herein. The system includes the following: a plurality of medical diagnostics instruments, each associated with a network connected component; a plurality of communication modules, each associated with a corresponding one of the plurality of network connected components, wherein each one of the plurality of communication modules is arranged to report on malfunctioning components that are network connected with the corresponding component, and a recovery module, configured to: (i) obtain reports from the communication modules; (ii) re-establish the malfunctioning components; and (iii) notify all communication modules of the re-establishment of the malfunctioning components, wherein the communication modules are further configured to re-establish connection between the corresponding components and the re-established components.
    Type: Application
    Filed: December 6, 2011
    Publication date: June 6, 2013
    Applicant: BIO-RAD LABORATORIES
    Inventors: Shlomo Gabel, Zvlya Tamir
  • Publication number: 20130145203
    Abstract: A stream application may allocate processing elements to one or more compute nodes (or hosts) to achieve a desired optimization goal. Each optimization mode may define processing element selection criteria and/or host selection criteria. When allocating a processing element to a host, a scheduler may place each processing element individually. Accordingly, the scheduler may use the processing element selection criteria for selecting which processing element in the stream application to allocate next. The scheduler may then determine, based on one or more constraints, which host the processing element can be placed on. If the scheduler determines that multiple hosts are suitable candidates for the processing element, it may use the host selection criteria to pick one of the candidate hosts that further optimize the stream application to meet the desired goal.
    Type: Application
    Filed: December 1, 2011
    Publication date: June 6, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Bradley W. Fawcett
  • Patent number: 8458509
    Abstract: A method, article of manufacture, and apparatus for processing data. In some embodiments, this includes detecting a faulty interface, removing outstanding jobs from the faulty interface, distributing the outstanding jobs to other interfaces. In some embodiments, distributing the outstanding jobs includes distributing a first outstanding job to a first lowest counter interface. In some embodiments, a second outstanding job is distributed to a second lowest counter interface.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: June 4, 2013
    Assignee: EMC Corporation
    Inventors: Saradhi S. Sreegiriraju, Ornat S. Freitas
  • Patent number: 8453007
    Abstract: A storage device including a plurality of storage units for storing data dispersively among the storage units, includes: a processor for controlling boot-up of the storage units; and a memory for storing operation history indicative of the sequence of any failure causing any of the storage units to become inoperative, the processor controlling reboot-up of the storage units, when a plurality of the storage units becomes inoperative on account of a plurality of failures, in accordance with process including: determining the order of the reboot up of the storage units that is reversal of the sequence of the failures causing the storage units to become inoperative in reference to the operation history in the memory; rebooting the inoperative storage units successively in accordance with the determined order.
    Type: Grant
    Filed: July 10, 2009
    Date of Patent: May 28, 2013
    Assignee: Fujitsu Limited
    Inventor: Hiroshi Sakurai
  • Patent number: 8452987
    Abstract: Methods and systems for software security in a secure communication system are disclosed and may include verifying downloaded code in a reprogrammable system and reloading prestored unmodifiable first stage code upon failure. The prestored unmodifiable first stage code, which may comprise boot code for the reprogrammable system, may be stored in locked flash, and the downloaded software code may be stored in unlocked flash. The downloaded software code may be verified by comparing a signature of the downloaded code to a private key. A first sticky bit may be utilized to indicate a failure of the verification and a second sticky bit may be utilized to indicate passing of the verification and the use of the downloaded software code. Whether to reset the reprogrammable system and reload the prestored unmodifiable first stage code may be determined from within the reprogrammable system, which may comprise a set-top box.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: May 28, 2013
    Assignee: Broadcom Corporation
    Inventors: Xuemin Chen, Andrew Dellow, Iue-Shuenn Chen, Stephane Rodgers
  • Patent number: 8443227
    Abstract: A processor includes a microarchitecture for working around a processing flaw, the microarchitecture including: at least one detector adapted for detecting a predetermined state associated with the processing flaw; and at least one mechanism to modify default processor processing behavior; and upon modification of processing behavior, the processing of an instruction involving the processing flaw can be completed by avoiding the processing flaw.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: May 14, 2013
    Assignee: International Business Machines Corporation
    Inventors: Steven R. Carlough, Adam B. Collura, Wen H. Li, Eric M. Schwarz, Chung-Lung Kevin Shum
  • Patent number: 8443117
    Abstract: A connection expansion device connected to devices includes a plurality of ports to which devices are connected, a storage unit configured to record device information obtained from each port, and a processing unit configured to specify, based on the device information, a port in which an abnormal device exists, invalidate device information belonging to the port, and cause the storage unit to hold device information of a normal device.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: May 14, 2013
    Assignee: Fujitsu Limited
    Inventors: Atsushi Katano, Atsuhiro Otaka, Nobuyuki Honjo
  • Publication number: 20130103974
    Abstract: Managing firmware in a computing system storing a plurality of different firmware images for the same firmware includes: calculating, for each firmware image in dependence upon a plurality of predefined factors, a preference score; responsive to a failure of a particular firmware image, selecting a firmware image having a highest preference score; and failing over to the selected firmware image.
    Type: Application
    Filed: October 25, 2011
    Publication date: April 25, 2013
    Applicant: International Business Machines Corporation
    Inventors: Fred A. Bower, III, Michael H. Nolterieke, William G. Pagan, Paul B. Tippett
  • Patent number: 8429390
    Abstract: A method for performing a quick boot and a general boot at a basic input output system (BIOS) stage is described. A computer is powered on. An embedded controller firmware or a BIOS determines whether a quick boot key is pressed. If the quick boot key is not pressed, a boot flag is changed from Quick Boot to General Boot. If the quick boot key is pressed, the BIOS determines whether the boot flag is set to Quick Boot. If it is determined that the boot flag is set to Quick Boot, an initialization of drivers preset by the quick boot is performed, and uninitialized drivers are initialized at a stage when an operating system is started. If it is determined that the boot flag is set to General Boot, an initialization of all drivers is performed.
    Type: Grant
    Filed: December 24, 2009
    Date of Patent: April 23, 2013
    Assignee: Insyde Software Corp.
    Inventors: David Yu, Lawrence Chiu, Jeremy Wang, Sam Lo, Giant Liang, Susan Su
  • Patent number: 8429449
    Abstract: Systems and methods for reducing risk of service interruptions for one or more virtual machines (VMs) in a computing environment are provided. The method comprises computing a placement scheme for placing at least one VM on one or more hosts according to a set of placement constraints defined for the VM, wherein the set of placement constraints comprises at least one availability constraint defined for the VM, wherein the availability constraint designates a N resiliency level, wherein N corresponds to number of host failures that may occur before the services provided by the VM are interrupted.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: April 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: Ofer Biran, Erez Hadad, Elliot K Kolodner, Dean H Lorenz, Yosef Moatti
  • Patent number: 8429443
    Abstract: When a primary computer is taken over to a secondary computer in a redundancy configuration computer system where booting is performed via a storage area network (SAN), a management server delivers an information collecting/setting program to the secondary computer before the user's operating system of the secondary computer is started. This program assigns a unique ID (World Wide Name), assigned to the fiber channel port of the primary computer, to the fiber channel port of the secondary computer to allow a software image to be taken over from the primary computer to the secondary computer.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: April 23, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuhiro Goto, Kazuhiro Adachi
  • Patent number: 8429447
    Abstract: A suite of network-based services, such as the services corresponding to Microsoft® SharePoint™, are provided to users with high availability. The suite of network-based services may include browser-based collaboration functions, process management functions, index and search functions, document-management functions, and/or other functions. In particular, the indexing service associated with the suite of network-based services may be provided with high availability.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: April 23, 2013
    Assignee: CA, Inc.
    Inventors: Hailin Peng, Zhenghua Xu, Xiaowei Yuan, Dongzhu Shi
  • Publication number: 20130097455
    Abstract: A system for implementing interconnection fault tolerance between CPUs, a first CPU and a second CPU implements interconnection through a first CPU interconnect device and a second CPU interconnect device. The system adds a data channel between a first SerDes interface of the first CPU interconnect device and a second SerDes interface of the second CPU interconnect device, and transmits link connection state information and a link control signal through the added data channel. The system monitors a link state of any one link in a CPU interconnection system, transmits the link state through the added data channel, recovers any one of the connection links when determining whether any one of the first connection link, the second connection link and the third connection link is faulty.
    Type: Application
    Filed: December 6, 2012
    Publication date: April 18, 2013
    Applicant: Huawei Technologies Co., Ltd.
    Inventor: Huawei Technologies Co., Ltd.
  • Patent number: 8423816
    Abstract: In a computer system wherein plural servers are connected with an external disk device via a network, each server incorporates therein a logic partition module for configuring at least one logic partition in the server, and the operating system stored in the logic partition is booted by the boot disk of an external disk device, the failover operation is performed only for the logic partition affected by a failure when the task being executed by a working server is taken over by another server at the time of the failure occurring in the working server.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: April 16, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Shingo Katano, Yoshifumi Takamoto, Keisuke Hatasaki
  • Patent number: 8423162
    Abstract: An information processing system including a plurality of server apparatuses coupled to one another, wherein failover is executed. A management server is coupled to the server apparatuses, and is configured to, when detecting occurrence of a failure in an active server apparatus, execute failover from the active server apparatus to a standby server apparatus after turning on a power supply of the standby server apparatus. The management server is enabled to acquire information on the standby server apparatus after turning on the power supply of the standby server apparatus, turn off the power supply of the standby server apparatus after acquiring the information, and, based on the acquired information, judge whether failover to the standby server apparatus can be executed.
    Type: Grant
    Filed: October 31, 2011
    Date of Patent: April 16, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Masayuki Fukuyama, Jun Nakayama, Kouji Masuda
  • Publication number: 20130091376
    Abstract: A method, system, and computer program product include generating a database copy from a database of a primary virtual machine (VM), provisioning a standby VM with the database copy, detecting a failure associated with the database, and promoting the standby VM to replace the primary VM.
    Type: Application
    Filed: October 5, 2011
    Publication date: April 11, 2013
    Applicant: International Business Machines Corporation
    Inventors: Steve RASPUDIC, Matthew David Patrick Van Dijk
  • Publication number: 20130091335
    Abstract: A computer-implemented method, computer program product and data processing system provide checkpoint high-available for an application in a virtualized environment with reduced network demands. An application executes on a primary host machine comprising a first virtual machine. A virtualization module receives a designation from the application of a portion of the memory of the first virtual machine as purgeable memory, wherein the purgeable memory can be reconstructed by the application when the purgeable memory is unavailable. Changes are tracked to a processor state and to a remaining portion that is not purgeable memory and the changes are periodically forwarded at checkpoints to a secondary host machine. In response to an occurrence of a failure condition on the first virtual machine, the secondary host machine is signaled to continue execution of the application by using the forwarded changes to the remaining portion of the memory and by reconstructing the purgeable memory.
    Type: Application
    Filed: October 5, 2011
    Publication date: April 11, 2013
    Applicant: IBM CORPORATION
    Inventors: James Mulcahy, Geraint North