Dummy wafer

- Tokyo Electron Limited
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Description

FIG. 1 is a top plan view of a dummy wafer showing our new design;

FIG. 2 is a front view thereof;

FIG. 3 is an enlarged portion view taken along lines 3-3 in FIG. 1; and,

FIG. 4 is a cross-sectional view taken along line 4-4 in FIG. 3.

The broken lines shown in the drawings represent portions of the dummy wafer that form no part of the claimed design. Right, left and back views of the dummy wafer shown in FIG. 1 have been omitted because they are the same as the front view. The bottom view of the dummy wafer shown in FIG. 1 has been omitted because it forms no part of the claimed design.

Claims

The ornamental design for a dummy wafer, as shown and described.

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Patent History
Patent number: D785576
Type: Grant
Filed: Apr 24, 2015
Date of Patent: May 2, 2017
Assignee: Tokyo Electron Limited (Tokyo)
Inventors: Yutaka Motoyama (Iwate), Kohei Fukushima (Iwate)
Primary Examiner: Elizabeth J Oswecki
Application Number: 29/524,898