Abstract: According to an embodiment, a semiconductor light emitting device is configured to emit light by energy relaxation of an electron between subbands of a plurality of quantum wells. The device includes an active layer and at least a pair of cladding layers. The active layer is provided in a stripe shape extending in a direction parallel to an emission direction of the light, and includes the plurality of quantum wells; and the active layer emits the light with a wavelength of 10 ?m or more. Each of the cladding layers is provided both on and under the active layer respectively and have a lower refractive index than the active layer. At least one portion of the cladding layers contains a material having a different lattice constant from the active layer and has a lower optical absorption at a wavelength of the light than the other portion.

Abstract: The disclosure relates to a nitride based semiconductor light emitting device with improved luminescence efficiency by increasing a recombination rate of electrons and holes contributing to luminescence, which results from matching the spatial distribution of electron and hole wave functions. The nitride based semiconductor light emitting device according to the present invention includes an n-type nitride layer, an active layer formed on the n-type nitride layer, and a p-type nitride layer formed on the active layer. At this stage, a strain control layer, and the at least one layer has a larger energy bandgap than a quantum well layer in the active layer. The strain control layer is disposed in an area where the quantum well layer of the active layer is formed. Moreover, an energy bandgap of the strain control layer is less than that of quantum barrier of the active layer.

Abstract: For a nitride semiconductor light emitting device, a c-axis vector of hexagonal GaN of a support substrate is inclined to an X-axis direction with respect to a normal axis Nx normal to a primary surface. In a semiconductor region an active layer, a first gallium nitride-based semiconductor layer, an electron block layer, and a second gallium nitride-based semiconductor layer are arranged along the normal axis on the primary surface of the support substrate. A p-type cladding layer is comprised of AlGaN, and the electron block layer is comprised of AlGaN. The electron block layer is subject to tensile strain in the X-axis direction. The first gallium nitride-based semiconductor layer is subject to compressive strain in the X-axis direction. The misfit dislocation density at an interface is smaller than that at an interface. A barrier to electrons at the interface is raised by piezoelectric polarization.

Abstract: A light emitting device may include a light emitting structure that includes a first semiconductor layer, a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the active layer includes a light emitting layer adjacent to the second semiconductor layer and that includes a well layer and a barrier layer and a super-lattice layer between the light emitting layer and the first semiconductor layer, the super-lattice layer including at least six pairs of a first layer and a second layer, wherein a composition of the first layer includes indium (In) and the second layer includes indium (In), and the composition of the first layer is different from the composition of the second layer.

Abstract: Provided are a light emitting device, a method of fabricating the light emitting device, a light emitting device package, and a lighting system. The light emitting device comprises a substrate, a first semiconductor layer containing indium (In) over the substrate, and a light emitting structure over the first semiconductor layer. A dislocation mode is disposed on a top surface of the first semiconductor layer.

Abstract: An example electronic device includes a region formed from an array of dissipative quantum dots. The quantum dots are arranged according to their electronic structure to provide a tailored asymmetry in current flow through the region.

Abstract: Briefly described, embodiments of the present disclosure relate to structures including single-walled carbon nanotube/quantum dot networks, devices including the structures, and methods of making devices including the single-walled carbon nanotube/quantum dot networks.

Abstract: A III nitride epitaxial substrate which makes it possible to obtain a deep ultraviolet light emitting device with improved light output power is provided. A III nitride epitaxial substrate includes a substrate, an AlN buffer layer, a first superlattice laminate, a second superlattice laminate and a III nitride laminate in this order. The III nitride laminate includes an active layer including an Al?Ga1-?N (0.03??) layer. The first superlattice laminate includes AlaGa1-aN layers and AlbGa1-bN (0.9<b?1) layers which are alternately stacked, where ?(alpha)<a and a<b. The second superlattice laminate includes repeated layer sets each having an AlxGa1-xN layer, an AlyGa1-yN layer, and an AlzGa1-zN (0.9<z?1) layer, where ?(alpha)<x and x<y<z.

Abstract: A semiconductor device according to an exemplary embodiment comprises a substrate, a middle layer comprising a first semiconductor layer disposed on the substrate and comprising AlxGa1-xN (0?x?1) doped with a first dopant and a second semiconductor layer disposed on the first semiconductor layer and comprising undoped gallium nitride (GaN) and a drive unit disposed on the second semiconductor layer.

Abstract: A semiconductor light emitting device includes a first nitride semiconductor layer, a dopant doped semiconductor layer on the first nitride semiconductor layer, an active layer on the dopant doped semiconductor layer, a delta doped layer on the active layer, a superlattice structure on the delta doped layer, an undoped layer on the superlattice layer, a second nitride semiconductor layer including a first n-type dopant, a third nitride semiconductor layer including a second n-type dopant, and a fourth nitride semiconductor layer including a third n-type dopant.

Abstract: A semiconductor light emitting device including a first semiconductor layer, an active layer formed on the first semiconductor layer, a second semiconductor layer formed on the active layer, and at least one SiNx cluster layer formed between the first semiconductor layer and the second semiconductor layer.

Abstract: A two-color detector includes a first absorber layer. The first absorber layer exhibits a first valence band energy characterized by a first valence band energy function. A barrier layer adjoins the first absorber layer at a first interface. The barrier layer exhibits a second valence band energy characterized by a second valence band energy function. The barrier layer also adjoins a second absorber layer at a second interface. The second absorber layer exhibits a third valence band energy characterized by a third valence band energy function. The first and second valence band energy functions are substantially functionally or physically continuous at the first interface and the second and third valence band energy functions are substantially functionally or physically continuous at the second interface.

Abstract: A light emitting element includes a semiconductor laminate structure including a first semiconductor layer of a first conductivity type, a light emitting layer, and a second semiconductor layer of a second conductivity type different from the first conductivity type, a part of the second semiconductor layer and the light emitting layer being removed to expose a part of the first semiconductor layer, a first reflecting layer on the semiconductor laminate structure and including an opening, the opening being formed in the exposed part of the first semiconductor layer, a transparent wiring electrode for carrier injection into the first semiconductor layer or the second semiconductor layer through the opening, a second reflecting layer formed on the transparent wiring electrode and covering a part of the opening so as to reflect light emitted from the light emitting layer and passing through the opening back to the first semiconductor layer.

Abstract: To provide an epitaxial substrate for electronic devices, in which current flows in a lateral direction, which enables accurate measurement of the sheet resistance of HEMTs without contact, and to provide a method of efficiently producing the epitaxial substrate for electronic devices, the method characteristically includes the steps of forming a barrier layer against impurity diffusion on one surface of a high-resistance Si-single crystal substrate, forming a buffer as an insulating layer on the other surface of the high-resistance Si-single crystal substrate, producing an epitaxial substrate by epitaxially growing a plurality of III-nitride layers on the buffer to form a main laminate, and measuring resistance of the main laminate of the epitaxial substrate without contact.

Abstract: A method of providing miniaturized size down to nanoscale electronic materials, which may be easily incorporated into the future ever-scaling down power electronics, microelectronics and nanoelectronics device systems, is disclosed. A linear or nonlinear nanoparticle (nanowire) junction design that allows precise controllability over an electronic device (e.g., a varistor) performance, which is typically difficult for the traditional sintered bulk varistor, is also disclosed. A localized doping and chemical modulation, across junctions allows flexible and tunable design over the nanoscale grain boundary band engineering is further disclosed. Furthermore, a method of operating memory, using electrostatic potential modulated coding and decoding across periodic nanoparticle grain boundary linearly, is also disclosed.

Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer and a light emitting layer. The emitting layer is provided between the n-type layer and the p-type layer, and includes a plurality of barrier layers and a plurality of well layers, being alternately stacked. The p-side barrier layer being closest to the p-type layer among the plurality of barrier layer includes a first layer and a second layer, containing group III elements. An In composition ratio in the group III elements of the second layer is higher than an In composition ratio in the group III elements of the first layer. An average In composition ratio of the p-side layer is higher than an average In composition ratio of an n-side barrier layer that is closest to the n-type layer among the plurality of barrier layers.

Abstract: A semiconductor light emitting device includes a first layer including at least one of n-type GaN and n-type AlGaN; a second layer including Mg-containing p-type AlGaN; and a light emitting section provided between the first and second layers. The light emitting section includes barrier layers of Si-containing AlxGa1-x-yInyN (0?x, 0?y, x+y?1), and a well layer provided between the barrier layers and made of GaInN or AlGaInN. The barrier layers have a nearest barrier layer nearest to the second layer among the barrier layers and a far barrier layer. The nearest barrier layer includes a first portion made of Si-containing AlxGa1-x-yInyN (0?x, 0?y, x+y?1), and a second portion provided between the first portion and the second layer and made of AlxGa1-x-yInyN (0?x, 0?y, x+y?1). The Si concentration in the second portion is lower than those in the first portion and in the far barrier layer.

Abstract: A light emitting diode structure of (Al,Ga,In)N thin films grown on a gallium nitride (GaN) semipolar substrate by metal organic chemical vapor deposition (MOCVD) that exhibits reduced droop. The device structure includes a quantum well (QW) active region of two or more periods, n-type superlattice layers (n-SLs) located below the QW active region, and p-type superlattice layers (p-SLs) above the QW active region. The present invention also encompasses a method of fabricating such a device.

Abstract: A light emitting diode (LED) and a method for fabricating the same, capable of improving brightness by forming a InGaN layer having a low concentration of indium, and whose lattice constant is similar to that of an active layer of the LED, is provided. The LED includes: a buffer layer disposed on a sapphire substrate; a GaN layer disposed on the buffer layer; a doped GaN layer disposed on the GaN layer; a GaN layer having indium disposed on the GaN layer; an active layer disposed on the GaN layer having indium; and a P-type GaN disposed on the active layer. Here, an empirical formula of the GaN layer having indium is given by In(x)Ga(1?x)N and a range of x is given by 0<x<2, and a thickness of the GaN layer having indium is 50-200 ?.

Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting portion. The light emitting portion is provided between the semiconductor layers and includes barrier layers and well layers alternately stacked. An n-side end well layer which is closest to the n-type semiconductor layer contains InwnGa1-wnN and has a layer thickness twn. An n-side end barrier layer which is closest to the n-type semiconductor layer contains InbnGa1-bnN and has a layer thickness tbn. A p-side end well layer which is closest to the p-type semiconductor layer contains InwpGa1-wpN and has a layer thickness twp. A p-side end barrier layer which is closest to the p-type semiconductor contains InbpGa1-bpN and has a layer thickness tbp. A value of (wp×twp+bp×tbp)/(twp+tbp) is higher than (wn×twn+bn×tbn)/(twn+tbn) and is not higher than 5 times (wn×twn+bn×tbn)/(twn+tbn).

Abstract: Exemplary embodiments provide semiconductor nanowires and nanowire devices/applications and methods for their formation. In embodiments, in-plane nanowires can be epitaxially grown on a patterned substrate, which are more favorable than vertical ones for device processing and three-dimensional (3D) integrated circuits. In embodiments, the in-plane nanowire can be formed by selective epitaxy utilizing lateral overgrowth and faceting of an epilayer initially grown in a one-dimensional (1D) nanoscale opening. In embodiments, optical, electrical, and thermal connections can be established and controlled between the nanowire, the substrate, and additional electrical or optical components for better device and system performance.

Abstract: Disclosed is a light-emitting diode, which has a red and infrared emitting wavelength, excellent monochromatism characteristics, and high output and high efficiency and excellent humidity resistance. The light-emitting diode is provided with: a light-emitting section, which includes an active layer having a quantum well structure and formed by laminating alternately a well layer which comprises a composition expressed by the composition formula of (AlX1 Ga1-X1) As (0?X1?1) and a barrier layer which comprises a composition expressed by the composition formula of (AlX2 Ga1-X2) As (0<2?1), and a first clad layer and a second clad layer, between both of which the active layer is sandwiched, wherein the first clad layer and the second clad layer comprise a composition expressed by the composition formula of (AlX3Ga1-X)Y1 In1-Y1 P (0?X3?1, 0<Y1?1); a current diffusion layer formed on the light-emitting section; and a functional substrate bonded to the current diffusion layer.

Abstract: A vertical geometry light emitting diode with a strain relieved superlattice layer on a substrate comprising doped AlXInYGa1-X-YN. A first doped layer is on the strain relieved superlattice layer AlXInYGa1-X-YN and the first doped layer has a first conductivity. A multilayer quantum well is on the first doped layer comprising alternating layers quantum wells and barrier layers. The multilayer quantum well terminates with a barrier layer on each side thereof. A second doped layer is on the quantum well wherein the second doped layer comprises AlXInYGa1-X-YN and said second doped layer has a different conductivity than said first doped layer. A contact layer is on the third doped layer and the contact layer has a different conductivity than the third doped layer. A metallic contact is in a vertical geometry orientation.

Abstract: A Group III nitride semiconductor light-emitting device includes a sapphire substrate; and an n contact layer, an n cladding layer, a light-emitting layer, a p cladding layer, and a p contact layer, each of the layers being formed of Group III nitride semiconductor, are sequentially deposited on the sapphire substrate. The n cladding layer includes two layers of a high impurity concentration layer and a low impurity concentration layer in this order on the n contact layer, and the low impurity concentration layer is in contact with the light-emitting layer. The low impurity concentration layer is a layer having a lower n-type impurity concentration than that of the high impurity concentration layer, which has an n-type impurity concentration of 1/1000 to 1/100 of the p-type impurity concentration of the p cladding layer and a thickness of 10 ? to 400 ?.

Abstract: Nanostructures are joined using one or more of a variety of materials and approaches. As consistent with various example embodiments, two or more nanostructures are joined at a junction between the nanostructures. The nanostructures may touch or be nearly touching at the junction, and a joining material is deposited and nucleates at the junction to couple the nanostructures together. In various applications, the nucleated joining material facilitates conductivity (thermal and/or electric) between the nanostructures. In some embodiments, the joining material further enhances conductivity of the nanostructures themselves, such as by growing along the nanostructures and/or doping the nanostructures.

Abstract: A superlattice structure, and a semiconductor device including the same, include a plurality of pairs of layers are in a pattern repeated at least two times, in which a first layer and a second layer constitute a pair, the first layer is formed of AlxInyGa1-x-yN (where 0?x and y?1), the second layer is formed of AlaInbGa1-a-bN (where 0?a, b?1 and x?a), the first and second layers have the same thickness, and a total thickness of each of the plurality of pairs of layers is different than each other.

Abstract: A semiconductor device may include a doped semiconductor region having a modulated dopant concentration. The doped semiconductor region may be a silicon doped Group III nitride semiconductor region with a dopant concentration of silicon being modulated in the Group III nitride semiconductor region. In addition, a semiconductor active region may be configured to generate light responsive to an electrical signal therethrough. Related methods, devices, and structures are also discussed.

Abstract: Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.

Abstract: A semiconductor emitter, or a precursor therefor, has a substrate and one or more textured semiconductor layers deposited onto the substrate in a nonpolar orientation. The textured layers enhance light extraction, and the use of nonpolar orientation greatly enhances internal quantum efficiency compared to conventional devices. Both the internal and external quantum efficiencies of emitters of the invention can be 70-80% or higher. The invention provides highly efficient light emitting diodes suitable for solid state lighting.

Abstract: A light emitting diode (LED) for minimizing crystal defects in an active region and enhancing recombination efficiency of electrons and holes in the active region includes non-polar GaN-based semiconductor layers grown on a non-polar substrate. The semiconductor layers include a non-polar N-type semiconductor layer, a non-polar P-type semiconductor layer, and non-polar active region layers positioned between the N-type semiconductor layer and the P-type semiconductor layer. The non-polar active region layers include a well layer and a barrier layer with a superlattice structure.

Abstract: Growth of thermoelectric materials in the form of quantum well superlattices on three-dimensionally structured substrates provide the means to achieve high conversion efficiency of the thermoelectric module combined with inexpensiveness of fabrication and compatibility with large scale production. Thermoelectric devices utilizing thermoelectric materials in the form of quantum well semiconductor superlattices grown on three-dimensionally structured substrates provide improved thermoelectric characteristics that can be used for power generation, cooling and other applications.

Abstract: A superlattice structure includes a plurality of quantum-dot nanowires extending in a substantially vertical direction from a plane region. The quantum-dot nanowires have a structure of barrier layers and quantum-dot layers alternately stacked on the plane region, and the quantum-dot nanowires are substantially the same in diameter in a stacking direction and substantially uniformly arranged at an area density of 4 nanowires/?m2 or more.

Abstract: A light emitting device may include a first conductive semiconductor layer, an active layer adjacent to the first conductive semiconductor layer and a second conductive semiconductor layer adjacent to the active layer. The active layer may include a first quantum well layer, a second quantum well layer and a barrier layer between the first quantum well layer and the second quantum well layer. The first quantum well layer may include a first plurality of sub-barrier layers and a first plurality of sub-quantum well layers, and the second quantum well layer may include a second plurality of sub-barrier layers and a second plurality of sub-quantum well layers. A bandgap of the first quantum well layer may be different than a bandgap of the second quantum well layer.

Abstract: Group III nitride based light emitting devices and methods of fabricating Group III nitride based light emitting devices are provided. The emitting devices include an n-type Group III nitride layer, a Group III nitride based active region on the n-type Group III nitride layer and comprising at least one quantum well structure, a Group III nitride layer including indium on the active region, a p-type Group III nitride layer including aluminum on the Group III nitride layer including indium, a first contact on the n-type Group III nitride layer and a second contact on the p-type Group III nitride layer. The Group III nitride layer including indium may also include aluminum.

Abstract: A semiconductor device includes a p-type semiconductor layer, an n-type semiconductor layer, a pn junction portion at which the p-type semiconductor layer and the n-type semiconductor layer are joined to each other, and a multiple quantum barrier structure or a multiple quantum well structure that is provided in at least one of the p-type semiconductor layer and the n-type semiconductor layer and functions as a barrier against at least one of electrons and holes upon biasing in a forward direction. Upon biasing in a reverse direction, a portion that allows band-to-band tunneling of electrons is formed at the pn junction portion.

Abstract: A light emitting device and method for making the same is disclosed. The light-emitting device includes an active layer sandwiched between a p-type semiconductor layer and an n-type semiconductor layer. The active layer emits lights when holes from the p-type semiconductor layer combine with electrons from the n-type semiconductor layer therein. The active layer includes a number of sub-layers and has a plurality of pits in which the side surfaces of a plurality of the sub-layers are in contact with the p-type semiconductor material such that holes from the p-type semiconductor material are injected into those sub-layers through the exposed side surfaces without passing through another sub-layer. The pits can be formed by utilizing dislocations in the n-type semiconductor layer and etching the active layer using an etching atmosphere in the same chamber used to deposit the semiconductor layers without removing the partially fabricated device.

Abstract: Embodiments of a material having low cross-plane thermal conductivity are provided. Preferably, the material is a thermoelectric material. In general, the thermoelectric material is designed to block phonons, which reduces or eliminates heat transport due to lattice vibrations and thus cross-plane thermal conductivity. By reducing the thermal conductivity of the thermoelectric material, a figure-of-merit (ZT) of the thermoelectric material is improved. In one embodiment, the thermoelectric material includes multiple superlattice periods that block, or reflect, multiple phonon wavelengths.

Abstract: A photoelectrode, methods of making and using, including systems for water-splitting are provided. The photoelectrode can be a semiconducting material having a photocatalyst such as nickel or nickel-molybdenum coated on the material. The photoelectrode includes an elongated axially integrated wire having at least two different wire compositions.

Abstract: An optical semiconductor device such as a light emitting diode is formed on a transparent substrate having formed thereon a template layer, such as AlN, which is transparent to the wavelength of emission of the optical device. A mixed alloy defect redirection region is provided over the template layer such that the composition of the defect redirection region approaches or matches the composition of the regions contiguous thereto. For example, the Al content of the defect redirection region may be tailored to provide a stepped or gradual Aluminum content from template to active layer. Strain-induced cracking and defect density are reduced or eliminated.

Abstract: Disclosed are a light emitting device and a method of manufacturing the same. The light emitting device includes a support substrate, a wafer bonding layer over the support substrate, a second electrode layer, which includes a current blocking layer and a reflective current spreading layer, over the wafer bonding layer, a current injection layer over the second electrode layer, a superlattice structure layer over the current injection layer, a second conductive semiconductor layer over the superlattice structure layer, an active layer over the second conductive semiconductor layer, a first conductive semiconductor layer over the active layer, and a first electrode layer over the first conductive semiconductor layer.

Abstract: A light emitting diode (LED) die includes a wavelength conversion layer having a base material, and a plurality of particles embedded in the base material including wavelength conversion particles, and reflective particles. A method for fabricating light emitting diode (LED) dice includes the steps of mixing the wavelength conversion particles in the base material to a first weight percentage, mixing the reflective particles in the base material to a second weight percentage, curing the base material to form a wavelength conversion layer having a selected thickness, and attaching the wavelength conversion layer to a die.

Abstract: A III nitride epitaxial substrate which makes it possible to obtain a deep ultraviolet light emitting device with improved light output power is provided. A III nitride epitaxial substrate 10 includes a substrate 12, an AlN buffer layer 14, a first superlattice laminate 16, a second superlattice laminate 18 and a III nitride laminate 20 in this order. The III nitride laminate 20 includes an active layer 24 including an Al?Ga1-?N (0.03??) layer. The first superlattice laminate 16 includes AlaGa1-aN layers 16A and AlbGa1-bN (0.9<b?1) layers 16B which are alternately stacked, where ?<a and a<b hold. The second superlattice laminate 18 includes repeated layer sets each having an AlxGa1-xN layer 18A, an AlyGa1-yN layer 18B, and an AlzGa1-zN (0.9<z?1) layer 18C, where ?<x and x<y<z hold.

Abstract: Methods of fabricating semiconductor structures and devices include bonding a seed structure to a substrate using a glass. The seed structure may comprise a crystal of semiconductor material. Thermal treatment of the seed structure bonded to the substrate using the glass may be utilized to control a strain state within the seed structure. The seed structure may be placed in a state of compressive strain at room temperature. The seed structure bonded to the substrate using the glass may be used for growth of semiconductor material, or, in additional methods, a seed structure may be bonded to a first substrate using a glass, thermally treated to control a strain state within the seed structure and a second substrate may be bonded to an opposite side of the seed structure using a non-glassy material.

Abstract: A method of providing miniaturized size down to nanoscale electronic materials, which may be easily incorporated into the future ever-scaling down power electronics, microelectronics and nanoelectronics device systems, is disclosed. A linear or nonlinear nanoparticle (nanowire) junction design that allows precise controllability over an electronic device (e.g., a varistor) performance, which is typically difficult for the traditional sintered bulk varistor, is also disclosed. A localized doping and chemical modulation, across junctions allows flexible and tunable design over the nanoscale grain boundary band engineering is further disclosed. Furthermore, a method of operating memory, using electrostatic potential modulated coding and decoding across periodic nanoparticle grain boundary linearly, is also disclosed.

Abstract: A circuit structure includes a substrate and a patterned dielectric layer over the substrate. The patterned dielectric layer includes a plurality of vias; and a number of group-III group-V (III-V) compound semiconductor layer. The III-V compound semiconductor layers include a first layer in the vias, a second layer over the first layer and the dielectric layer, and a bulk layer over the second layer.

Abstract: A multiple quantum well (MQW) structure for a light emitting diode and a method for fabricating a MQW structure for a light emitting diode are provided. The MQW structure comprises a plurality of quantum well structures, each quantum well structure comprising: a barrier layer; and a well layer having quantum dot nanostructures embedded therein formed on the barrier layer, the barrier and the well layer comprising a first metal-nitride based material; wherein at least one of the quantum well structures further comprises a capping layer formed on the well layer, the capping layer comprising a second metal-nitride based material having a different metal element compared to the first metal-nitride based material.

Abstract: An (Al,In,B,Ga)N based device including a plurality of (Al,In,B,Ga)N layers overlying a semi-polar or non-polar GaN substrate, wherein the (Al,In,B,Ga)N layers include at least a defected layer, a blocking layer, and an active region, the blocking layer is between the active region and the defected layer of the device, and the blocking layer has a larger band gap than surrounding layers to prevent carriers from escaping the active region to the defected layer. One or more (AlInGaN) device layers are above and/or below the (Al,In,B,Ga)N layers. Also described is a nonpolar or semipolar (Al,In,B,Ga)N based optoelectronic device including at least an active region, wherein stress relaxation (Misfit Dislocation formation) is at heterointerfaces above and/or below the active region.

Abstract: A solution for designing and/or fabricating a structure including a quantum well and an adjacent barrier is provided. A target band discontinuity between the quantum well and the adjacent barrier is selected to coincide with an activation energy of a dopant for the quantum well and/or barrier. For example, a target valence band discontinuity can be selected such that a dopant energy level of a dopant in the adjacent barrier coincides with a valence energy band edge for the quantum well and/or a ground state energy for free carriers in a valence energy band for the quantum well. The quantum well and the adjacent barrier can be formed such that the actual band discontinuity corresponds to the target band discontinuity.

Abstract: A light emitting diode structure and a method of forming a light emitting diode structure are provided. The structure includes a superlattice comprising, a first barrier layer; a first quantum well layer comprising a first metal-nitride based material formed on the first barrier layer; a second barrier layer formed on the first quantum well layer; and a second quantum well layer including the first metal-nitride based material formed on the second barrier layer; and wherein a difference between conduction band energy of the first quantum well layer and conduction band energy of the second quantum well layer is matched to a single or multiple longitudinal optical phonon energy for reducing electron kinetic energy in the superlattice.

Abstract: The present disclosure relates to a semiconductor light-emitting device which includes: a light-emitting layer composed of an active layer and of barrier layers formed as superlattice layers and disposed on and under the active layer to relieve stresses applied to the active layer and reduce the sum of electric fields generated in the active layer by the spontaneous polarization and the piezoelectric effect; an N-type contact layer injecting electrons into the light-emitting layer; and a P-type contact layer disposed opposite to the N-type contact layer with respect to the light-emitting layer and injecting holes into the light-emitting layer, wherein the active layer contains InGaN, and the barrier layers are formed by alternately stacking of an AlGaN thin film and an InGaN thin film.