Abstract: A method is provided for forming a semiconductor device. The method includes providing a substrate on a substrate holder in a process chamber, where the substrate contains a raised feature having a top surface and a sidewall surface, and flowing a process gas into the process chamber, where the process gas contains a hydrocarbon gas, an oxygen-containing gas, and optionally argon or helium. The method further includes maintaining a process gas pressure of at least 1 Torr in the process chamber, forming a plasma from the process gas using a microwave plasma source, and exposing the substrate to the plasma to deposit a conformal amorphous carbon film over the surfaces of the raised feature.

Abstract: An apparatus and method for fabricating a semiconductor device using a 4-way valve with improved purge efficiency by improving a gas valve system by preventing dead volume from occurring are provided. The apparatus includes a reaction chamber in which a substrate is processed to fabricate a semiconductor device; a first processing gas supply pipe supplying a first processing gas into the reaction chamber; a 4-way valve having a first inlet, a second inlet, a first outlet, and a second outlet and installed at the first processing gas supply pipe such that the first inlet and the first outlet are connected to the first processing gas supply pipe; a second processing gas supply pipe connected to the second inlet of the 4-way valve to supply a second processing gas; a bypass connected to the second outlet of the 4-way valve; and a gate valve installed at the bypass.

Abstract: The invention relates to a multilayer body arrangement, which comprises at least two multilayer bodies each having at least one surface to be processed as well as at least one device for positioning the multilayer bodies, wherein the device is configured such that the respective surfaces to be processed are opposite each other and thus form a quasi-closed processing space disposed between the surfaces, in which the processing occurs. It further relates to a system for processing multilayer bodies with such a multilayer body arrangement, as well as a method for processing multilayer bodies, wherein the multilayer bodies are disposed such that the respective surfaces to be processed are opposite each other and thus form a quasi-closed processing space disposed between the surfaces, in which the processing occurs.

Abstract: A chemical vapor deposition (CVD) method includes forming a first semiconductor layer on a substrate that is mounted on a satellite disk at a first process temperature; and forming a second semiconductor layer on the first semiconductor layer at a second process temperature. Also, a method of manufacturing a light-emitting device (LED) includes: forming a quantum well layer on a substrate that is mounted on a satellite disk at a first process temperature; and forming a quantum barrier layer on the quantum well layer at a second process temperature.

Abstract: The present invention relates to a method of manufacturing a semiconductor device by which the length of nanowires perpendicularly formed can be fabricated with high reproducibility. The method of manufacturing a semiconductor device includes the steps of forming a first layer; forming a stop layer on the first layer, the stop layer having a higher Young's modulus than the first layer; forming a recess by partially removing the first layer and the stop layer; growing nanowires in the recess; forming a planarizing layer; removing the planarizing layer to the level of the stop layer to expose the nanowires from the surface of the planarizing layer; and forming an electrode so as to be in contact with the upper ends of the nanowires.

Abstract: A semiconductor device and manufacturing method therefor includes a ?-shaped embedded source or drain regions. A U-shaped recess is formed in a Si substrate using dry etching and a SiGe layer is grown epitaxially on the bottom of the U-shaped recess. Using an orientation selective etchant having a higher etching rate with respect to Si than SiGe, wet etching is performed on the Si substrate sidewalls of the U-shaped recess, to form a ?-shaped recess.

Abstract: Disclosed is a nanorod semiconductor device having a contact structure, and a method for manufacturing the same. The nanorod semiconductor device having a contact structure according to one embodiment of the present disclosure includes: a transparent wafer; a transparent electrode layer formed on the transparent wafer; a nanorod layer including a plurality of semiconductor nanorods doped with dopants having a first polarity and grown on the transparent electrode layer; and a single crystal semiconductor layer doped with dopants having a second polarity and forming a certain physical contact with the ends of the semiconductor nanorods.

Abstract: One embodiment of the present invention relates to method for the concurrent deposition of multiple different crystalline structures on a semiconductor body utilizing in-situ differential epitaxy. In one embodiment of the present invention a preparation surface is formed, resulting in two distinct crystalline regions, a monocrystalline silicon substrate region and an isolating layer region. A monocrystalline silicon layer and an amorphous silicon layer are concurrently formed directly onto the preparation surface in the monocrystalline silicon substrate region and the isolating layer region, respectively. Deposition comprises the formation of two or more sub-layers. The process parameters can be varied for each individual sub-layer to optimize deposition characteristics.

Abstract: According to embodiments, there is provided a manufacturing method of a semiconductor device includes forming a semiconductor thin film on a substrate; processing the thin film to a predetermined shape; executing an ion implantation process on the thin film processed to the predetermined shape; executing an anneal treatment on the thin film on which the ion implantation process has been executed to create a resistor element; and adjusting both or any one of a process condition of the ion implantation process and a treatment condition of the anneal treatment based on at least any one of a film forming condition and a film formation result of the forming and a film process result of the processing.

Abstract: A film-forming apparatus and method is provided that includes a reflector and insulator capable of suppressing the thermal degradation of components in close proximity to the heater in a film-forming apparatus. In a film-forming apparatus the reflector is used in combination with insulator. Specifically, in a film-forming apparatus a reflector is disposed below a heater with the insulator placed below the reflector. The insulator absorbs the radiant heat from the heater thus suppressing an excessive rise in temperature around the heater, it is therefore possible to prevent thermal degradation of components in close proximity of the heater. For example, when the temperature of a semiconductor substrate is 1650° C., the temperature of the quartz heater base maybe about 1000° C. This is lower than the softening point temperature of the quartz heater base, preventing deformation of the heater base.

Abstract: Apparatus and method for plasma deposition of thin film photovoltaic materials at microwave frequencies. The apparatus avoids unintended deposition on windows or other microwave transmission elements that couple microwave energy to deposition species. The apparatus includes a microwave applicator with one or more conduits passing therethrough that carry deposition species. The applicator transfers microwave energy to the deposition species to activate or energize them to a reactive state. The conduits physically isolate deposition species that would react or otherwise combine to form a thin film material at the point of microwave power transfer and deliver the microwave-excited species to a deposition chamber. One or more supplemental material streams may be delivered directly to the deposition chamber without passing through the microwave applicator and may combine with deposition species exiting the one or more conduits to form a thin film material.

Abstract: In the disclosed vapor deposition method, by using a structure wherein an inner diameter of a group-V source gas introduction piping is greater than an outer diameter a group-III source gas introduction piping, and the group-III source gas introduction piping is inserted one-to-one into the interior of the group-V source gas introduction piping, the group-III source gas piping is thereby prevented from being cooled by a cooling mechanism, and hardening of metallic materials upon the surface of the wall of the piping is alleviated. It is thus possible to provide a vapor deposition device, a vapor deposition method, and a semiconductor element manufacturing method, which are capable of efficaciously introducing easily hardening metallic materials into a reactor without the metallic materials adhering to a showerhead or a piping, and to carry out efficacious doping.

Abstract: A p-channel tunneling field effect transistor (TFET) is selected from a group consisting of (i) a multi-layer structure of group IV layers and (u) a multi-layer structure of group III-V layers. The p-channel TFET includes a channel region comprising one of a silicon-germanium alloy with non-zero germanium content and a ternary III-V alloy. An n-channel TFET is selected from a group consisting of (i) a multi-layer structure of group IV layers and (u) a multi-layer structure of group III-V layers. The n-channel TFET includes an n-type region, a p-type region with a p-type delta doping, and a channel region disposed between and spacing apart the n-type region and the p-type region. The p-channel TFET and the n-channel TFET may be electrically connected to define a complementary field-effect transistor element. TFETs may be fabricated from a silicon-germanium TFET layer structure grown by low temperature (500 degrees Centigrade) molecular beam epitaxy.

Abstract: Some embodiments include methods of forming metal-containing structures. A first metal-containing material may be formed over a substrate. After the first metal-containing material is formed, and while the substrate is within a reaction chamber, hydrogen-containing reactant may be used to form a hydrogen-containing layer over the first metal-containing material. The hydrogen-containing reactant may be, for example, formic acid and/or formaldehyde. Any unreacted hydrogen-containing reactant may be purged from within the reaction chamber, and then metal-containing precursor may be flowed into the reaction chamber. The hydrogen-containing layer may be used during conversion of the metal-containing precursor into a second metal-containing material that forms directly against the first metal-containing material. Some embodiments include methods of forming germanium-containing structures, such as, for example, methods of forming phase change materials containing germanium, antimony and tellurium.

Abstract: Nanosized filamentary carbon structures (CNTs) nucleating over a catalyzed surface may be grown in an up-right direction reaching a second surface, spaced from the first surface, without the need of applying any external voltage source bias. The growth process may be inherently self-stopping, upon reaching a significant population of grown CNTs on the second surface. A gap between the two surfaces may be defined for CNT devices being simultaneously fabricated by common integrated circuit integration techniques. The process includes finding that for separation gaps of up to a hundred or more nanometers, a difference between the respective work functions of the materials delimiting the gap space, for example, different metallic materials or a doped semiconductor of different dopant concentration or type, may produce an electric field intensity orienting the growth of nucleated CNTs from the surface of one of the materials toward the surface of the other material.

Abstract: Provided is an apparatus for manufacturing a compound semiconductor by use of metal organic chemical vapor deposition including: a reaction container; a holder on which a formed body is to be placed so that a formed surface of the formed body on which layers of a compound semiconductor are to be formed faces upward, the holder being arranged in the reaction container; and a material supply port supplying a material gas of the compound semiconductor into the reaction container from outside, wherein the holder includes a support member supporting the formed body so that an undersurface of the formed body and a top surface of the holder on which the formed body is to be placed keep a predetermined distance.

Abstract: Methods for the heteroepitaxial growth of smooth, high quality films of N-face GaN film grown by MOCVD are disclosed. Use of a misoriented substrate and possibly nitridizing the substrate allow for the growth of smooth N-face GaN and other Group III nitride films as disclosed herein. The present invention also avoids the typical large (?m sized) hexagonal features which make N-face GaN material unacceptable for device applications. The present invention allows for the growth of smooth, high quality films which makes the development of N-face devices possible.

Abstract: Embodiments of the invention generally relate to methods for treating a silicon-containing material on a substrate surface and performing a chamber clean process. In one embodiment, a method includes positioning a substrate containing a silicon material having a contaminant thereon within a process chamber and exposing the substrate to an etching gas containing chlorine gas and a silicon source gas while removing the contaminant and maintaining a temperature of the substrate within a range from about 500° C. to less than about 800° C. during an etching process. The method further includes exposing the substrate to a deposition gas after the etching process during a deposition process and exposing the process chamber to a chamber clean gas containing chlorine gas and the silicon source gas after the deposition process during a chamber clean process. The chamber clean process limits the etching of quartz and metal surfaces within the process chamber.

Abstract: A technique for manufacturing a microcrystalline semiconductor layer with high mass productivity is provided. In a reaction chamber of a plasma CVD apparatus, an upper electrode and a lower electrode are provided in almost parallel to each other. A hollow portion is formed in the upper electrode, and the upper electrode includes a shower plate having a plurality of holes formed on a surface of the upper electrode which faces the lower electrode. A substrate is provided over the lower electrode. A gas containing a deposition gas and hydrogen is supplied to the reaction chamber from the shower plate through the hollow portion of the upper electrode, and a rare gas is supplied to the reaction chamber from a portion different from the upper electrode. Accordingly, high-frequency power is supplied to the upper electrode to generate plasma, so that a microcrystalline semiconductor layer is formed over the substrate.

Abstract: A method for manufacturing a semiconductor device includes heating a substrate having an insulation film thereon to a first substrate temperature so that oxidizing species are emitted from the insulating film, the insulating film having a recessed portion formed in a surface thereof, forming a metal film on the insulating film at a second substrate temperature lower than the first substrate temperature, and oxidizing at least part of the metal film with oxidizing species remaining in the insulating film.

Abstract: A method for fabricating a semiconductor layer comprising: a) growing a semiconductor layer on a foreign substrate; b) forming at least one opening on the semiconductor layer, wherein the opening exposes the interface between the semiconductor layer and the foreign substrate; and c) removing at least part of the semiconductor solid state material along the interface between the semiconductor layer and the foreign substrate. The removing step c) is preferably achieved by selective interfacial chemical etching. The semiconductor layer may be utilized as a substrate for fabrication of a wide variety of electronic and opto-electronic devices and integrated circuitry products.

Abstract: A method of forming a film and a substrate processing apparatus, which can increase the number of substrates to be processed at once in order to improve productivity, are provided. In order to solve the problems, the method of forming a film includes loading a plurality of substrates into a substrate processing region in a processing chamber; and forming a film containing nitrogen and metal on each of the plurality of substrates by heating the substrate processing region in the processing chamber, supplying a nitrogen-containing gas through a first gas supply port installed outside the substrate processing region in the processing chamber, and supplying a metal-containing gas through a second gas supply port installed closer to the substrate processing region than the first gas supply port.

Abstract: A semiconductor device includes: a silicon layer (12); an intermediate silicide layer (28) that is provided on the silicon layer (12), has openings, and includes barium silicide; and an upper silicide layer (14) that covers the intermediate silicide layer (28), is positioned to be in contact with the silicon layer (12) through the openings, has a higher dopant concentration than the dopant concentration of the intermediate silicide layer (28), and includes barium silicide.

Abstract: A chemical vapor deposition reactor and method. Reactive gases, such as gases including a Group III metal source and a Group V metal source, are introduced into the chamber (10) of a rotating-disc reactor and directed downwardly onto a wafer carrier (32) and substrates (40) which are maintained at an elevated substrate temperature, typically above about 400° C. and normally about 700-1100° C. to deposit a compound such as a III-V semiconductor. The gases are introduced into the reactor at an inlet temperature desirably above about 75° C. and most preferably about 100°-350° C. The walls of the reactor may be at a temperature close to the inlet temperature. Use of an elevated inlet temperature allows the use of a lower rate of rotation of the wafer carrier, a higher operating pressure, lower flow rate, or some combination of these.

Abstract: One embodiment of the present invention relates to method for the concurrent deposition of multiple different crystalline structures on a semiconductor body utilizing in-situ differential epitaxy. In one embodiment of the present invention a preparation surface is formed, resulting in two distinct crystalline regions, a monocrystalline silicon substrate region and an isolating layer region. A monocrystalline silicon layer and an amorphous silicon layer are concurrently formed directly onto the preparation surface in the monocrystalline silicon substrate region and the isolating layer region, respectively. Deposition comprises the formation of two or more sub-layers. The process parameters can be varied for each individual sub-layer to optimize deposition characteristics.

Abstract: A method of manufacturing a semiconductor device includes conveying a first substrate provided with an opposing surface having insulator regions and a semiconductor region exposed between the insulator regions and a second substrate provided with an insulator surface exposed toward the opposing surface of the first substrate, into a process chamber in a state that the second substrate is arranged in to face the opposing surface of the first substrate, and selectively forming a silicon-containing film with a flat surface at least on the semiconductor region of the opposing surface of the first substrate by heating an inside of the process chamber and supplying at least a silicon-containing gas and a chlorine-containing gas into the process chamber.

Abstract: A method for manufacturing a semiconductor device comprises the steps of forming a seed over the insulating film by introducing hydrogen and a deposition gas into a first treatment chamber under a first condition and forming a microcrystalline semiconductor film over the seed by introducing hydrogen and the deposition gas into a second treatment chamber under a second condition: a second flow rate of the deposition gas is periodically changed between a first value and a second value; and a second pressure in the second treatment chamber is higher than or equal to 1.0×102 Torr and lower than or equal to 1.0×103 Torr.

Abstract: A plasma processing apparatus, comprising: a reaction chamber; a plurality of discharge portions each made up of a pair of a first electrode and a second electrode disposed inside the reaction chamber so as to oppose to each other and to cause a plasma discharge under an atmosphere of a reactant gas; and a dummy electrode, wherein a plurality of the first electrodes are connected to a power supply portion, a plurality of the second electrodes are grounded, and the dummy electrode is disposed so as to oppose to an outer surface side of an external first electrode in terms of a parallel direction out of the plurality of the first electrodes which are disposed in the parallel direction, and is grounded.

Abstract: A method of manufacturing a semiconductor device includes the steps of loading a substrate into a processing chamber; processing the substrate by supplying plural kinds of reaction substances into the processing chamber multiple number of times; and unloading the processed substrate from the processing chamber, wherein at least one of the plural kinds of reaction substances contains a source gas obtained by vaporizing a liquid source by a vaporizing part; in the step of processing the substrate, vaporizing operation of supplying the liquid source to the vaporizing part and vaporizing the liquid source is intermittently performed, and at least at a time other than performing the vaporizing operation of the liquid source, a solvent capable of dissolving the liquid source is flowed to the vaporizing part at a first flow rate; and at a time other than performing the vaporizing operation of the liquid source and every time performing the vaporizing operation of the liquid source prescribed number of times, the sol

Abstract: Provided are a method of manufacturing a semiconductor device and a substrate processing apparatus capable of improving defects of conventional CVD and ALD methods, satisfying requirements of film-thinning, and realizing high film-forming rate. The method includes forming a first layer including a first element being able to become solid state by itself on a substrate by supplying a gas containing the first element into a process vessel in which the substrate is accommodated under a condition that a CVD reaction occurs, and forming a second layer including the first element and a second element being unable to become solid state by itself by supplying a gas containing the second element into the process vessel to modify the first layer, wherein a cycle including the forming of the first layer and the forming of the second layer is performed at least once to form a thin film including the first and second elements and having a predetermined thickness.

Abstract: The invention relates to a device for depositing semiconductor layers, comprising a process chamber (1) arranged substantially rotationally symmetrically about a center (11), a susceptor (2), a process chamber ceiling (3), a gas inlet element (4) having gas inlet chambers (8, 9, 10) that are arranged vertically on top of each other, and a heater (27) arranged below the susceptor (2), wherein the topmost (8) of the gas inlet chambers is directly adjacent to the process chamber ceiling (3) and is connected to a feed line (14) for feeding a hydride together with a carrier gas into the process chamber (1), wherein the lowest (10) of the gas inlet chambers is directly adjacent to the susceptor (2) and is connected to a feed line (16) for feeding a hydride together with a carrier gas into the process chamber (1), wherein at least one center gas inlet chamber (9) arranged between the lowest (10) and the topmost (8) gas inlet chamber is connected to a feed line (15) for feeding an organometallic compound into the pro

Abstract: Nanosized filamentary carbon structures (CNTs) nucleating over a catalyzed surface may be grown in an up-right direction reaching a second surface, spaced from the first surface, without the need of applying any external voltage source bias. The growth process may be inherently self-stopping, upon reaching a significant population of grown CNTs on the second surface. A gap between the two surfaces may be defined for CNT devices being simultaneously fabricated by common integrated circuit integration techniques. The process includes finding that for separation gaps of up to a hundred or more nanometers, a difference between the respective work functions of the materials delimiting the gap space, for example, different metallic materials or a doped semiconductor of different dopant concentration or type, may produce an electric field intensity orienting the growth of nucleated CNTs from the surface of one of the materials toward the surface of the other material.

Abstract: A PCM device has the composition GexTeyNzAm deposited onto a substrate, where x is about 40% to about 60%, y is about 30% to about 49%, and z is about 5% to about 20% and more preferably about 5% to about 40%. The component represented as A is optional and representative of an element of Sb, Sn, In, Ga, or Zn, and m is up to about 15%. The composition is in the form of a film, and the nitrogen allows for the substantially conformal deposition of the film onto the substrate. A CVD process for depositing the PCM comprises delivering a Ge-based precursor and a Te-based precursor in vapor form to a CVD chamber, heating and pressurizing the chamber, and depositing the film onto a substrate. In making a phase change device using this process, the film is annealed and polished.

Abstract: In a thin film transistor, a semiconductor layer containing Si and Ge is applied, a Ge concentration of this semiconductor layer is high at the side of the insulating substrate, and crystalline orientation of the semiconductor layer indicates a random orientation in a region of 20 nm from the side of the insulating substrate, and indicates a (111), (110) or (100) preferential orientation at the film surface side of the semiconductor layer.

Abstract: Semiconductor devices are described wherein current flow in the device is confined between the rectifying junctions (e.g., p-n junctions or metal-semiconductor junctions). The device provides non-punch-through behavior and enhanced current conduction capability. The devices can be power semiconductor devices as such as Junction Field-Effect Transistors (VJFETs), Static Induction Transistors (SITs), Junction Field Effect Thyristors, or JFET current limiters. The devices can be made in wide bandgap semiconductors such as silicon carbide (SiC). According to some embodiments, the device can be a normally-off SiC vertical junction field effect transistor. Methods of making the devices and circuits comprising the devices are also described.

Abstract: Antimony, germanium and tellurium precursors useful for CVD/ALD of corresponding metal-containing thin films are described, along with compositions including such precursors, methods of making such precursors, and films and microelectronic device products manufactured using such precursors, as well as corresponding manufacturing methods. The precursors of the invention are useful for forming germanium-antimony-tellurium (GST) films and microelectronic device products, such as phase change memory devices, including such films.

Abstract: One embodiment of the present invention relates to method for the concurrent deposition of multiple different crystalline structures on a semiconductor body utilizing in-situ differential epitaxy. In one embodiment of the present invention a preparation surface is formed, resulting in two distinct crystalline regions, a monocrystalline silicon substrate region and an isolating layer region. A monocrystalline silicon layer and an amorphous silicon layer are concurrently formed directly onto the preparation surface in the monocrystalline silicon substrate region and the isolating layer region, respectively. Deposition comprises the formation of two or more sub-layers. The process parameters can be varied for each individual sub-layer to optimize deposition characteristics.

Abstract: A method for the fabrication of a semiconductor structure that includes areas that have different crystalline orientation and semiconductor structure formed thereby. The disclosed method allows fabrication of a semiconductor structure that has areas of different semiconducting materials. The method employs templated crystal growth using a Vapor-Liquid-Solid (VLS) growth process. A silicon semiconductor substrate having a first crystal orientation direction is etched to have an array of holes into its surface. A separation layer is formed on the inner surface of the hole for appropriate applications. A growth catalyst is placed at the bottom of the hole and a VLS crystal growth process is initiated to form a nanowire. The resultant nanowire crystal has a second different crystal orientation which is templated by the geometry of the hole.

Abstract: An atmospheric pressure chemical vapor deposition method for producing an N-type semiconductive metal sulfide thin film on a heated substrate includes converting an indium-containing precursor to at least one of a liquid phase and a gaseous phase. The indium-containing precursor is mixed with an inert carrier gas stream and hydrogen sulfide in a mixing zone so as to form a mixed precursor. A substrate is heated to a temperature in a range of 100° C. to 275° C. and the mixed precursor is directed onto the substrate. The hydrogen sulfide is supplied at a rate so as to obtain an absolute concentration of hydrogen sulfide in the mixing zone of no more than 1% by volume. The In-concentration of the indium containing precursor is selected so as to produce a compact indium sulfide film.

Abstract: A technique for manufacturing a microcrystalline semiconductor layer with high mass productivity is provided. In a reaction chamber of a plasma CVD apparatus, an upper electrode and a lower electrode are provided in almost parallel to each other. A hollow portion is formed in the upper electrode, and the upper electrode includes a shower plate having a plurality of holes formed on a surface of the upper electrode which faces the lower electrode. A substrate is provided over the lower electrode. A gas containing a deposition gas and hydrogen is supplied to the reaction chamber from the shower plate through the hollow portion of the upper electrode, and a rare gas is supplied to the reaction chamber from a portion different from the upper electrode. Accordingly, high-frequency power is supplied to the upper electrode to generate plasma, so that a microcrystalline semiconductor layer is formed over the substrate.

Abstract: To achieve TFT having a high light-resistance characteristic with a suppressed light leak current at low cost by simplifying the manufacturing processes. The TFT basically includes a light-shielding film formed on a glass substrate that serves as an insulating substrate; an insulating film formed on the light-shielding film; a semiconductor film formed on the insulating film; and a gate insulating film formed on the semiconductor film. Each layer of a laminate that is configured with three layers of the light-shielding film, the insulating film, and the semiconductor film is patterned simultaneously. Further, each layer of the laminate is configured with silicon or a material containing silicon.

Abstract: An organic electroluminescent display device and a method of preparing the same are provided. The organic electroluminescent display device may include a first electrode formed on a substrate. A second electrode may be formed so as to be insulated from the first electrode. One or more organic layers may be interposed between the first electrode and the second electrode and include at least an emission layer. A protective layer may be formed so as to cover the second electrode. The protective layer may have a surface roughness (rms) of about 5 ? to about 50 ?. The organic electroluminescent display device including a protective layer having a low surface roughness may benefit from superior lifespan characteristics.

Abstract: Embodiments of the present invention generally relate to methods of forming a microcrystalline silicon layer on a substrate in a deposition chamber. In, one embodiment, the method includes flowing a processing gas into a diffuser region between a backing plate and a showerhead of the deposition chamber, flowing the processing gas through a plurality of holes in the showerhead and into a process volume between the showerhead and a substrate support in the deposition chamber, igniting a plasma in the process volume, back-flowing gas ions formed in the plasma through the plurality of holes in the showerhead and into the diffuser region, mixing the gas ions and the processing gas in the diffuser region, re-flowing the gas ions and processing gas through the plurality of holes in the showerhead and into the process volume, and depositing a microcrystalline silicon layer on the substrate.

Abstract: Methods and apparatuses for selective epitaxial formation of films separately inject reactive species into a CVD chamber. The methods are particularly useful for selective deposition using volatile combinations of precursors and etchants. Formation processes include simultaneous supply of precursors and etchants for selective deposition, or sequential supply for cyclical blanket deposition and selective etching. In either case, precursors and etchants are provided along separate flow paths that intersect in the relatively open reaction space, rather than in more confined upstream locations.

Abstract: Processes for forming full graphene wafers on silicon or silicon-on-insulator substrates. The processes comprise formation of a metal carbide layer on the substrate and annealing of the metal carbide layer under high vacuum. For volatile metals, this annealing step results in volatilization of the metal species of the metal carbide layer and reformation of the carbon atoms into the desired graphene wafer. Alternatively, for non-volatile metals, the annealing step results in migration of the metal in the metal carbide layer to the top surface of the layer, thereby forming a metal rich top layer. The desired graphene layer is formed by the carbon atoms left at the interface with the metal rich top layer. The thickness of the graphene layer is controlled by the thickness of the metal carbide layer and by solid phase reactions.

Abstract: An apparatus and process for plasma enhanced chemical vapor deposition with an inductively coupled plasma with ion densities above 1010 cm?3 and energies below 20 eV at the substrate enables epitaxial deposition of group IV and compound semiconductor layers at high rates and low substrate temperatures. The epitaxial reactor allows for in-situ plasma cleaning by chlorine and fluorine containing gaseous species.

Abstract: Carbon-containing sp3-bonded solid refractory nanocrystalline particles that are each sized no larger than about 100 nanometers have a metal of choice disposed thereabout. A variable potential junction is formed between the metallic coatings and the particles that enables carrier entropy to be efficiently transported from the variable potential junction to the coating.

Abstract: A method for fabricating a semiconductor layer comprising: a) growing a semiconductor layer on a foreign substrate; b) forming at least one opening on the semiconductor layer, wherein the opening exposes the interface between the semiconductor layer and the foreign substrate; and c) removing at least part of the semiconductor solid state material along the interface between the semiconductor layer and the foreign substrate. The removing step c) is preferably achieved by selective interfacial chemical etching. The semiconductor layer may be utilized as a substrate for fabrication of a wide variety of electronic and opto-electronic devices and integrated circuitry products.

Abstract: The invention provides a system and method for producing semiconductor nanowires, for example germanium or Silicon, grown by solution decomposition comprising the steps of heating at least one high boiling point solvent to its reaction temperature in a chamber and injecting a precursor directly into the chamber to react with the at least one high boiling solvent to produce a refluxing solvent. Subsequent vapour deposition of a monomer, achieved by the refluxing solvent, onto a locally heated substrate contained within the chamber produces the semiconductor nanowires. The system and method removes the dependency upon the incorporation of metal catalyst for the production of silicon and germanium nanowire, thereby nullifying the adverse effects of metal contamination in the resulting semiconductor nanowires.

Abstract: Antimony, germanium and tellurium precursors useful for CVD/ALD of corresponding metal-containing thin films are described, along with compositions including such precursors, methods of making such precursors, and films and microelectronic device products manufactured using such precursors, as well as corresponding manufacturing methods. The precursors of the invention are useful for forming germanium-antimony-tellurium (GST) films and microelectronic device products, such as phase change memory devices, including such films.