Abstract: Novel interconnect structures possessing a dense OSG material for 90 nm and beyond BEOL technologies in which a low power density oxygen-based de-fluorination plasma process is utilized to increase NBLoK selectivity are presented. These BEOL interconnect structures are capable of delivering enhanced reliability and performance due to the reduced risk of Cu exposure and hence electromigration and stress migration related failures. The oxygen based de-fluorination process is such that the plasma conditions employed {low power density (<0.3 Wcm?2); relatively high pressure (>100 mT); negligible ion current to wafer surface (applied source frequency only)} facilitate a physical expulsion of residual fluorine present on the chamber walls, wafer surface, and within the via structure; thus, minimizing the extent of NBLoK etching that can occur subsequent to removing polymeric byproducts of via etching.

Abstract: A method and a deposition system for increasing deposition rates of metal layers from metal-carbonyl precursors using CO gas and a dilution gas. The method includes providing a substrate in a process chamber of a processing system, forming a process gas containing a metal-carbonyl precursor vapor and a CO gas, diluting the process gas in the process chamber, and exposing the substrate to the diluted process gas to deposit a metal layer on the substrate by a thermal chemical vapor deposition process.

Abstract: In a first aspect, a first method is provided. The first method includes the steps of (1) preconditioning a process chamber with an aggressive plasma; (2) loading a substrate into the process chamber; and (3) performing plasma nitridation on the substrate within the process chamber. The process chamber is preconditioned using a plasma power that is at least 150% higher than a plasma power used during plasma nitridation of the substrate. Numerous other aspects are provided.

Abstract: A metal layer is formed over a metal oxide, where the metal oxide is formed over a semiconductor substrate. A predetermined critical dimension of the metal layer is determined. A first etch is performed to etch the metal layer down to the metal oxide and form footings at the sidewalls of the metal layer. A second etch to remove the footings to target a predetermined critical dimension, wherein the second etch is selective to the metal oxide. In one embodiment, a conductive layer is formed over the metal layer. The bulk of the conductive layer may be etched leaving a portion in contact with the metal layer. Next, the portion left in contact with the metal layer may be etched using chemistry selective to the metal layer.

Abstract: A process for PECVD of selected material films on a substrate comprising the steps of placing a substrate in a PECVD chamber and maintaining the chamber under vacuum pressure while introducing a precursor gas, a reactant gas, and an ionization enhancer agent into the chamber. A plasma is generated from the gases within the chamber. The energy generating the plasma causes the formation of charged species. The resulting charged species of the ionization enhancer agent assists in the formation of chemically reactive species of at least the precursor.

Abstract: A method for manufacturing semiconductor devices includes a step of etching a sample including an interlayer insulating layer containing Al2O3 and a polysilicon or SiO2 layer in contact with the interlayer insulating layer using a plasma etching system. The interlayer insulating layer is etched with a gas mixture containing BCl3, Ar, and CH4 or He. The gas mixture further contains Cl2. The interlayer insulating layer is etched in such a manner that a time-modulated high-frequency bias voltage is applied to the sample. The interlayer insulating layer is etched in such a manner that the sample is maintained at a temperature of 100° C. to 200° C. The interlayer insulating layer and the polysilicon or SiO2 layer are separately etched in different chambers.

Abstract: A method for removing an oxide layer such as a natural oxide layer and a semiconductor manufacturing apparatus which uses the method to remove the oxide layer. A vertically movable susceptor is installed at the lower portion in a processing chamber and a silicon wafer is loaded onto the susceptor when it is at the lower portion of the processing chamber. The air is exhausted from the processing chamber to form a vacuum condition therein. A hydrogen gas in a plasma state and a fluorine-containing gas are supplied into the processing chamber to induce a chemical reaction with the oxide layer on the silicon wafer, resulting in a reaction layer. Then, the susceptor is moved up to the upper portion of the processing chamber, to anneal the silicon wafer on the susceptor with a heater installed at the upper portion of the processing chamber, thus vaporizing the reaction layer. The vaporized reaction layer is exhausted out of the chamber.