Measurement Or Control Of Test Condition Patents (Class 324/750.01)
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Patent number: 8508235Abstract: An electronic device, and associated method, provided with a circuit board (10), with a set of input contacts (IN/COM), a set of output contacts (OUT/COM) and an electrical circuit (18) connected between the input contacts (IN/COM) and the output contacts (OUT/COM) and a controller. The controller carries out a real-time test of the circuit board using a test signal introduced into the electrical circuit, the electrical circuit (18) being designed as a passive network having a characteristic transfer function and provided with at least one capacitive element, wherein the capacitive element is a conductor surface (221) forming a capacitor in the assembled state with a corresponding, device-side conductor surface (222?), which is connected to the electrical circuit (18) via a contact element in the assembled state, whereby the capacitive value of the capacitive element in the assembled state differs from the capacitive value of the capacitive element in the disassembled state.Type: GrantFiled: December 2, 2010Date of Patent: August 13, 2013Assignee: Sartorius Weighing Technology GmbHInventors: Swen Weitemeier, Christian Oldendorf
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Publication number: 20130200908Abstract: Embodiments of the present invention comprise methods and apparatus for testing devices. In some embodiments, a method for testing a device includes operating the device in a stress inducing mode using a first set of conditions for a first period of time; determining a first value for a plurality of device parameters after the first period of time; operating the device in the stress inducing mode using the first set of conditions for a second period of time; determining a second value for the plurality of device parameters after the second period of time; and determining if one or more components of the device has at least one of failed or physically changed by comparing the first and second values for the plurality of device parameters.Type: ApplicationFiled: February 2, 2012Publication date: August 8, 2013Inventor: Benjamin D. Huebschman
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Patent number: 8502549Abstract: A test apparatus includes: a driver circuit that supplies, to a device under test, a test signal corresponding to an input signal; and a judging section that judges pass/fail of the device under test, based on the load voltage or the load current supplied to the device under test when supplying a test signal of a constant current or a constant voltage to the device under test from the driver circuit, where the driver circuit includes: a driver section that outputs the test signal; a supply current detecting section that detects a supply current supplied to the driver section; and an output control section that controls a voltage or a current of the test signal outputted from the driver section to the predetermined value, based on the supply current detected by the supply current detecting section.Type: GrantFiled: November 30, 2010Date of Patent: August 6, 2013Assignee: Advantest CorporationInventors: Shoji Kojima, Toshiyuki Okayasu
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Publication number: 20130193993Abstract: A method for testing a device-under-test includes receiving, from at least one test channel circuit dedicated to communicate with an input/output pin of the device-under-test by means of at least one hardware resource, at least one logical control command describing a desired operation of the at least one hardware resource, and converting, by means of a resource controller, the at least one logical control command into at least one dedicated control command for the at least one hardware resource, wherein the at least one dedicated control command is adapted to be received by a physical implementation of the at least one hardware resource.Type: ApplicationFiled: January 20, 2010Publication date: August 1, 2013Inventors: Gil Golov, Thomas Henkel, Ronald Larson, Ulrich Knoch
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Publication number: 20130193994Abstract: Methods and systems for semiconductor testing are disclosed. In one embodiment, devices which are testing too slowly are prevented from completing testing, thereby allowing untested devices to begin testing sooner.Type: ApplicationFiled: March 14, 2013Publication date: August 1, 2013Applicant: OptimalTest, Ltd.Inventor: OptimalTest, Ltd.
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Patent number: 8493733Abstract: A mobile measurement device, particularly for temporary use in or on vehicles, on stationary engines, or on test benches, consists of individual components (2) that might have different working temperatures, disposed in a common housing (1). Furthermore, at least one fan (6) is provided. In order to allow a very broad range of use with regard to the outside temperature range, at the smallest and lightest possible construction, in order to guarantee simple transport and great mobility, and reliable measurements within this range, the housing (1) is structured essentially in gastight manner.Type: GrantFiled: June 21, 2011Date of Patent: July 23, 2013Assignee: AVL List GmbHInventors: Thomas Schimpl, Martin Dorfner, Volker Pointner
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Publication number: 20130181731Abstract: In a test of discharging a capacitor by electrically turning on a first switching element and a second switching element that are inserted in series in a conductor connecting a positive electrode and a negative electrode of the capacitor, a discharge current that passes through the first and second switching elements tend to apply stress on the first and second switching elements. In this discharge test, while a first control signal for putting the first switching element into a low resistance state is being applied to the first switching element, a second control signal increasing a voltage thereof over time is applied to the second switching element, and application of one of or both of the first and second control signals is stopped when a current detector detects a current. Since a discharge test ends when a limited discharge current starts flowing, stress associated with the discharge test is reduced.Type: ApplicationFiled: January 10, 2013Publication date: July 18, 2013Inventors: Takao KANZAKI, Koichi SAKATA, Yusuke SHINDO, Yasuaki IGARASHI
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Publication number: 20130181730Abstract: A method for pulsed behavior modeling of a device under test (DUT) using steady state conditions is disclosed. The method includes providing an automated test system (ATS) programmed to capture at least one behavior of the DUT. The ATS then generates a DUT input power pulse that transitions from a predetermined steady state level to a predetermined pulse level and back to the predetermined steady state level. At least one behavior of the DUT is then captured by the ATS while the input power is at the predetermined pulse level. The ATS then steps the predetermined pulse level to a different predetermined pulse level, and the above steps are repeated until a range of predetermined pulse levels is swept. The ATS then steps the predetermined steady state level to a different steady state level, and the above steps are repeated until a range of predetermined steady state levels is swept.Type: ApplicationFiled: July 13, 2012Publication date: July 18, 2013Applicant: RF MICRO DEVICES, INC.Inventors: James M. Retz, Andrew F. Folkmann, Jean-Frederic Chiron
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Publication number: 20130181729Abstract: A system for testing the existing protection schemes of a power converter. The system simulates the voltage regulator producing a voltage level below an under-voltage threshold. The system simulates the voltage regulator producing a voltage level above an over-voltage threshold. The system simulates a short in the power converter pulling down the input bus. The system simulates a short in the power converter pulling down the output bus. The system measures the system responses to these simulations against responses of a properly operating system and determines if the power converter's protection schemes are operating correctly.Type: ApplicationFiled: January 18, 2012Publication date: July 18, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Patrick K. Egan, Brian J. Hruby, Michael L. Miller
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Patent number: 8482309Abstract: A failure detecting method for a solar power generation system having plural solar cell strings in each of which plural solar cell modules are connected to each other in series. Specifically, by comparing the current value of each of the solar cell modules or strings with the average current value per one module or string, calculated from the total current value of the entire solar cell modules or strings, one or more failure candidates can be detected with high precision.Type: GrantFiled: February 19, 2010Date of Patent: July 9, 2013Assignee: Onamba Co., Ltd.Inventors: Yukitaka Miyata, Jun Ishida, Osamu Shizuya
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Patent number: 8476909Abstract: A current calibration method and the associated control circuit are provided. The method includes: providing a predetermined voltage to the differential output for obtaining an accurate current passing through the panel resistor during a calibration procedure and, providing a driving current to the differential output according to the accurate current during a normal operation procedure.Type: GrantFiled: January 22, 2010Date of Patent: July 2, 2013Assignee: MStar Semiconductor, Inc.Inventors: Chih-Tien Chang, Ju-Ming Chou
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Publication number: 20130162274Abstract: A semiconductor integrated circuit includes a decoding circuit configured to decode one or more test source signals and generate a plurality of test decoding signals, a transmission circuit configured to transmit the plurality of test decoding signals as a plurality of test mode group signals in response to a test enable signal, wherein the transmission circuit outputs the test mode group signals with maintaining a previous output, when the test decoding signals different from each other are sequentially activated, and a test mode signal output circuit configured to output a plurality of test mode signals corresponding to test mode groups, respectively, in response to the plurality of test mode group signals and one or more test mode select signals.Type: ApplicationFiled: April 12, 2012Publication date: June 27, 2013Inventor: Hong-Sok CHOI
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Publication number: 20130162273Abstract: A testing device comprising a power unit, a storage unit, and a controlling unit is mentioned. The power unit is adapted to provide different voltages. The storage unit is adapted to store a power sequence table and a simulation signal generating table. The controlling unit couples with the power unit and the storage unit, wherein the controlling unit is adapted to provide power sequence controlling signals according to the power sequence table, and the power unit is adapted to provide the voltages to the unit under test according to the power sequence controlling signals. The controlling unit is adapted to provide a simulation signal to the unit under test according to the simulation signal generating table, and the controlling unit is adapted to receive state signals generated by the unit under test in response to the voltages and the simulation signal.Type: ApplicationFiled: March 29, 2012Publication date: June 27, 2013Inventors: Chih-Jen CHIN, Pei-Lun HUANG
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Publication number: 20130154675Abstract: Non-contact type displacement sensors which measure the height of a substrate surface are installed above the substrate in order to hold the upper surface of the substrate at a desired height or to maintain the flatness of the substrate. A substrate mounting device is such that a plurality of grooves and of barriers are provided on the upper surface of a table and air is supplied between the substrate and the table to enable the pressure of air to displace the substrate. In addition, the substrate mounting device has such a structure as to make it possible to deform the substrate into an arbitrary convex-concave shape or to make the substrate flat by feeding back the output of the displacement sensor.Type: ApplicationFiled: January 14, 2011Publication date: June 20, 2013Applicant: HITACHI HIGH-TECHNOLOGIES CORPORATIONInventors: Yusuke Miyazaki, Kenji Aiko, Yuichiro Iijima, Yuichiro Kato
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Publication number: 20130154676Abstract: A monitor for determining the operation condition of at least one cable that suffers bending and/or twisting and constitutes an electrical loop and a method thereof are provided. The monitor comprises a test electrical signal generator (5) for generating an identifiable test electrical signal and injecting the test electrical signal into the first point of the at least one cable, a test electrical signal filter (7) adapting to extract the injected test electrical signal from the second point of the at least one cable, and a comparator (8) for comparing a predetermined threshold with the difference between the electrical state of the injected test electrical signal and the extracted test electrical signal and producing a warning signal indicating cable fatigue when the difference exceeds the predetermined threshold.Type: ApplicationFiled: November 9, 2010Publication date: June 20, 2013Applicant: ABB RESEARCH LTD.Inventors: Gang Wu, Jens Hofschulte, JingGuo Ge
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Publication number: 20130147499Abstract: A pattern generator generates a pattern signal which represents a test signal to be supplied to a DUT. A driver generates a test signal having a level that corresponds to the pattern signal, and outputs the test signal thus generated to the DUT. A voltage modulator changes, in a predetermined voltage range, the voltage level of the test signal output from the driver DR.Type: ApplicationFiled: December 9, 2011Publication date: June 13, 2013Applicant: ADVANTEST CORPORATIONInventors: Masahiro Ishida, Daisuke Watanabe, Toshiyuki Okayasu, Kiyotaka Ichiyama
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Publication number: 20130147500Abstract: An electronic measuring system for extending the effective measurement input frequency range of an electronic measuring instrument includes an electronic measuring instrument and a plurality of downconverting frequency extenders from which two or more downconverting frequency extenders can be selected and configured in series between a test signal output of a device under test (DUT) and a measuring input of the electronic measuring instrument, to selectively and effectively extend the permissible input frequency range of the electronic measuring instrument. The electronic measuring system may optionally include a plurality of upconverting frequency extenders from which one or more upconverting frequency extenders can be selected to selectively and effectively extend the maximum output frequency range of a signal generator used to generate stimulus signals for the DUT.Type: ApplicationFiled: February 11, 2013Publication date: June 13, 2013Inventor: Earl W McCune, JR.
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Publication number: 20130141125Abstract: A test device is connected to a plurality of electronic devices to test a stability of the electronic devices is provided. The test device includes a parameter setting module, a signal generating module, a communication module, and a monitoring module. The parameter setting module sets test parameters for a test in response to a user input. The signal generating module generates a control signal according to the test parameters set by the user to control the electronic devices to execute operations corresponding to the test parameters. The communication module transmits the control signal to the electronic devices. The monitoring module monitors whether the electronic devices are running in a normal state during the test to determine the stability of the electronic devices and further informs the monitoring result to the user.Type: ApplicationFiled: June 12, 2012Publication date: June 6, 2013Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: SEN-FENG CHANG
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Publication number: 20130141124Abstract: A circuit testing interface and test method are disclosed. The circuit testing interface may include a test current transmitting pad, a test voltage measuring pad, and at least one driving circuit comprising an output terminal. The output terminal of the at least one driving circuit may be coupled to a through-silicon via (TSV). The circuit testing interface may further include at least one switch module, coupled to (1) the output terminal of the driving circuit, (2) the test current transmitting pad, and (3) the test voltage measuring pad.Type: ApplicationFiled: December 1, 2011Publication date: June 6, 2013Applicant: NANYA TECHNOLOGY CORPORATIONInventors: Bret Dale, Oliver Kiehl
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Patent number: 8456170Abstract: A pattern generator generates test data to be transmitted. An encoding circuit generates amplitude data which represent a modulated signal waveform that corresponds to the test data. The amplitude data are generated in a parallel manner in the form of multiple amplitude data in increments of multiple sampling points set within a predetermined period for cycles of the predetermined period. A data rate setting unit receives the multiple amplitude data in increments of sampling points, latches the amplitude data at corresponding sampling timings, and sequentially outputs the amplitude data thus latched. A multi-level driver receives sequentially input amplitude data, and generates a test signal having a level that corresponds to the value of the amplitude data thus received.Type: GrantFiled: May 9, 2008Date of Patent: June 4, 2013Assignee: Advantest CorporationInventors: Daisuke Watanabe, Toshiyuki Okayasu
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Patent number: 8446153Abstract: An adaptor failure tolerance test device includes a first connection module, a second connection module, a teaming control module, and a connection control module. The first connection module includes eight first interfaces configured for connecting to a plurality of respective adaptors of a network server. The second connection module includes eight second interfaces configured for connecting to a switch. The teaming control module includes eight first switches, each of which is connected to a corresponding first interface. The connection control module includes eight second switches and a control unit. Each of the second switches is interposed between a corresponding first switch and a corresponding second interface. The control unit is configured for detecting which first switches are turned on and turning on the second switches corresponding to the first switches which are turned on for a predetermined time period.Type: GrantFiled: April 13, 2011Date of Patent: May 21, 2013Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.Inventors: Zheng-Quan Peng, Guan Wang
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Patent number: 8446160Abstract: An improved probe card maintenance method is capable of accurately, rapidly, and easily performing the maintenance of a probe card. The probe card is a jig adapted to test the electrical properties of semiconductor integrated circuits. The electrical properties of the semiconductor integrated circuits are tested at a predetermined test temperature. The probe card has a plurality of probes thereon. The probe card maintenance method includes heating the probe card and the probes on the probe card to the same temperature as the test temperature. The method also includes adjusting positions and postures of the defective probes while maintaining the temperature of the probe card and the probes at the test temperature.Type: GrantFiled: February 1, 2010Date of Patent: May 21, 2013Assignee: Oki Semiconductor Co., Ltd.Inventors: Katsuhiro Gunji, Toru Iwasaki, Tatsurou Nagai, Yumi Kodama
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Publication number: 20130120010Abstract: A measurement instrument includes selectable channels for simultaneously measuring current on a power rail/load of a device under test. Multiplexor circuitry can be controlled to select power rails/loads for measurement and to couple unselected power rails to bypass the measurement circuitry. Active loads are provided in the measurement circuitry to compensate for loading by the measurement circuitry. The active loads cause current on a source side of a selected power rail/load to match current measured on a load side of the selected power rail/load during power measurements.Type: ApplicationFiled: May 21, 2012Publication date: May 16, 2013Applicant: QUALCOMM IncorporatedInventors: Clement B. Edgar, III, Brett L. Christensen, Christopher A. Barrett, Lakshmi P. Baskaran, Christopher F. Einsmann, Karthik N. Moncombu Ramakrishnan, Alfonso T. Trujillo, Alejandro Trujillo
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Publication number: 20130120009Abstract: Apparatus and method for determining variation in a predetermined physical property of a circuit. The apparatus includes monitored circuitry for generating output pulses, and configured such that each output pulse has a pulse width which is indicative of the current value of the predetermined physical property. Circuitry is then configured to receive both the output pulses generated by the monitored circuitry and an oscillating timing reference signal. With reference to the oscillating timing reference signal, the counter circuitry produces for each output pulse an associated count value indicative of the pulse width of that output pulse. Circuitry then compares the associated count values for at least two output pulses, in order to produce a comparison result used to determine the variation in the predetermined physical property. This provides a flexible mechanism for monitoring variations in a physical property on the fly during use of a data processing circuit.Type: ApplicationFiled: November 16, 2011Publication date: May 16, 2013Applicant: ARM LIMITEDInventor: Yves Thomas LAPLANCHE
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Publication number: 20130113508Abstract: Electronic test system and associated method, including a first and a second connection terminals respectively coupled to two pins of a chip under test, a signal source terminal coupled to a signal generator, a first and a second measurement terminals coupled to a tester, a fifth switch, a seventh switch and a switch circuit which has a first and a fourth front terminals coupled to the signal source terminal, has a first and a fourth back terminals coupled to the first and second connection terminals, and controls conduction between the first front terminal and the first back terminal, as well as conduction between the fourth front terminal and the fourth back terminal. The fifth switch is coupled between the fourth back terminal and the first measurement terminal, and the seventh switch is coupled between the first connection terminal and the second measurement terminal.Type: ApplicationFiled: July 12, 2012Publication date: May 9, 2013Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD, GLOBAL UNICHIP CORPORATIONInventors: Shin-Cheng Chu, Ching-Tsung Chen, Teng-Hui Lee, Chia-Jen Kao
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Patent number: 8436630Abstract: A system for measuring an optical spectral response of a photoelectric DUT includes a spectrally programmable light source including a broadband light source, a dispersive element for dispersing the light, and a spatial light modulator for controlling an intensity and a spectra of the light to provide a spectrally programmable light beam. A light distributing device is coupled to receive the spectrally programmable light beam and includes a light distributing structure for distributing the spectrally programmable light beam in a known ratio to a first area and a second area. A reference detector is positioned at the first area, and the DUT is positioned at the second area. Data acquisition electronics and a processor receive simultaneously generated output signals from the DUT and the reference detector to correct for intensity variation in the spectrally programmable light beam in determining the optical spectral response of the DUT.Type: GrantFiled: October 13, 2010Date of Patent: May 7, 2013Assignee: Gooch and Housego PLCInventors: Alexandre Y. Fong, Christopher N. Pannell, Robert Bronson, Jr.
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Publication number: 20130106451Abstract: An apparatus for testing a cable or other capacitive load object with a VLF alternating cosine square, rectangular or trapezoidal test voltage, includes one or two DC voltage sources and a switching arrangement controlled by a measuring and control unit, to produce the test voltage with alternating switched polarity. The apparatus further includes a choke coil serving as an energy store, which is controlled by a switching element to be activated if the voltage/time slope arising during the switch-over after a respective half-wave of the test voltage falls below a defined threshold value.Type: ApplicationFiled: October 29, 2012Publication date: May 2, 2013Inventors: Sven Scheuschner, Nico Stechemesser, Dirk Bechler, Christoph Gramsch, Torsten Berth
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Publication number: 20130106450Abstract: The response characteristics of an output signal and current consumption are kept constant. A drive circuit for outputting an output signal having a voltage determined by a logic of an input signal includes a constant voltage generating section generating a constant bias voltage, a CML circuit outputting the output signal having the voltage determined by the logic of the input signal, where an amplitude of the output signal is determined by a constant current flowing through the CML circuit and a potential of the output signal is determined by the bias voltage, an adjustment constant current source that allows a constant current to flow out from a bias voltage output end of the constant voltage generating section, and a current setting section that sets in advance the constant current flowing into the adjustment constant current source, according to the constant current flowing through the CML circuit.Type: ApplicationFiled: July 31, 2012Publication date: May 2, 2013Applicant: ADVANTEST CORPORATIONInventors: Masashi WATANABE, Kensuke SOEDA, Naoki MATSUMOTO
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Patent number: 8427182Abstract: Provided is a test apparatus that tests a device under test, comprising a plurality of capacitors that are each charged to a predetermined voltage; a switching section that switches which of the capacitors charged to a predetermined voltage supplies power to the device under test; and a judging section that judges acceptability of the device under test based on an operational result of the device under test. Also provided is a test apparatus that selects one of a plurality of capacitors and a corresponding one of a plurality of power supply units, according to content of a test performed after a test that uses another of the capacitors to supply power to the device under test.Type: GrantFiled: August 23, 2010Date of Patent: April 23, 2013Assignee: Advantest CorporationInventor: Seiji Amanuma
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Patent number: 8423314Abstract: Configuring at least one radio frequency (RF) instrument according to a plurality of RF measurement configurations for performing a plurality of tests on a device under test (DUT). A list of RF measurement configurations may be stored in a computer memory. The list of RF measurement configurations comprises a plurality of parameters for configuring operation of the at least one instrument. Information regarding the list of RF measurement configurations (e.g., a data stream) may be provided to the at least one RF instrument. The at least one RF instrument may perform the plurality of tests on the DUT, including the at least one RF instrument configuring itself according to the RF measurement configurations based on processing of the information. Configuring enables the at least one RF instrument to perform the plurality of tests on the DUT in a deterministic manner.Type: GrantFiled: February 25, 2010Date of Patent: April 16, 2013Assignee: National Instruments CorporationInventors: Kunal H. Patel, David E. Klipec
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Patent number: 8421474Abstract: A circuit testing apparatus for testing a device under test is disclosed. The device under test includes a first terminal end and second terminal end for generating a first output signal and a second output signal, respectively. The circuit testing apparatus determines whether the device under test has passed the test according to the first and second output signals.Type: GrantFiled: October 2, 2008Date of Patent: April 16, 2013Assignee: Princeton Technology CorporationInventors: Cheng-Yung Teng, Li-Ying Chang
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Patent number: 8416216Abstract: A touch sensor interface includes one or more touch detection electrodes whose capacitance increases when touched. A processor converts the increase in capacitance into a change in a counter value. A detector compares the change in the counter value with one or more count thresholds to detect faults in the touch sensor interface.Type: GrantFiled: April 22, 2011Date of Patent: April 9, 2013Assignee: Freescale Semiconductor, Inc.Inventors: Jun Zhang, Yan Huang, Wei Luo, Wangsheng Mei, Yang Wang
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Publication number: 20130082725Abstract: An apparatus, system and method are provided for testing a battery-powered electronic device-under-test in a transport frame engaged with a test fixture. A transport frame power supply is arranged to provide power to the DUT in a pre-testing stage. A switching circuit is arranged to switch from the transport frame power supply to a test fixture power supply in response to receiving a power switching signal indicating satisfaction of a pre-testing condition. Power from the test fixture power supply can then be switched back to the first transport frame, or to a second transport frame, to begin testing a second DUT. The ability to start a DUT test without having to wait for the DUT to boot-up in the test fixture reduces test time and increases efficiency of use of test equipment.Type: ApplicationFiled: November 23, 2012Publication date: April 4, 2013Applicant: Research in Motion LimitedInventor: Research in Motion Limited
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Publication number: 20130082724Abstract: A PV panel diagnosis technology is provided which can surely find a deteriorated panel in a solar power generation system. A PV panel diagnosis device includes an adjusting unit that adjusts an impedance for a PV panel circuit connected with a plurality of PV panels, a measured-value storing unit that stores, as a measured value, a voltage or a current measured through the PV panel circuit in accordance with a change in the impedance, a change-amount determining unit that determines a change amount of the voltage or the current based on the measured value in accordance with the change in the impedance, and a specifying unit that specifies a deteriorated PV panel based on a comparison result of the change amount with a predetermined threshold.Type: ApplicationFiled: September 27, 2012Publication date: April 4, 2013Applicant: KABUSHIKI KAISHA TOSHIBAInventor: KABUSHIKI KAISHA TOSHIBA
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Patent number: 8410802Abstract: Systems and methods including testing of electronic components are described. One system relates to a system including a thermal control unit adapted to control the temperature of at least a portion of an electronic component during testing. The system includes at least one conduit extending through a portion of the thermal control unit, the conduit sized to permit the flow of a thermal interface material therethrough, the thermal interface material comprising a liquid. The at least one conduit is positioned so that the thermal interface material can be delivered through the conduit and onto the electronic component. The system also includes a device adapted to control the flow of the thermal interface material through the conduit, wherein the flow can be controlled to deliver the thermal interface material to the electronic component and to remove the thermal interface material from the electronic component. Other embodiments are described and claimed.Type: GrantFiled: December 24, 2009Date of Patent: April 2, 2013Assignee: Intel CorporationInventors: Ashish Gupta, James R. Hastings, Nader N. Abazarnia, Suzana Prstic, Jerome L. Garcia
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Publication number: 20130076380Abstract: An apparatus and a method for testing and/or conditioning photovoltaic modules. The apparatus includes a set of contacts for contacting electrical conductors of the module and a testing and/or conditioning system for testing and/or conditioning of the module and measuring parameters associated therewith.Type: ApplicationFiled: September 14, 2012Publication date: March 28, 2013Inventors: Imran Khan, Markus Gloeckler, Thomas Truman, Scott Jacoby, Michael Sweet, Jigish Trivedi, James E. Hinkle, Stephen P. Murphy
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Publication number: 20130076368Abstract: A tester connects with the connector of electrical vehicle service equipment (EVSE). The tester simulates the battery supply of an electric vehicle to test whether the EVSE is properly operating without requiring that the electric vehicle be present. In one embodiment LEDs are employed to indicate whether the EVSE meets specifications. In a second embodiment various measurements of voltage levels and signals are provided to allow for a more detailed analysis of the performance characteristics of the EVSE. Ground fault, proximity sensor, and re-closure tests are also undertaken.Type: ApplicationFiled: September 26, 2012Publication date: March 28, 2013Inventors: James S. Bianco, James T. Madsen
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Patent number: 8405405Abstract: Low loss current and voltage probes are integrated in parallel plate airlines (slablines) to be used either as separate modules inserted between tuner and DUT in load pull test setups, or integrated in the impedance tuners themselves. The probes are inserted orthogonally at exactly the same reference plane relative to the DUT, maximizing bandwidth and the minimizing deformation of the detected electric and magnetic fields. The probes are used to detect the actual voltage and current waveforms and feed into an amplitude-and-phase calibrated high speed oscilloscope, including several harmonic frequencies. The actual real time voltage and current time domain waves are transformed into the frequency domain using fast Fourier transformation (FFT), de-embedded to the DUT reference plane and inverse transformed into the time domain using inverse Fourier transformation (FFT?1). The result of this real-time operation is the actual dynamic load line of the DUT at its terminals.Type: GrantFiled: January 21, 2010Date of Patent: March 26, 2013Inventors: Christos Tsironis, Zacharia Ouardirhi
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Publication number: 20130063169Abstract: An evaluation board for evaluating a power module including a power semiconductor device and a detecting unit for detecting characteristics of the power semiconductor device, comprises: a power source circuit supplying an electric power to the power module; a driving circuit driving the power semiconductor device; a display unit displaying a detected signal inputted from the detecting unit; and a substrate on which the power source circuit, the driving circuit, and the display unit are mounted.Type: ApplicationFiled: May 22, 2012Publication date: March 14, 2013Applicant: Mitsubishi Electric CorporationInventor: Toshiyuki KUMAGAI
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Publication number: 20130066582Abstract: A method for determining test sets of operating parameter values for an electronic component, the method including: determining a first set of intermediate sets, each intermediate set containing a combination of a first number of operating parameters of the electronic component; determining a second set of reference sets, wherein the second set contains a union of sets, each set comprising all possible combinations of parameter values for the parameters of a respective intermediate set; selecting a third set with a second number of test sets out of a set of predefined sets, wherein each predefined set comprises a different combination of the parameter values for all parameters from the predefined parameter set, such that the second set is a subset of a union of a number of sets, each set comprising all possible combinations of the first number of parameter values for all parameters of a respective test set.Type: ApplicationFiled: September 9, 2011Publication date: March 14, 2013Applicant: Infineon Technologies AGInventors: Georg Pelz, Thomas Nirmaier
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Publication number: 20130057305Abstract: A hybrid construction machine includes: a measurement unit configured to measure a capacitance of an electricity storage device; and a monitoring unit configured to monitor a first condition in which an engine is driven, a second condition in which an adjustment value of a fuel adjusting unit adjusting an amount of fuel supplied to the engine is a predetermined value, and a third condition in which an operation unit and/or an upper swing body are locked and transmit a control signal for starting a measurement of the capacitance of the electricity storage device to the measurement unit when all conditions of the first to third conditions are satisfied.Type: ApplicationFiled: May 13, 2011Publication date: March 7, 2013Applicant: Komatsu Ltd.Inventor: Shimon Jimbo
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Publication number: 20130049779Abstract: An integrated circuit comprising a first pair (11, 12) of switching devices arranged in series between positive and negative supply terminals is disclosed. The integrated circuit is switchable between an operational mode, in which the first pair (11, 12) of switching devices are driven to couple either the positive or negative supply terminal to an output terminal, and a test mode, in which a current source on the integrated circuit is driven to cause a desired current to flow in a first one (12) of the first pair (11, 12) of switching devices.Type: ApplicationFiled: August 23, 2012Publication date: February 28, 2013Applicant: NXP B.V.Inventor: Marco BERKHOUT
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Patent number: 8384406Abstract: In a semiconductor test apparatus, a first device is tested as a device under test in a state where the first device provided with a transmitter transmitting a signal and a second device provided with a receiver receiving the signal transmitted by the transmitter, are connected together. The transmitter includes an equalizer circuit that shapes the waveform of the differential signal to be transmitted. The receiver includes a latch circuit that latches data corresponding to the differential signal thus received with the use of a clock, the timing of which is variable. A control unit varies, in a matrix, a parameter of the equalizer circuit and an edge timing of the clock CLK supplied to the latch circuit.Type: GrantFiled: April 14, 2008Date of Patent: February 26, 2013Assignee: Advantest CorporationInventor: Daisuke Watanabe
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Publication number: 20130043895Abstract: A fan speed control device is applied to a fan including a speed control signal port and a speed signal port. The fan speed control device includes a speed regulating circuit. The speed regulating circuit includes a signal control unit electrically connected to the speed signal port of the fan, and an adjustable resistor is electrically connected between the signal control unit and the speed control signal port of the fan. The resistance of the adjustable resistor may be varied to change the voltage and current supplied to the fan, and the rotational speed of the fan changes according to the operating voltage and current supplied. The signal control unit obtains speed signals from the speed signal port and processes and displays the current testing parameters of the fan.Type: ApplicationFiled: January 10, 2012Publication date: February 21, 2013Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (Shenzhen) CO., LTD.Inventor: ZI-YU ZHAN
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Patent number: 8378696Abstract: The behavior of a component subjected to pulsed laser radiation is measured. The polarization value, frequency, and temperature (or other operating conditions) to which the component is sensitive are determined by detecting a temporary or permanent fault in the operation of the component. If necessary, the parasitic currents generated are prevented from destroying the tested component at the time of testing. A susceptibility of the component to energetic interactions and the preferred operating conditions for the component are deduced.Type: GrantFiled: September 5, 2008Date of Patent: February 19, 2013Assignee: European Aeronautic Defence and Space Company EADS FranceInventors: Nadine Buard, Florent Miller, Patrick Heins, Thierry Carriere
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Publication number: 20130033276Abstract: An automatic testing equipment, an automatic testing system, an a method for controlling automatic testing thereof are disclosed. The automatic testing equipment is used for receiving a control signal to test a durability of a connecting port of a device under test (DUT). The automatic testing equipment includes a testing platform, a testing unit, and a power control unit. The testing platform is used for disposing the DUT. The testing unit includes a main body, an assembly unit, and a height adjustment unit. The assembly unit is used for assembling a test connector. The height adjustment unit is connected with the main body and works with the assembly unit to adjust a height of the assembly unit. The power control unit drives the testing unit to test the connecting port via the test connector after receiving the control signal.Type: ApplicationFiled: April 24, 2012Publication date: February 7, 2013Inventors: Shi-Ping WU, Chang-Hao WANG
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Publication number: 20130027066Abstract: A test structure may characterize the properties of a transistor including a DC test structure for testing DC properties of the transistor, and an AC test structure for testing AC properties of the transistor. The DC and AC test structures may have common test pads.Type: ApplicationFiled: July 25, 2012Publication date: January 31, 2013Applicant: STMicroelectronics SAInventors: Clement Charbuillet, Patrick Scheer
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Publication number: 20130027067Abstract: A device and method for limiting damage to a semiconductor device under test when the semiconductor device fails during a high current, or high power test is provided. The occurrence of a failure of the device under test is detected, and power applied to the semiconductor device is diverted through a parallel path element upon detection of failure of the semiconductor device.Type: ApplicationFiled: July 27, 2012Publication date: January 31, 2013Applicant: INTEGRATED TECHNOLOGY CORPORATIONInventors: Rodney E. Schwartz, Steve Clauter, David Lohr, Gary Rogers, James Baggiore
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Publication number: 20130002274Abstract: Provided is an aging degradation diagnosis circuit, including: a first delay circuit including a gate array for allowing aging degradation to progress, the first delay circuit being configured to delay an input signal and output a first output signal; a second delay circuit including a gate array having the same number of stages as the first delay circuit, the second delay circuit being configured to delay an input signal and output a second output signal; and an arbitrary delay unit, which is capable of varying a delay period in the second delay circuit by a predetermined amount. A delay comparison unit outputs comparison information obtained by relatively comparing delays between the first output signal and the second output signal. An adjustment unit uses the comparison information, to thereby readjust the delay period in the second delay circuit.Type: ApplicationFiled: March 11, 2011Publication date: January 3, 2013Applicant: NEC CorporationInventors: Eisuke Saneyoshi, Koichi Nose
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Publication number: 20130002272Abstract: A test circuit and method for testing through-silicon-vias (TSVs) in three-dimensional integrated circuits (ICs) during each phase of manufacturing is disclosed. In one aspect, the method includes testing for faults in each individual TSV, TSV-under-test, shorts between a TSV-under-test, and TSVs in close proximity and for connections between the TSV-under-test and another tier in the ICs. A test circuit has three switchable current paths connected to a power supply via a pull-up resistor and switches: a calibration path, a short path, and a current measurement path. A power supply is connected to the measurement path, and the calibration path and the short path are connected to ground via respective pull-down resistors. For each TSV-under-test, the desired operation mode is selected by the closure of different combinations of switches. The current flowing through the pull-up resistor in each operation mode indicates whether the TSV-under-test has passed or failed the test.Type: ApplicationFiled: June 30, 2011Publication date: January 3, 2013Applicant: IMECInventors: Mustafa Badaroglu, Erik Jan Marinissen, Paul Marchal