Abstract: A serial input/output memory is able to read data in the memory upon reception of a partial read address in which there are N least significant bits lacking to form a complete address. The read-ahead step includes: simultaneously reading the P first bits of M words of the memory having the same partial address; when the received address is complete, selecting the P first bits of the word designated by the complete address and delivering these bits at the serial output of the memory; reading P following bits of the word designated by the complete address during the delivery of P previous bits and delivering these bits at the serial output of the memory when the P previous bits are delivered.
Type:
Application
Filed:
February 28, 2001
Publication date:
September 13, 2001
Applicant:
STMicroelectronics S.A.
Inventors:
Paola Cavaleri, Bruno Leconte, Sebastien Zink
Abstract: A data storage apparatus includes a latch having first and second storage nodes, a first pass transistor coupled to the first storage node, a row line coupled to a gate of the first pass transistor, and a row driver coupled to the row line. The row driver is configured to drive the row line to three different voltage levels. The three different voltage levels included a low logic level voltage, a full supply high voltage level, and a reduced high voltage level. The reduced high voltage level is greater than the low logic level voltage and less than the full supply high voltage level.
Abstract: A method of programming a nonvolatile semiconductor device at low power. A programming operation is performed by applying a high voltage to a gate of a selected memory cell to induce a strong electric field from a semiconductor substrate, applying a ground voltage to a drain of the selected cell and allowing a source of the selected cell to float. A desired voltage is applied to drains of nonselected memory cells not to program the nonselected memory cells. The desired voltage has half the level of the high voltage applied to the gate of the selected memory cell. Therefore, in a NOR-type flash memory, the programming operation is performed not in a hot-electron implantation manner, but in an F-N tunneling manner, so as to program a number of cells, more particularly on a page-by-page basis, at low power.
Abstract: When a phase shift method is used as lithography where sense amplifiers are alternately placed in a one intersecting-point memory capable of implementing a reduction in the area of a DRAM, it was difficult to layout data lines in a boundary region between sense amplifiers and each memory array. Therefore, there is provided a semiconductor device according to the present invention. In the semiconductor device, two data lines continuous within the sub memory arrays or interposed therebetween are connected to the adjacent sense amplifiers as a system for drawing data lines from sub memory arrays (SMA) to sense amplifiers (SA) when the sense amplifiers are alternately placed. Namely, the number of data lines interposed between data lines respectively connected to two adjacent sense amplifiers is set to even numbers (0, 2, 4, . . . ).
Abstract: A symmetric magnetic tunnel device including first and second magnetic tunnel junctions each including a pinned magnetic layer, an insulating tunnel layer and a free magnetic layer stacked in parallel juxtaposition to allow tunneling of electrons through the insulating tunnel layer between the pinned and free magnetic layers. The first and second magnetic tunnel junctions positioned in parallel juxtaposition so as to form a continuous electron path through the first and second magnetic tunnel junctions and to provide a cell signal across the first and second magnetic tunnel junctions greater than a cell signal across each of the first and second magnetic tunnel junctions individually.
Abstract: Motion of a magnetic bubble material is caused by subjecting magnetic bubbles within the material to a magnetic field gradient. The bubbles respond to the magnetic field gradient by producing forces angled from the direction of the magnetic field gradient, and resistance of the magnetic bubble material to internal movement of the magnetic bubbles causes the material to move in response to the magnetic bubble forces.
Abstract: Motion of a magnetic bubble material is caused by subjecting magnetic bubbles within the material to a magnetic field gradient. The bubbles respond to the magnetic field gradient by producing forces angled from the direction of the magnetic field gradient. The magnetic bubbles are constrained from moving within the magnetic bubble material, which is rotated in the magnetic field gradient to cause Bloch lines in bubble domain walls to rotate within the material. This produces forces causing the material to move.
Abstract: An information recording and reproducing apparatus which has a memory portion which uses the Bloch lines occurring at the magnetic domain walls at the periphery of magnetic domains present in magnetic garnet films as the information carrier, a drive portion to write information into or read information from the said memory portion, and in which the memory portion is constructed to be connectable to and disconnectable from the drive means, wherein the signal transfer is carried out via a connection means when the said memory portion is set in the drive portion. In this information recording and reproducing apparatus, since the recording portion can be freely connected to or disconnected from the drive portion, it is possible to selectively insert portable substrates storing different information in the same apparatus body portion.
Abstract: A transient ionizing radiation tolerant peripheral system for a magnetic bubble memory includes a transient ionizing radiation tolerant rotating field coil driver and a transient ionizing radiation tolerant function gate controller. Both the transient ionizing radiation tolerant rotating field coil driver and the transient ionizing radiation tolerant function gate controller have predrivers each having a bipolar switching transistor having a base, a collector and an emitter. An anti-saturation diode is connected to the collector of the bipolar switching transistor to prevent its switching speed from being reduced by being driven into saturation by excess charge carriers generated by transient ionizing radiation. A photocurrent compensator is connected to the switching transistor and draws current away from its base during exposure to transient ionizing radiation.
Type:
Grant
Filed:
January 6, 1989
Date of Patent:
April 21, 1992
Assignee:
Science Applications International Corporation
Abstract: An economical circuit arrangement permits disruption, during a nuclear event or single event upset, of operation in portions of a bubble memory system and in a computer connected thereto while maintaining integrity of data stored in the bubble memory. Only critical portions of the bubble support circuits are radiation hardened, and a nonstop logic circuit is provided to continue operation during a nuclear event and to conclude any memory access cycles already in progress at the beginning of the event. Spurious (ionization induced) drive pulses are distinguished from actual pulses. A nuclear event detector generates an output pulse during the event and a delay is provided in a path of the pulses in the critical circuit portions. The delay is greater than the duration of the output pulse of the detector so that pulses arriving after the detector pulse are ignored.
Abstract: A data storage system comprises a plurality of bubble memory chips each having a major loop and minor loops. At least one of the minor loops of each chip is used to store bad loop data for its respective chip. A system controller controls operation of the bubble memory chips. The system controller includes a chip controller for controlling operation of the bubble memory chips and a random access memory for storing the bad loop data from all of the bubble memory chips, and for supplying bad loop data to the chip controller so that data is placed only on operative loops of the bubble memory chips. A data transfer bus is used for inputting and outputting data from the system controller to a host computer. The system includes a plurality of bubble memory cassettes, each cassette having a predetermined number. Control signals are provided to the bubble memory chips of bubble memory chips so that more than one bubble memory chip is used simultaneously.
Abstract: A memory system containing redundant portions for the achievement of high reliability is disclosed. A total of n memory elements are utilized, but only m of the n memory elements may be on-line at any one time. On-line and off-line status of each of the n memory elements is defined independently from all other memory elements. Parity or hamming code error detection data associated with an external data bus are changed to cyclical code error detection data for storage in the memory system.
Abstract: A block replicate magnetic bubble memory organization is disclosed in which a number of storage loops are arranged between write and read tracks. Data in the read track is supplied to a deskewing circuit under the control of one section of an EAPROM so that the deskewing circuit outputs one page at a time, where each bit of the page is derived from a different storage loop, to a buffer and error correcting circuit which supplies corrected information to a data processing system as long as only one error bit has occurred on a page. If an error does occur in a page, the processor which has stored in it information relating to all of the used and unused loops of the system, controls another section of the EAPROM so that the defective loop will be exchanged for a good loop after a predetermined number of failures have occurred for the particular bad loop. The write side of the EAPROM is subsequently updated by the processor or remote processor that utilizes the read-out data.
Type:
Grant
Filed:
September 25, 1985
Date of Patent:
July 19, 1988
Assignee:
Unisys Corporation
Inventors:
Dennis L. Amundson, Gerald L. Brown, Raymond C. Hedin, Samuel A. Meddaugh
Abstract: A cassette type magnetic bubble memory comprise a bubble memory device including a bubble memory chip and lead terminals; a connector having contacts for electrically connecting the bubble memory device to an outside unit; thin flexible printed substrates for electrically connecting the contacts of the connector to the lead terminals of the bubble memory device; and a cassette case for accommodating therein the bubble memory device, the connector, and the printed substrates. The cassette case has inner walls. Some parts of the inner walls are in contact with at least some parts of an outer face of the bubble memory device to retain the device in the cassette case so that the majority of the outer face of the device is spaced from the majority of the inner walls of the cassette case. The bubble memory device and the connector are arranged in displaced positions along a plane common to the longitudinal direction of insertion of the cassette case into a bubble memory control unit.
Abstract: A magnetic bubble memory system with a write protecting function is disclosed. In a power on reset mode or initiallizing mode of an information handling system including the bubble memory system, a bubble memory controller directs to and stores in its own memory, an information representative of a write protecting range for a bubble memory device, from a hidden memory region of the bubble memory device. The bubble memory controller compares the write protecting range to the information designating the address range of the bubble memory device in which a new information is to be written, in response to the write command from a host central processing unit. As a result of the comparison, if the both address ranges overlap each other, the bubble memory controller will execute the write protection and generate a write protection error message for the host CPU.
Abstract: An arrangement for purging a magnetic bubble memory and providing a visible purge verification utilizes the thermal compensation Z-axis coil for providing a purge field. A power supply, purge switch and current sensitive circuit interrupter are connected across the thermal compensation coil. When the switch is closed, a surge of relatively high current many times greater than that required for thermal compensation is applied to the coil. Accordingly, the bubbles in the memory will completely disappear. The circuit interrupter is used to halt the purge current once it exceeds the required purge value. This protects the thermal compensation winding and also provides a visual verification that a purge pulse has occurred.
Abstract: An electronic device, such as a bubble memory (21), which has a narrow temperature band of operation, is maintained within the narrow temperature band by a Peltier circuit (30). The Peltier circuit (30) includes a Peltier junction (31) which is placed in a heat conducting relationship with the bubble memory (21). The Peltier circuit (30) has the advantage of being able to alternately heat or chill the bubble memory device (21) in order to maintain the bubble memory device (21) within its recommended temperature range.
Abstract: A magnetic bubble file system having a magnetic bubble memory includes magnetic bubble memory devices as memory media for constructing a plurality of pages of information store areas read and written by page. The store area of a selected one of the plurality of pages of the magnetic bubble memory devices is allotted to a write protection information store page for the magnetic bubble memory. The write protection information store page stores write protection information of each page of data store pages of the magnetic bubble memory. The magnetic bubble file system determines whether data can be written in to the data store page, in accordance with the write protection information stored in the write protection information store page.
Type:
Grant
Filed:
October 25, 1984
Date of Patent:
April 14, 1987
Assignee:
Hitachi, Ltd.
Inventors:
Kunio Suzuki, Kunihiko Onuma, Koji Masui
Abstract: System constituted by a reading and/or writing apparatus and a removable sette for the latter, provided respectively with two couplable connector elements. The apparatus is equipped with a fixed guide member and a drive member mounted on a movable lever and both members are adapted to cooperate with a trough of the cassette to ensure rectilinear driving of the latter and correct cooperation of the two connector elements during the positioning or the extraction of the cassette.
Type:
Grant
Filed:
July 5, 1984
Date of Patent:
February 24, 1987
Assignee:
Societe d'Applications Generales d'Electricite et de Mecanique Sagem
Inventors:
Georges Le Mouellic, Jean-Paul Brun, Jean C. Gidrol
Abstract: A magnetic bubble cassette including a case containing a magnetic bubble device and a connector. The cassette has a cover that is pivotably mounted by means of a support pin on the end of said case so as to permit opening and closing of the case. When the case is opened, the cassette connector can be connected to another connector provided in a cassette holder in which the magnetic bubble cassette is inserted.
Abstract: A cassette type magnetic bubble memory having a magnetic bubble cassette and a cassette holder. The cassette is provided with a connector and contains within a case a magnetic bubble device comprising a magnetic bubble chip, a driving coil, a bias magnet and associated elements. The cassette holder has a cassette storing pocket and a connector to hold the magnetic bubble cassette with the corresponding connectors being connected to each other. An ejecting mechanism is provided for discharging the magnetic bubble cassette from the cassette storing pocket. An ejecting button controls the ejecting mechanism. A lid is provided in front of the cassette inlet of the cassette storing pocket. The lid is formed of a size capable of closing a cassette inlet of the cassette storing pocket and of concealing the ejecting button. The position of the lid is electrically detected.
Abstract: A method is disclosed of forming a fine pattern on a substrate, in which an etching mask pattern is formed on a layer of material of a pattern to be formed, an overlying layer is deposited on the pattern material layer and the mask pattern, and thereafter, the overlying layer and the pattern material layer are etched by ion etching. This method makes it possible, due to the pattern-widening effect caused by the deposition of the overlying layer and by the use of ion etching, to form a pattern having a gap smaller than 0.5 .mu.m or a contiguous-disk pattern having a period of 2 .mu.m or less by photolithography having a 1 .mu.m resolution. It is also possible to form a pattern adapted to enable an easy planing process, by utilizing a difference in etching rates between the mask pattern and the overlying layer.
Abstract: A magnetic bubble memory device comprises a plurality of minor loops for storage of data information and a map loop for storage of defective-loop information, etc. The number of bits of the map loop is selected to be N times as large as the number of bits of each minor loop, N being an integer not smaller than 2.
Abstract: A magnetic bubble memory device comprises a cassette and a body. The cassette has a bias magnetic field generator adapted to generate a bias magnetic field for sustaining magnetic bubbles within a bubble memory chip and is removed of coils adapted to generate a rotating magnetic field for propagation of the magnetic bubbles. The body has a rotating magnetic field generator. The cassette is mounted to or dismounted from the body. When the cassette is dismounted from the cassette, information stored in the chip is held by the bias magnetic field generator and when the cassette is mounted to the body, information is read from or written into the chip by the rotating magnetic field generator.
Abstract: A magnetic bubble memory device with major/minor loops includes at least one boot loop and a plurality of minor loops. Data stored in the boot loop in the form of bubbles are controlled by the reading out of the data independently from the minor loops. Header data are stored in the boot loop. Faulty loop data of the minor loops are stored in the minor loops with a certain positional relationship based on the header data. This results in allowing the device to be applied to a memory having a larger capacity, a higher production yield, and a high-speed detection time for faulty loop data.
Abstract: A series/parallel/series shift register memory system having storage positions provided on a substrate. In addition to the single parallel-connected storage registers required to achieve the nominal storage capacity, there are provided groups of first and second nominally redundant single storage registers. The first redundant registers are used as substitutes for faulty single storage registers, so that the nominal storage capacity can be maintained. The second redundant registers are used for the transport of redundant code data. Also provided is a multi-state sequencer for indicating, in each state, the information to be carried by a particular group of storage registers and for forming, on the basis of this information, an error-detecting or error correction code which is carried by the second redundant storage registers.
Abstract: A holder in which a bubble cassette housing a bubble memory device is inserted. The contacts of the holder contact the contacts of the cassette when the cassette is inserted into the holder, so that current can flow into the bubble memory device. The holder contains a detector for detecting the insertion and withdrawal of the cassette. A circuit controls the current introduced into the magnetic-bubble memory device so that the current is introduced after the contacts of the cassette and the contacts of the holder are connected and is interrupted before the contacts of the cassette and the contacts of the holder are disconnected.
Abstract: A series/parallel/series shift register memory comprises a substrate on which there are provided storage positions for multivalent data elements. There is provided a redundancy generator for generating one or more redundant code elements on the basis of a group of data elements, said redundant code elements being applied to the series input of the shift register memory later than the associated data elements. The code elements are conducted through parallel-connected storage registers which are shorter than those used for the associated data elements, so that a redundancy reducer receives the redundant code elements from a series output before the associated data elements appear on this series output. The reduction of the storage registers, expressed in periods of the shift drive, can be performed in different ways from a technological point of view.
Type:
Grant
Filed:
June 6, 1983
Date of Patent:
January 7, 1986
Assignee:
U.S. Philips Corporation
Inventors:
Marcellinus J. M. Pelgrom, Arie Slob, Hendrik A. Harwig, Jan W. Slotboom
Abstract: A magnetic bubble memory system includes a plurality of magnetic bubble devices, each of which has at least one minor loop for storing magnetic bubbles, at least one information transfer gate and replicator. Also included in the system are at least one page-allocation designating circuit provided for a corresponding magnetic bubble device for designating single-page or multi-page mode of access and a control-signal generating circuit which outputs a signal controlling the information transfer and replicator gates in cooperation with the output from the page-allocation designating circuit.
Abstract: The orthogonal conductors in a magnetic bubble display device each extend in only one direction across the magnetic medium and carry current in only one direction. Sector shaped recesses are formed between conductors for holding the bubbles.
Abstract: The present invention is directed to an improved data processor architecture. In a preferred embodiment, this architecture provides a hybrid stored program computer having analog and digital signals, where this architecture utilizes the combination of an integrated circuit analog read only memory, an integrated circuit analog alterable memory, and digital processing logic to achieve a low cost monolithic hybrid data processor. Analog CCD memories are provided for obtaining high capacity storage at low cost. Digital processing is provided for flexibility and capability. Analog to digital converters and digital to analog converters are used for communication between analog and digital portions of the data processor. Adaptive compensation having stored reference signals enhances analog signal precision.
Abstract: A method for selecting permalloy propagation elements for a magnetic bubble memory is described. The invented method recognizes that propagation characteristics are not symmetrical for a given propagation element. Different propagation elements are fabricated and their propagation characteristics are determined in different directions. Then propagation elements are selected so as to optimize propagation for each direction.
Abstract: In a cassette type magnetic bubble memory device comprising: a magnetic bubble memory device mounted to a base plate and having a magnetic bubble memory element, a pair of coils for generation of a rotating field for driving the element, and a pair of permanent magnet plates and yoke plates for applying a bias field to the element; and an electric signal connector section provided on one end of the base plate and adapted to be connected to a loader, an electrically conductive metal frame is provided which surrounds at least the connector section, and a resin sealing medium is provided which seals at least the magnetic bubble memory device continuously to the inner walls of said frame.
Abstract: In a magnetic bubble memory apparatus of cassette type comprising a magnetic bubble memory device and a signal detector contained in a cassette, the memory device and the signal detector are surrounded by a grounded shield made of electroconductive material.
Abstract: A magnetic bubble cassette comprising bubble memory devices mounted on a printed board in a case and a connector for connecting said bubble memory devices to an external apparatus, including through another bubble memory device for driving said bubble memory device. The connecting portion of said connector that is connected to the external apparatus is arranged on a peripheral wall parallel to the insertion direction of said cassette into said external apparatus. This configuration, allowing a plurality of magnetic bubble memory devices to be disposed in the cassette, increases memory capacity while improving handling of the cassettes.
Abstract: A magnetic bubble memory device is provided with a plurality of memory modules each having at least one magnetic bubble chip. Each module generates a clock for determining the timing to drive the magnetic bubble chip and controls the operation of the magnetic bubble chip. The addresses of a main memory are cyclically allocated to the memory modules in a given unit, so that data transmission can be performed between the memory modules operated asynchronously with each other and the main memory allocated thereto.
Abstract: A method and apparatus for deleting a file from a bubble cassette memory. A file, constituting one input unit of data to be written into the cassette memory, is divided into a plurality of blocks each comprising a predetermined number of bytes and is thereafter stored in the cassette memory. In similar fashion a plurality of such files are stored in the cassette memory in numerical order. When a command for deletion of the n-th file F.sub.n is generated, files which were originally stored in the cassette memory following the n-th file F.sub.n are stored successively and in block-by-block fashion in the cassette memory starting from the position at which the n-th file F.sub.n was originally stored.
Abstract: A magnetic bubble memory device has a plurality of memory loops which comprise minor loops and a map loop arranged independently of the minor loops. The map loop stores index data and parameter data of the memory chip. By detecting the index data, parameter data addresses are designated, and required parameter data are read out and stored in parameter memories, respectively, so as to allow operation of magnetic bubble memory chips having different storage capacities and different parameters under control of a single control circuit.
Abstract: A cassette type magnetic bubble memory device is dismountably attached to a main apparatus, having a bubble driving circuit, a bubble writing circuit and a bubble reading circuit, and which comprises a case and, contained therein, a magnetic bubble memory element including at least a bubble chip, a coil for producing a revolving magnetic field and a magnet for producing a bias magnetic field. A writing-inhibiting member is mounted on the surface of the case to hold the state of inhibition of the writing operation in the magnetic bubble memory element. This writing-inhibiting member is arranged so that the state of inhibition of the writing operation and the state of allowance of the writing operation can be switched by a manual operation.
Abstract: A magnetic bubble memory device of a cassette type including at least one magnetic bubble memory chip, a package for accommodating the chip and upper and lower cases. In the magnetic bubble memory device, two magnetic shield plates are fixed to the inner surfaces of the upper and lower cases, respectively.
Abstract: A magnetic bubble domain memory device is provided that includes a magnetic bubble domain data chip having a major/minor loop organization in which one or more defective minor loops may be tolerated. Information in the form of a redundancy map is stored within the plurality of minor loops in a single page thereof, where a page is defined as one bit of information from the same virtual position on each of the plurality of minor loops. This redundancy map comprises firmware wherein the presence of a magnetic bubble domain within the designated page at a specified bit position identifies the particular minor loop corresponding to that bit position as a good loop, and conversely the absence of a bubble within the page at a specified bit position identifies the particular minor loop corresponding to that bit position as a defective loop.
Abstract: The specification describes a magnetic bubble device which incorporates a Z coil for providing a test magnetic field in addition to the usually provided bias field. In order to reduce package size the Z coil comprises at least one printed coil 17 formed on a substrate 15. The substrate 15 may be a flexible substrate such as polyimide film which is provided as a flap on a chip connection substrate formed from the same film, the flap folding over to lie parallel with the chip connection substrate.The invention enables a Z coil to be provided within a package without unduly increasing package height and provides an additional advantage that the substrate which supports the Z coil may be used to protect the magnetic bubble device chip.
Abstract: In a power source device for a bubble memory unit consisting of a bubble memory part and a control part, a controlling supply voltage to be applied to both the bubble memory part and the control part is produced by a power source circuit based on a pulse width modulation system. The power source circuit is provided with a circuit which can expand the signal pulse width in excess of its upper-limit value during the ordinary voltage control. When the controlling supply voltage has become lower than a predetermined value, the pulse width is expanded so that the refresh operation may be perfectly executed when the power source device for the bubble memory unit is turned off.
Abstract: A method and system for rewriting data in a non-volatile memory in which the rewriting of one access unit of stored data is executed by erase and write cycles, the stored data being protected in the event of an interruption in electric power. In rewriting into second data the first data which is stored in a data storage area of the non-volatile memory, either the first or the second data is stored in a save area of the non-volatile memory, after which the first data in the data storage area is erased, followed by the writing of the second data in the data storage region to complete the rewrite operation.
Abstract: A portable bubble memory apparatus having a bubble memory cassette for accommodating a bubble memory element, and a portable cassette adapter provided with a cassette holder for loading and unloading the bubble memory cassette, the portable cassette adapter housing a control circuit and peripheral circuitry for the bubble memory element. A signal generator generates a signal to indicate whether the bubble memory cassette has been loaded at the correct position within the cassette holder. If the bubble memory cassette is displaced from the correct position, the generated signal causes the exchange of information between the bubble memory cassette and an external unit to cease.
Abstract: A passive annihilator for ion-implanted contiguous-disk bubble devices has a deep cusp formed by two narrow, non-implanted regions. This annihilator has a maximum bias field margin and drive field margin, and is compatible with other components which comprise a functional ion-implanted contiguous-disk bubble device.
Type:
Grant
Filed:
May 24, 1982
Date of Patent:
April 3, 1984
Assignee:
International Business Machines Corporation
Abstract: A method of controlling a magnetic bubble memory device comprising a rotating field generation coil for applying the rotating field to a magnetic pattern formed on a magnetic bubble memory chip and transferring the magnetic bubble along the magnetic pattern. A bubble memory device controlled by the method of the present invention, is capable of operating in a wider ambient temperature range by heating the chip through heat generation realized by applying a heating current to the rotating field generation coil while the magnetic bubble transfer control is not carried out.
Abstract: A micro-pattern element has a heat discharge pattern formed on a fine line portion of a conductor pattern. Breakage caused by temperature elevation of the conductor pattern in response to the application of an electric current and resulting electromigration can be effectively prevented by the heat-discharge pattern formed on the fine line portion of the conductor pattern; thus, the reliability of the micro-pattern element can be remarkably improved.
Abstract: A coil arrangement for testing magnetically operative devices comprising means for mounting a magnetically operative device to be tested by an external magnetic field; first and second coil means disposed symmetrically with respect to the place of the device, the coil means functioning to produce an external magnetic field for testing the device; characterized in that the first coil means is embedded within a metallic electrically conductive body for confining the magnetic field lines to a predetermined region.
Abstract: A magnetic bubble memory device comprising a cassette holder provided in a main bubble memory apparatus and a magnetic bubble memory cassette which is inserted into the holder so as to be electrically connected with a bubble actuating circuit provided in the main bubble memory apparatus. The device further comprises a detector means for detecting the operation of ejecting the cassette from the holder. The detector means transmits a signal for stopping the bubble motion in advance of the disconnection of the cassette from the bubble actuating circuit.