Intrasystem Connection (e.g., Bus And Bus Transaction Processing) Patents (Class 710/100)
  • Patent number: 7913006
    Abstract: Systems and methods for improving the performance of a multimedia processor system by dynamically evaluating the current performance of the system and, if necessary, updating the configurations of the individual processors to improve the performance of the system. One embodiment comprises a method implemented in a multiprocessor system, including evaluating the performance of each of a current set of configuration objects installed on the processors, selecting a preferred set of configuration objects, and replacing one or more of the configuration objects in the current set to conform the current set to the preferred set. The method may evaluate the performance of each configuration object according to user preferences and may select preferred configuration objects according to a selectable strategy that can, for example, favor unification or diversity in the types of preferred configuration objects.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: March 22, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Hamaoka, Kazuko Ishibashi, Hiroo Hayashi
  • Patent number: 7912560
    Abstract: A controller and module for an industrial automation system is provided. A logical module employs resources and logic to expose functionality of the module while providing generic interfaces to external components of the module. A controller is operable with the logical module to provide interactions with components that are at, above, or below a layer associated with the controller.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: March 22, 2011
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: Gavan W. Hood, Kenwood H. Hall, Sujeet Chand, Paul R. D'Mura, Michael D. Kalan, Kenneth S. Plache
  • Patent number: 7913005
    Abstract: The signal integrity of a high speed heavily loaded multidrop memory bus is often degraded due the numerous impedance mismatches. The impedance mismatches causes the bus to exhibit a nonlinear frequency response, which diminishes signal integrity and limits the bandwidth of the bus. A compensating element, such as a capacitor which ties the bus to a reference plane (e.g., a ground potential), or an inductor wired in series with the bus, is located approximately midway between the memory controller and the memory slots. The use of the compensating element equalizes signal amplitudes and minimizes phase errors of signals in an interested frequency range and diminishes the amplitudes of high frequency signals which exhibit high degrees of phase error. The resulting bus structure has increased desirable harmonic content with low phase error, thereby permitting the bus to exhibit better rise time performance and permitting a higher data transfer rate.
    Type: Grant
    Filed: November 3, 2008
    Date of Patent: March 22, 2011
    Assignee: Round Rock Research, LLC
    Inventors: Roy Greeff, Terry R. Lee
  • Publication number: 20110057939
    Abstract: Disclosed herein are systems, apparatuses, and methods for enabling efficient reads to a local memory of a processing unit. In an embodiment, a processing unit includes an interface and a buffer. The interface is configured to (i) send a request for a portion of data in a region of a local memory of an other processing unit and (ii) receive, responsive to the request, all the data from the region. The buffer is configured to store the data from the region of the local memory of the other processing unit.
    Type: Application
    Filed: March 8, 2010
    Publication date: March 10, 2011
    Applicants: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: David I.J. GLEN, Philip J. Rogers, Gordon F. Caruk, Gongxian Jeffrey Cheng, Mark Hummel, Stephen Patrick Thompson, Anthony Asaro
  • Patent number: 7904625
    Abstract: An apparatus includes a Universal Serial Bus (USB) transceiver of a USB host controller, a first pull-down resistor, a first switch, a second pull-down resistor, a second switch, and a detachment module. The USB transceiver has a differential output. The first switch electrically couples the first pull-down resistor to a positive terminal of the differential output in response to a first switch control signal. The second switch electrically couples the second pull-down resistor to a negative terminal of the differential output in response to a second switch control signal. The detachment module selectively determines whether a USB device is electrically coupled to the differential output by checking a voltage at the differential output while at least one of the first switch control signal or the second switch control signal is asserted.
    Type: Grant
    Filed: November 12, 2008
    Date of Patent: March 8, 2011
    Assignee: Marvell International Ltd.
    Inventors: Yong Jiang, Zhenyu Zhang
  • Patent number: 7899961
    Abstract: In one embodiment, an integrated circuit comprises circuitry for performing bus inversion. The circuitry is operable to configure the integrated circuit to implement one of a plurality of bus inversion schemes each of which the integrated circuit is capable of performing. The circuitry is also operable to process data input to and output from the integrated circuit based on the bus inversion scheme for which the integrated circuit is configured.
    Type: Grant
    Filed: September 2, 2008
    Date of Patent: March 1, 2011
    Assignee: Qimonda AG
    Inventor: Rom-Shen Kao
  • Patent number: 7899946
    Abstract: An analog/digital switching circuit for connecting a primary electronic device to a peripheral electronic device, including D+ and D? signal lines connected to a primary electronic device, a first analog/digital switch connected to the D+ signal line, for multiplexing an input D+ signal to an output USB data signal or audio left or right signal, the multiplexed signal feeding into a peripheral device connector for connecting the primary device to a peripheral electronic device, a second analog/digital switch connected to the D? signal line, for multiplexing an input D? signal to an output USB data signal or audio right or left signal, the multiplexed signal feeding into the peripheral device connector, a headset left signal line connected to the primary device and to the output audio left signal of the first analog/digital switch, a headset right signal line connected to the primary device and to the output audio right signal of the second analog/digital switch, a first USB signal line connected to a USB conn
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: March 1, 2011
    Assignee: Modu Ltd.
    Inventors: Itay Sherman, Eyal Miller
  • Patent number: 7900028
    Abstract: In a method used for initializing a first bus device and a second bus device sharing a common transmission engine of a bus, a first link of the first bus device and a second link of the second bus device to the common transmission engine are disabled when the computer system is booted. Next, the first link and the second link are enabled in order. Then, a first state updating signal from the first bus device is issued after the first link to the common transmission engine is established. Finally, a second state updating signal from the second bus device is issued after the first state updating signal is received and the second link to the common transmission engine is established.
    Type: Grant
    Filed: October 4, 2006
    Date of Patent: March 1, 2011
    Assignee: Via Technologies, Inc.
    Inventors: Chung-Ching Huang, Ta-Chuan Liu, Tzu-Chiang Chiu, Chin-Fa Hsiao
  • Patent number: 7899962
    Abstract: A general bus system is provided which combines a number of internal lines and leads them as a bundle to the terminals. The bus system control is predefined and does not require any influence by the programmer. Any number of memories, peripherals or other units can be connected to the bus system (for cascading).
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: March 1, 2011
    Inventors: Martin Vorbach, Robert Münch
  • Patent number: 7894275
    Abstract: A method may be provided to communicate a plurality of groups of output data bits representing a respective plurality of groups of input data bits over a data bus with each group of output data bits and each group of input data bits have an equal data width. Each of the plurality of groups of input data bits at may be received at a data register. For each group of input data bits received at the data register, if a number of data bits of the group of input data bits having a first logic level is greater than half of the data width, the group of input data bits are inverted, the inverted group of input data bits are transmitted as a respective group of output data bits in parallel over the data bus, and an inversion flag associated with the respective group of output data bits is transmitted.
    Type: Grant
    Filed: June 13, 2007
    Date of Patent: February 22, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-yong Choi, Dong-woo Lee
  • Patent number: 7894949
    Abstract: A data bus system of a motor vehicle includes at least one first and one second control device which communicates with each another via at least one data bus. In order to be able to localize errors more easily, the system has at least one identification device which provides an identifier to each of the messages sent by the first and the second control device. The first control device receives a first message, and the identification device causes the first control device to provide the message sent therefrom with a first identifier. The second control device receives the message sent by the first control device with the first identifier, and the identification device causes the second control device to provide the message sent therefrom with a second identifier.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: February 22, 2011
    Assignee: Bayerische Motoren Werke Aktiengesellschaft
    Inventors: Konrad Stocker, Florian Kuttig
  • Patent number: 7894426
    Abstract: Network devices and methods are provided for device monitoring. One embodiment includes a network device having a processor, a high speed interconnect and a number of network chips. The number of network chips are coupled to one another through the high speed interconnect. The number of network chips have a conduit port which can be selectively chosen to exchange packets, received to any network chip, with the processor.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: February 22, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Bruce E. LaVigne, John A. Wickeraad, Lewis S. Kootstra, Jonathan M. Watts
  • Publication number: 20110040911
    Abstract: A dual interface coherent and non-coherent network interface controller architecture is generally presented. In this regard, a network interface controller is introduced including a non-coherent bus interface to communicatively couple with devices of a system through a non-coherent protocol, the non-coherent bus interface to facilitate discovery of the network interface controller by an operating system, a coherent bus interface to communicatively couple with devices of the system through a coherent protocol, and a coherency engine to perform coherent transactions over the coherent interface including to snoop for writes on system memory. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: August 13, 2009
    Publication date: February 17, 2011
    Inventors: Anil Vasudevan, Parthasarathy Sarangam, Sujoy Sen, Gary Tsao, Dave B. Minturn
  • Patent number: 7890682
    Abstract: A semiconductor storage device includes an external input/output port. A system bus of a server, which is extended to outside of the server, is connected to the external input/output port directly as a serial interface.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: February 15, 2011
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Takeshi Kamimura, Norihiko Kuroishi, Masao Funada, Jun Kitamura, Kunihiro Seno, Seiji Suzuki, Shinobu Ozeki, Masaru Kijima, Junji Okada, Yoshihide Sato, Kenichi Kobayashi
  • Publication number: 20110034043
    Abstract: Apparatus for making an electrical connection in a system requiring four electrical connections, including an electrical connection pad having an array of four types of electrically conductive contacts, all conductive contacts of a given type being electrically connected to all other conductive contacts of the same type; and an arrangement for providing electrical connections to conductive contacts on the pads, the arrangement having electrically conductive pins for making contact with the conductive contacts, wherein the types of electrically conductive contacts include two contacts for power and two separate contacts for signals. The pins may be arranged at corners of a first square and a second square, with the first square being rotated by forty-five degrees with respect to the second square, and a pin located at a common center of both squares. A method of operation of the apparatus, and various applications and configurations for its use.
    Type: Application
    Filed: March 31, 2010
    Publication date: February 10, 2011
    Inventors: Julie Anne Morris, Michael Thano Matthews, Jennifer Greenwood Zawacki
  • Publication number: 20110029709
    Abstract: Provided is a method of streaming transfer of data between a plurality of devices of a computer system. The method includes providing data to be sent from a source device to a target device and includes receiving, at the source device, one or more transfer credits from the target device. A transfer credit may be indicative of an amount of data that the target device is authorizing to be sent to the target device. The method also includes determining whether or not an accumulated transfer credit value satisfies a threshold value. If the accumulated transfer credit value satisfies the threshold value, the source device sends data to the target device and modifies the accumulated transfer credit value based on a quantity of data sent. If the accumulated transfer credit value does not satisfy the threshold value the source device does not send data to the target device.
    Type: Application
    Filed: August 3, 2009
    Publication date: February 3, 2011
    Inventors: Neil S. Feiereisel, Glen O. Sescila, III, Craig M. Conway, Brian Keith Odom, M. Dean Brockhausen, JR.
  • Publication number: 20110029702
    Abstract: A portable transaction-enablement platform carries out certain actions to improve the protection of sensitive information. This can comprise detecting when a user of the portable transaction-enablement platform prepares to use the portable transaction-enablement platform to facilitate a sensitive transaction and then responding in a corresponding manner. This can comprise, for example, automatically pre-enabling transaction-enablement platform functionality as pertains to the sensitive transaction while also limiting transaction-enablement platform functionality that does not support the sensitive transaction and that poses a risk to the sensitive transaction.
    Type: Application
    Filed: July 28, 2009
    Publication date: February 3, 2011
    Applicant: MOTOROLA, INC.
    Inventors: Matthew G. Pirretti, Ronald F. Buskey
  • Patent number: 7881899
    Abstract: System and method for measurement, DAQ, and control operations which uses small form-factor measurement modules or cartridges with a re-configurable carrier unit, sensors, and a computer system to provide modular, efficient, cost-effective measurement solutions. The measurement module includes measurement circuitry, e.g., signal conditioner and/or signal conversion circuitry, and interface circuitry for communicating with the carrier unit. The module communicates interface information to the carrier unit, which informs the computer system how to program or configure a functional unit on the carrier unit to implement the communicated interface, or sends the information directly to the computer system. The computer system programs the carrier unit with the interface, and the programmed carrier unit and measurement module together function as a DAQ, measurement, and/or control device.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: February 1, 2011
    Assignee: National Instruments Corporation
    Inventors: Perry C. Steger, Garritt W. Foote, David L. Potter, James J. Truchard, Brian Keith Odom
  • Patent number: 7881919
    Abstract: Techniques for simulating universal serial bus (USB) video devices are described. In one example, a document containing a USB video device descriptor set is loaded by a device simulator application. The document is parsed and the descriptor set is extracted. The descriptor set is then used to define a simulated USB video device. A device simulation framework simulates a USB device attachment to a computing device and video data is streamed from the simulated USB video device to the computing device. A video driver associated with the computing device processes the video data as if the data originated from USB video device hardware. Multiple different USB video devices may be simulated and different collections and configurations of video data can be utilized.
    Type: Grant
    Filed: April 3, 2007
    Date of Patent: February 1, 2011
    Assignee: Microsoft Corporation
    Inventors: Art Trumble, Tuan D. Le
  • Patent number: 7882298
    Abstract: A method for transmitting data from and to a control device, in particular an engine control device for a motor vehicle that has a first communication interface and a second communication interface , the method having the following steps: connecting the first communication interface to a development tool, and connecting the second communication interface to one or more function units during the development phase of the control device, transmitting data from the control device to the development tool via the first communication interface using a first communication protocol, transmitting data from the development tool to the control device via the first communication interface using the first communication protocol, breaking the connection between the first communication interface and the development tool, connecting the first communication interface to one or more additional 20 function units, and transmitting data between the control device and the other function unit or function units via the first communic
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: February 1, 2011
    Assignee: Robert Bosch GmbH
    Inventor: Axel Aue
  • Patent number: 7881828
    Abstract: A bus module for connecting electrically triggerable fluidic valves to a data bus. The bus module has an electrical circuit configuration, which evaluates address data and user data from data telegrams transmitted on the data bus and which triggers a fluidic valve determined by the address data in accordance with the user data of the data telegram. In order to keep the current load on the bus module low particularly when triggering hydraulic valves, the electronic circuit configuration, following the reception of user data in the form of a switch-on command for one of the fluidic valves connected to the bus module, first constantly supplies a supply voltage to the fluidic valve determined by the address data during a gate-controlled rise time of specifiable duration. Following the expiration of the gate-controlled rise time, the electronic circuit configuration supplies the fluidic valve with the supply voltage in a pulse width modulated form having a specifiable pulse control factor.
    Type: Grant
    Filed: June 11, 2005
    Date of Patent: February 1, 2011
    Assignee: Bosch Rexroth AG
    Inventor: Stefan Schmidt
  • Publication number: 20110022752
    Abstract: In a method for transmitting data from a transmitting user of a cycle-based communication system to a receiving user of the communication system, the data are transmitted via a communication medium in messages that repeat in communication cycles and that respectively include a plurality of data blocks. The receiving user identifies the end of the data blocks in the received messages and subsequently extracts the transmitted data from the identified data blocks.
    Type: Application
    Filed: December 10, 2008
    Publication date: January 27, 2011
    Inventors: Marc Schreier, Corina Weber
  • Publication number: 20110022750
    Abstract: A device includes a first interface to receive a signal from a first communication link, wherein the receive signal includes out-of-band (OOB) information. A detector coupled to the first interface detects the OOB information. An encoder coupled to the detector encodes the OOB information into one or more symbols (e.g., control characters). A second interface is coupled to the encoder and a second communication link (e.g., a serial transport path). The second interface transmits the symbols on the second communication link. The device also includes mechanisms for preventing false presence detection of terminating devices.
    Type: Application
    Filed: March 31, 2010
    Publication date: January 27, 2011
    Inventor: Michael J. Sobelman
  • Patent number: 7877471
    Abstract: In a clustered computer system with multiple power domains, a bus number manager within each power domain manages multiple nodes independently of other power domains. A node within a specified power domain includes a non-volatile memory that includes bus numbering information for its own buses as well as bus numbering information for two of its logically-interconnected neighbors. This creates a distributed database of the interconnection topology for each power domain. Because a node contains bus numbering information about its logical neighbor node(s), the bus numbers for the buses in the nodes are made persistent across numerous different system reconfigurations. The clustered computer system also includes a bus number manager that reads the non-volatile memories in the nodes during initial program load (i.e.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: January 25, 2011
    Assignee: International Business Machines Corporation
    Inventors: David Alan Bailey, Timothy Roy Block
  • Patent number: 7873773
    Abstract: A circuit arrangement, method and apparatus utilize communication links that are selectively configurable to operate in both unidirectional and bidirectional modes to communicate data between multiple nodes that are interconnected to one another in a daisy chain configuration. As a result, in many instances communications may be maintained with nodes located both before and after a discontinuity in a daisy chain configuration.
    Type: Grant
    Filed: April 26, 2007
    Date of Patent: January 18, 2011
    Assignee: International Business Machines Corporation
    Inventors: Gerald Keith Bartley, John Michael Borkenhagen, Robert Allen Drehmel, James Anthony Marcella
  • Publication number: 20110010475
    Abstract: A method and an electronic device are provided for logging process variables of a bus-controlled automation system in which process variables which are relevant to evaluation are buffered in at least one digital field device and are subsequently read, for the purpose of evaluation, by a central computer unit which is connected to the field device via a data bus. Process variable values which are relevant to evaluation are buffered in the field device in the form of a message, a plurality of equidistantly successive process variable values are recorded as messages, where the first process variable value is assigned a time stamp recorded for each message, and further process variable values are stored in further identical messages.
    Type: Application
    Filed: July 8, 2010
    Publication date: January 13, 2011
    Applicant: ABB Technology AG
    Inventors: Andreas Wahlmann, Heiko Kresse
  • Publication number: 20110010043
    Abstract: A system and methods that enables enhanced vehicle communications for electric vehicle power management. In an embodiment, a system provides for communications in a power flow management system utilizing existing hardware including a smart charging module. In another embodiment, a communications module provides communication services to vehicle subsystems including a central processing unit in a vehicle and a CAN-bus transceiver. In yet another embodiment, an interface enables the installation of a charge controller for a control extensibility system including a physical interface to a vehicle's CAN-bus comprising an electrical contact plug. In an embodiment, an interface enables an electric vehicle to communicate with an electric power supply device without specific hardware by modulating the power transfer between the electrical load and an electric power supply.
    Type: Application
    Filed: March 31, 2010
    Publication date: January 13, 2011
    Applicant: GridPoint, Inc.
    Inventor: Joby Lafky
  • Patent number: 7865649
    Abstract: The invention relates to a module for reproducing a transmitter signal (xactE). A control device (1) is coupled to a driving device (4a) for controlling a machine while being coupled to the module (5, 5?) via a data bus (7) for exchanging data. A reproduced transmitter signal (xactEn) is determined from a reference value (xdes) that is predefined by the control device with the aid of the module (5, 5?). The module (5, 5?) is logically coupled to the control device (1) via the data bus (7) in such a way that the module (5, 5?) is projected in the same way as the driving device (4a) from the perspective of the control device (1). The inventive module (5, 5?) for reproducing a transmitter signal (xactE) thus makes it possible to project, start, and adjust the dynamics of the machine in a simple manner.
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: January 4, 2011
    Assignee: Siemens Aktiengesellschaft
    Inventors: Raimund Kram, Jochen Schlinkert, Richard Schneider
  • Patent number: 7865641
    Abstract: One embodiment provides a system including a communications channel, a first channel master, and a second channel master. The first channel master is configured to obtain latency values and maintain a first schedule of data traffic on the communications channel based on the latency values. The second channel master is configured to obtain the latency values and maintain a second schedule of data traffic on the communications channel based on the latency values. The first channel master manages data on the communications channel via the first schedule and the second channel master manages data on the communications channel via the second schedule.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: January 4, 2011
    Assignee: Qimonda AG
    Inventor: Gerhard Risse
  • Patent number: 7853740
    Abstract: The present invention provides an intelligent, modular multimedia computer management system for coupling a series of remote computers to one or more user workstations to allow each user workstation to selectively access and control one or more remote computers. The computer management system incorporates a centralized switching system that receives keyboard, cursor control device, audio, and auxiliary peripheral device signals from the user workstation and transmits and applies the signals to the remote computer in the same manner as if the keyboard, cursor control device, audio input source, or auxiliary peripheral device of the user workstation were directly coupled to the remote computer. Also, the user workstation receives audio signals and auxiliary peripheral device signals from the remote computer. In addition, the multimedia computer management system transmits video signals from the remote computer over an extended range for display on the video monitor of the user workstation.
    Type: Grant
    Filed: September 18, 2003
    Date of Patent: December 14, 2010
    Assignee: RIIP, Inc.
    Inventors: Yee Liaw, Lech Glinski
  • Publication number: 20100312962
    Abstract: Disclosed is a storage system architecture. Array controllers are configured with at least 2M ports, where M is an integers greater than two that corresponds to the number of SAS domains or JBOD units in the system. Serial attached SCSI (SAS) domains or JBOD units are configured with at least 2N ports, where N corresponds to the number of array controllers in the system. At least two of each of the 2N ports are directly connected to a corresponding at least two of each of the 2M ports of each of the N array controllers, thereby establishing direct redundant connectivity between each of the N array controllers and each of the M SAS domains or JBOD units.
    Type: Application
    Filed: June 9, 2009
    Publication date: December 9, 2010
    Inventors: Rodney A. DeKoning, Kenneth Day
  • Publication number: 20100312921
    Abstract: Systems and methods are disclosed for detecting the connection of a FireWire peer to a FireWire device. In one embodiment, a device may determine whether a peer connection is present based on peer detection circuit configured in each FireWire port of a FireWire device. When no peer is connected to a device, a peer connection in the circuit may be open, and a current path through the circuit may provide a low detect signal, indicating that no peer is connected. When a peer is connected to a detecting device, the current may pass through a resistance in the detected peer to provide a high detect signal, indicating that a peer is connected. In some embodiments, once a peer is detected, the FireWire system of the detecting device may be powered on, and the peer detection circuit may be powered off.
    Type: Application
    Filed: June 4, 2009
    Publication date: December 9, 2010
    Applicant: APPLE INC.
    Inventors: Eric George Smith, Colin Whitby-Strevens, Eric Anderson
  • Patent number: 7848317
    Abstract: A communication module system has an interface module for interconnection with at least one communication module, the interface module containing an input, via which the interface module receives first data and/or messages, a first transmission path and a second transmission path being provided in the interface module, a coupling element being provided in the second transmission path, which coupling element is implemented in such a way that the first data and/or messages are at least partially combined to form second data and/or messages.
    Type: Grant
    Filed: November 25, 2005
    Date of Patent: December 7, 2010
    Assignee: Robert Bosch GmbH
    Inventors: Florian Hartwich, Jan Taube
  • Publication number: 20100306501
    Abstract: A hybrid computer system is provided, including first and second computer devices. The first computer device is configured with the second computer device via a connection unit. Each of the first computer device and the second computer device is capable of operating independently when the first computer device and the second computer device are separated. The first computer device and the second computer device communicate with each other in a master-slave structure and combined with each other into a single system. The peripheral devices of the first and second computer devices are shared, wherein the first and second computer devices are master/slave systems or slave/master systems.
    Type: Application
    Filed: December 16, 2009
    Publication date: December 2, 2010
    Applicant: Institute for Information Industry
    Inventors: Teng-Chang Chang, Yun-Kai Hsu, Yu-Zhi Chen
  • Patent number: 7840738
    Abstract: Devices, systems and methods for providing a connector system are disclosed. The exemplary device may have system and device flow contacts on the system and device connectors, respectively. A first set contacts and a second set of contacts may be electrically connected to each other to verify that system and device contacts are properly mated to each other. A controller linked to a contact circuit may regulate the power and/or signals provided to an end device.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: November 23, 2010
    Assignee: Honeywell International Inc.
    Inventors: Rodney P. Boer, Kevin P. Bonner, Kevin M. Palamar
  • Patent number: 7830172
    Abstract: Access is provided to user registers of a user design implemented on an integrated circuit (IC). A memory of the IC is initialized with instructions, and a portion of the programmable logic and interconnect resources of the IC is configured to implement an access interface, multiplexer logic, and the user design. A processor is coupled to the programmable logic and interconnect resources and executes the instructions from the memory. The processor receives from an external user interface, via the access interface, an access command. For a read command, the processor reads a value from an identified user register and transmits the value to the external user interface. For a write command, the processor writes a write value specified by the access command to the specified user register via the multiplexer logic. The processor and the user design are both coupled to write to the user registers via the multiplexer logic.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: November 9, 2010
    Assignee: Xilinx, Inc.
    Inventor: Glenn A. Baxter
  • Patent number: 7827344
    Abstract: A “smart cable” that connects one or more peripheral devices to a digital media player having multiple, different types of input and/or output connections.
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: November 2, 2010
    Assignee: Universal Electronics Inc.
    Inventor: Nicholas Kalayjian
  • Patent number: 7822901
    Abstract: A system for connecting a console device to computers comprising a graphic user interface menu apparatus for controlling the computers. The system comprises a user-side circuit, a central crosspoint switch, a plurality of computer-side circuits, a menu generating unit and a first switching device. The user-side circuit coupled to the console device receives electronic signals produced by the keyboard and cursor control device and creates a data packet. The central crosspoint switch is coupled to the user-side circuits, receives the data packets and routes the data packets. The computer-side circuits coupled to the central crosspoint switch and the computers receive the data packets from the central crosspoint switch for supplying the data packets to the computers. The menu generating unit generates a menu to be displayed. The first switching device alternately outputs a video signal of the menu data and a video signal from the computers to the video monitor according to a vertical synchronization signal.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: October 26, 2010
    Assignee: Aten International Co., Ltd.
    Inventors: Kuo-chou Tseng, Cheng-chang Ke
  • Patent number: 7822899
    Abstract: Provided are a data processor, and a control system, in which an interrupt controller and an event link controller are adopted. The event link controller responds to a generated event signal to output a start control signal for controlling start of an operation of a circuit module. The circuit module is able to generate an event signal. The event link controller generates the start control signal according to the correspondences between event signals and start control signals which are defined by event control information. The links between the event signals and start control signals can be prescribed by the event control information. Therefore, operations of circuit modules prescribed by such links can be controlled sequentially. The control neither involves save and return processes by CPU as in the interrupt processing, nor needs priority level control as executed on competing interrupt requests.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: October 26, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Hidemi Oyama, Masanobu Kawamura, Takuya Ikeguchi, Masanori Matsumoto, Hiroyuki Kawajiri
  • Patent number: 7822012
    Abstract: A method and apparatus includes identifying an address portion of a first message in an address slice of a switch, the first message associated with a first priority, the address portion of the first message including a first routing portion specifying a network resource; identifying an address portion of a second message in the address slice, the second message associated with a second priority, the address portion of the second message including a second routing portion specifying the same network resource; identifying a non-address portion of the first message in a non-address slice of the switch; identifying a non-address portion of the second message in the non-address slice, wherein neither of the non-address portions includes a routing portion specifying the network resource; selecting, independently in each slice, the same one of the first and second messages based on the first and second priorities; transferring the address portion of the selected message to the network resource specified by the rout
    Type: Grant
    Filed: May 23, 2005
    Date of Patent: October 26, 2010
    Inventors: Stephen Clark Purcell, Scott Kimura
  • Publication number: 20100268053
    Abstract: Methods, devices, and system including detecting the presence of an electrical connection in a data port of a medical device, the presence of the electrical connection associated with a variation in a signal level resulting from the electrical connection in the data port, and generating a control signal in response to the detected presence of the electrical connection in the data port, where generating the control signals includes one or more of outputting a notification associated with the presence of the electrical connection in the data port or modifying one or more operational parameters associated with the medical device are provided.
    Type: Application
    Filed: April 15, 2010
    Publication date: October 21, 2010
    Applicant: Abbott Diabetes Care Inc.
    Inventors: Alexander G. Ghesquiere, Matthew Simmons, Christopher Ammon Myles
  • Publication number: 20100268995
    Abstract: A method for tracing thread bus transactions in a multiprocessor system comprises decoding, by a processor, a first thread instruction of a thread, the thread comprising an ordered series of thread instructions. In the event the first thread instruction is a set bus trace enable bit (BTEB) instruction, the processor sets a bus trace enable bit corresponding to the thread. In the event the BTEB is set, the processor determines whether the first thread instruction is a trace-eligible instruction and, in the event the first thread instruction is a trace-eligible instruction, and the BTEB is set, the processor sets a snoop tag trace enable bit (STTEB). A hardware trace monitor (HTM) monitors bus transactions, each bus transaction comprising a STTE. In the event a monitored bus transaction comprises a set STTEB, the HTM stores the bus transaction as trace data. In the event a monitored bus transaction comprises a reset STTEB, the HTM does not store the bus transaction as trace data.
    Type: Application
    Filed: April 16, 2009
    Publication date: October 21, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Benjiman L. Goodman, Sertac Cakici, Samuel I. Ward, Linton B. Ward, JR.
  • Patent number: 7818593
    Abstract: A method of operating a shared bus comprises sending a wake-up signal on the shared bus. The wake-up signal comprises a sequence of signals, each signal of the sequence being one of a signal indicating the bus is free and a signal indicating the bus is busy. A microcontroller to effect this method is also contemplated. A wake-up device for a shared bus has a first latch to recognize a signal indicating one of said shared bus being free and said shared bus being busy and selectively output a recognition signal and a second latch to, after receipt of the recognition signal, recognize a signal indicating another of the shared bus being free and the shared bus being busy and selectively output a power-on signal. The latches may be D-type flip flops.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: October 19, 2010
    Assignee: QUALCOMM Incorporated
    Inventors: Sergiu Goma, Millivoje Aleksic
  • Patent number: 7818483
    Abstract: Methods and apparatuses for improving detection of a Serial Advanced Technology Attachment (“SATA”) target device by a storage initiator over a link. The storage initiator receives a Frame Information Structure (“FIS”) and determines whether the FIS is valid. In direct response to a determination that the FIS is invalid, the storage initiator immediately resets the link to the SATA target device.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: October 19, 2010
    Assignee: LSI Corporation
    Inventors: Sagar G. Gadsing, Jason C. McGinley, Shawn M. Swanson
  • Patent number: 7818480
    Abstract: Disclosed is a wireless remote network management system for interfacing a series of remote devices (e.g., computers, servers, networking equipment, etc.) to one or more user workstations. The system is multifunctional to allow multiple users to control remote devices through serial access or keyboard, video, and cursor control device access via wireless and hard-wired connections. The remote devices are preferably coupled to a wireless-enabled remote management unit through a chain of computer interface modules, and each user workstation includes a wireless user station coupled to a keyboard, a video monitor and a cursor control device. The remote management unit and user stations preferably communicate via a wireless network, which enables a user workstation to access, monitor and control any of the remote devices.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: October 19, 2010
    Assignee: Raritan Americas, Inc.
    Inventors: David Hoerl, John T. Burgess
  • Patent number: 7817394
    Abstract: A method according to one embodiment may include discovering, by software, at least one variable from at least one component populated on a shelf system. The method may also include performing, by the software, at least one shelf management function based on at least one variable. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
    Type: Grant
    Filed: July 28, 2004
    Date of Patent: October 19, 2010
    Assignee: Intel Corporation
    Inventors: Udayan Mukherjee, Chetan Hiremath
  • Publication number: 20100262845
    Abstract: A cable for providing electric power from a power source to a mobile device, the cable having a first connector at a first end of the cable for connecting the cable to a mobile device and with a second connector at a second end for connecting the cable to the power source, wherein the cable comprises a memory module for backup and bidirectional transfer of data to and from the mobile device.
    Type: Application
    Filed: October 29, 2008
    Publication date: October 14, 2010
    Inventor: Anil Goel
  • Publication number: 20100257397
    Abstract: Embodiments of the invention are generally directed to systems, methods, and apparatuses for the active training of memory command timing. In some embodiments, the CMD/CTL timing is actively trained using active feedback between memory modules and the memory controller. Other embodiments are described and claimed.
    Type: Application
    Filed: April 3, 2009
    Publication date: October 7, 2010
    Inventors: Theodore Z. Schoenborn, John V. Lovelace, Christopher P. Mozak, Bryan L. Spry
  • Publication number: 20100250802
    Abstract: A data processing apparatus and method are provided for performing hazard detection in respect of a series of access requests issued by processing circuitry for handling by one or more slave devices. The series of access requests include one or more write access requests, each write access request specifying a write operation to be performed by an addressed slave device, and each issued write access request being a pending write access request until the write operation has been completed by the addressed slave device. Hazard detection circuitry comprises a pending write access history storage having at least one buffer and at least one counter for keeping a record of each pending write access request.
    Type: Application
    Filed: March 26, 2009
    Publication date: September 30, 2010
    Applicant: ARM Limited
    Inventors: Alex James Waugh, Andrew Christopher Rose
  • Patent number: RE41977
    Abstract: A recording and reproducing apparatus has a communicating unit, a reading unit, a storing unit, a control unit, and an output unit. The communicating unit transmits and receives data to/from an information center in which a plurality of additional information have been stored. The reading unit reads out recorded data from a recording medium on which a plurality of data and index data of a plurality of data have been recorded. The data read out from the recording medium by the reading unit is stored in the storing unit. The control unit reads out the additional information corresponding to the recording medium from which the data is read out by the reading unit from the information center by the communicating unit and writes the read-out additional information into the storing unit as additional data of the recording medium which is read out by the reading unit. The output unit outputs the data stored in the storing unit and the additional data.
    Type: Grant
    Filed: January 27, 2009
    Date of Patent: November 30, 2010
    Assignee: Sony Corporation
    Inventors: Kissei Matsumoto, Min-Jae Han, Takuya Kaeriyama, Tsutomu Imai, Seiichi Jinbo