Input/output Access Regulation Patents (Class 710/36)
  • Patent number: 8812756
    Abstract: A method of dispatching and transmitting data stream, which is used for a memory storage apparatus having a non-volatile memory module and a smart card chip, is provided. The method includes configuring a plurality of logical block addresses, and a plurality of specific logical block addresses are used for storing a specific file. The method also includes receiving a response data unit from the smart card chip and storing the response data unit in a buffer memory. The method also includes, when a logical block address corresponding to a read command from a host system belongs to one of the specific logical block addresses and the buffer memory stores a response data unit, transmitting the response data unit stored in the buffer memory to the host system. Accordingly, the method can make the host system to correctly receive the response data unit from the smart card chip.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: August 19, 2014
    Assignee: Phison Electronics Corp.
    Inventor: Ching-Wen Chang
  • Patent number: 8812753
    Abstract: An information processing apparatus includes a transceiver unit transmitting and receiving information to and from an external device is provided. The apparatus includes a setting information storage unit storing setting information related to an operating environment in association with user identification information, a judging unit judging whether the information that the transceiver unit transmits to or receives from the external device includes given information, an extraction unit extracting the given information from the information including the given information, a specifying unit specifying a user on the basis of the given information, and a setting unit reading the setting information stored in the setting information storage unit in association with the user identification information and setting the user operating environment on the basis of the setting information.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: August 19, 2014
    Assignee: Fujitsu Limited
    Inventors: Motoshi Sumioka, Masahiko Murakami, Ryuichi Matsukura
  • Patent number: 8812746
    Abstract: Embodiments of the invention are directed towards scalable and dynamically configurable (and reconfigurable) device host controller solutions for system platform controller hubs (PCH). Embodiments of the invention may include logic or modules to detect a device coupled to a common I/O port (alternatively referred to as a converged I/O port) of a host system and determine its device type. Said logic or modules may further load host controller firmware for the device type from a memory to a processing core, such that the processing core will execute the host controller firmware to enable data transfer between the device and the host system. Said processing core may be configured and reconfigured based on the device type connected to the associated common I/O port.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: August 19, 2014
    Assignee: Intel Corporation
    Inventors: Asad Azam, Dhinesh Sasidaran
  • Patent number: 8805899
    Abstract: The management of data storage channel utilization in a computing system that has multiple users. The system receives file-level requests from requesters and then creates a history for each requester. Upon evaluating the history of each requester, the system determines whether to delay the file-level requests from entering the file system stack based on the result of the evaluation. The system delays one or more of the file-level requests if the history of the corresponding requester meets one or more criteria. If the history of the corresponding requester does not meet the criteria, the system allows the file-level requests to be passed to the file system stack without being delayed.
    Type: Grant
    Filed: November 9, 2011
    Date of Patent: August 12, 2014
    Assignee: Microsoft Corporation
    Inventors: Huei Chung Wang, Amjad Hussain
  • Patent number: 8806604
    Abstract: The present invention discloses methods for protecting a host system from information-security risks posed by a URD, the method including the steps of: operationally connecting the URD to the host system; communicating, between the URD and the host system, via a network protocol, through a firewall residing in the host system; and configuring said firewall to provide security measures related to the URD. Preferably, the firewall is a software firewall or a hardware firewall. A method for protecting a host system from information-security risks posed by a URD, the method including the steps of: operationally connecting the URD to the host system; communicating, between the URD and the host system, via a network protocol, through a firewall residing in the host system; and configuring said firewall to restrict access of at least one application to the URD. Preferably, the firewall is a software firewall or a hardware firewall.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: August 12, 2014
    Assignee: SanDisk IL Ltd.
    Inventors: Ittai Golde, Alexander Paley, Leonid Shmulevich
  • Patent number: 8806082
    Abstract: A Direct Memory Access (DMA) device for a multi-core system, and an operating method of the DMA device are provided. The DMA device includes a channel state determining unit to determine whether at least one channel among a source channel and a destination channel is available, the source channel being formed between a source core and the DMA device, and the destination channel being formed between a destination core and the DMA device, and a data transmission processing unit to process data of the source core to be transmitted to the destination core, when both the source channel and the destination channel are determined to be available.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: August 12, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Doo Hyun Kim
  • Patent number: 8806067
    Abstract: Systems and methods for configuring contacts of a first connector includes detecting mating of a second connector with the first connector and in response to the detection, sending a command over one of the contacts and waiting for a response to the command. If a valid response to the command is received, the system determines the orientation of the second connector. The response also includes configuration information for contacts in the second connector. The system then configures some of the other contacts of the first connector based on the determined orientation and configuration information of the contacts of the second connector.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: August 12, 2014
    Assignee: Apple Inc.
    Inventors: Jeffrey J. Terlizzi, Scott Mullins, Alexei Kosut, Jahan Minoo
  • Patent number: 8806068
    Abstract: A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: August 12, 2014
    Assignee: Intel Corporation
    Inventors: Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman, Mark B. Rosenbluth, Ajay V. Bhatt, Peter Barry, Scott Dion Rodgers, Anil Vasudevan, Sridhar Muthrasanallur, James Akiyama, Robert G. Blankenship, Ohad Falik, Avi Mendelson, Ilan Pardo, Eran Tamari, Eliezer Weissmann, Doron Shamia
  • Patent number: 8806085
    Abstract: An input/output module for use in an industrial control system and connectable to a programmable logic controller (PLC), the input/output module having an interface configured for an electrical connection to the PLC, a plurality of pins configured for connection to one of a plurality of peripherals, an application specific integrated circuit (ASIC) disposed in the I/O module and electrically coupled to a system controller, the ASIC having a plurality of connection paths, each path being configured for a function, and a switch block configured to reassign a signal from a first connection path of the plurality of connection paths to a second connection path of the plurality of connection paths.
    Type: Grant
    Filed: August 9, 2012
    Date of Patent: August 12, 2014
    Assignee: GE Intelligent Platforms, Inc.
    Inventors: Alan Paul Mathason, Daniel Milton Alley, Stephen Emerson Douthit
  • Patent number: 8806086
    Abstract: A server includes a baseboard management controller (BMC), an input/output (I/O) chip, a serial port, and a serial port connection circuit. The serial port connection circuit is connected to the BMC, the I/O chip, and the serial port, and selectively connects either the BMC or the I/O chip to the serial port.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: August 12, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Cheng-Fei Weng, Jie Li
  • Patent number: 8799534
    Abstract: Proposed are a storage apparatus and controlling method to prevent deterioration in the response performance of the whole system effectively. A storage apparatus provides a host computer with one or more storage areas for reading and writing data to the corresponding storage areas based on commands from the host computer. The number of receivable commands from the host computer is managed according to preconfigured management modes for managing the number of receivable commands. The management modes comprise at least one management mode among a first management mode for managing the number of receivable commands for each of the storage areas, a second management mode for managing the number of receivable commands in host group units which are sets of one or more of the host computers, and a third management mode for managing the number of receivable commands in identification information units assigned to the logged on host computers.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: August 5, 2014
    Assignee: Hitachi, Ltd.
    Inventor: Kosuke Komikado
  • Patent number: 8799538
    Abstract: A system manages access to a cost-constrained resource. The system includes two or more resource consumers that may request access to the cost-constrained resource. Each of the resource consumers may calculate a respective need value corresponding to an amount of data stored in a buffer of the resource consumer relative to a total amount of data that may be stored in the buffer. A concurrency arbitrator may grant access to the cost-constrained resource to a given resource consumer of the plurality of resource consumers based on need values received by the concurrency arbitrator from the plurality of resource consumers. Additionally, or in the alternative, the concurrency arbitrator may grant access to the cost-constrained resource to a given resource consumer based on an amount of data stored in a buffer of the cost-constrained resource that is to be transferred to the given resource consumer.
    Type: Grant
    Filed: April 16, 2009
    Date of Patent: August 5, 2014
    Assignee: 2236008 Ontario Inc.
    Inventors: Tim Jenkins, Dan Cardamore
  • Patent number: 8788720
    Abstract: A method and apparatus is presented for communicating between a platform and multiple objects, where the objects comprise a set of parameters and an object-specific interface protocol, where at least one of the object-specific interface protocols differs from at least one other object-specific interface protocol. The method includes identifying the objects and creating multiple nonobject-specific data structures, where at least one of the nonobject-specific data structures can engage each parameter of each set of parameters. The method further includes transforming, using the plurality of nonobject-specific data structures created, the object-specific interface protocols into a single nonobject-specific interface protocol for communicating between the platform and the objects.
    Type: Grant
    Filed: July 5, 2012
    Date of Patent: July 22, 2014
    Assignee: Tucson Embedded Systems
    Inventors: Elden Crom, David Crowe, Paul Kenjora, Sean Mulholland, Joseph Fico, Jonathan Strootman, Stephen Simi, Stephen Koester
  • Patent number: 8788727
    Abstract: A method of operating an electronic system comprises storing information corresponding to an input data stream in a first memory having a first operating rate, detecting an overflow condition of the first memory, generating overflow information in response to the detection of the overflow condition, storing the overflow information in a second memory having a second operating rate slower than the first operating rate, transferring the overflow information from the detector to a third memory at a first transfer rate corresponding to the first operating rate, temporarily storing the overflow information in the third memory, and transferring the stored overflow information to the second memory at a second transfer rate corresponding to the second operating rate, and combining the information stored in the first memory with the overflow information stored in the second memory to produce an output data stream.
    Type: Grant
    Filed: January 10, 2013
    Date of Patent: July 22, 2014
    Assignee: Agilent Technologies, Inc.
    Inventor: Robin A. Bordow
  • Patent number: 8788726
    Abstract: A system has a processor configured to be capable of read and write to a main memory, a storage configured to transmit stored data per block on an I/O bus, and a protocol processing apparatus connected to the I/O bus and configured to perform a communication protocol process on behalf of the processor. The processor includes a specifying part configured to specify data per block to be transmitted from the storage, and an indicating part configured to indicate data transfer from the storage to the protocol processing apparatus by specifying address information of the protocol processing apparatus. The protocol processing apparatus includes a receiving part configured to directly receive data transferred per block from the storage to the I/O bus, without relaying the main memory, and a network processing part configured to transmit the data received per block by the receiving part over a network per packet.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: July 22, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shingo Tanaka, Takahiro Yamaura
  • Patent number: 8782651
    Abstract: The method includes identifying a first executing process using a second executing process. The first executing process may include a file descriptor and the first executing process may be independent of the second executing process. The method includes disassociating the file descriptor from a first data stream using the second executing process without involvement of the first executing process. The method includes associating the file descriptor with a second data stream using the second executing process without involvement of the first executing process in response to disassociating the file descriptor from the first data stream.
    Type: Grant
    Filed: September 26, 2011
    Date of Patent: July 15, 2014
    Assignee: International Business Machines Corporation
    Inventors: Sukadev Bhattiprolu, Matthew Lee Helsley
  • Patent number: 8782302
    Abstract: A node having a node input is configured to receive a plurality of transactions intended for a plurality of different targets. The node has multiple node outputs. At least one target is provided, that target including an input configured to receive a respective output of the node. The node is configured to direct transactions to the at least one target or an output (for passing to a different partition) depending on whether the transactions are intended for the target or a different target. This determination is made in response to a conversion operation which converts a target address of the transaction to an identification associated with the target or the output.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: July 15, 2014
    Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics Srl
    Inventors: Ignazio Antonino Urzi, Philippe D'Audigier, Daniele Mangano
  • Patent number: 8782303
    Abstract: An information processing apparatus includes a memory and a processor coupled to the memory. The processor is configured to execute a process including acquiring control information of a first application program of which execution result is displayed, extracting a dependency relationship between the first application program and a second application program on a basis of the control information, and determining whether an access request for a device from the second application program is granted on a basis of the dependency relationship.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: July 15, 2014
    Assignee: Fujitsu Limited
    Inventor: Masaaki Noro
  • Patent number: 8775745
    Abstract: A process variation tolerant collision detection apparatus for use in detecting collisions in a multibank memory. The apparatus may receive a plurality of memory commands for execution at the multibank memory. The plurality of memory commands may be compared by an index address comparator and a bank address comparator to generate an index match signal and a bank match signal. The index match signal and the bank match signal may be analyzed by a timing correction module such that errors associated with process variation of the signals used in the system may be eliminated. Accordingly, a corrected index match signal and a corrected bank match signal may be provided to a collision detection circuit to determine whether a collision exits.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: July 8, 2014
    Assignee: Oracle International Corporation
    Inventors: Jungyong Lee, Singrong Li, Heechoul Park
  • Patent number: 8775693
    Abstract: An SD/SDIO host controller is disclosed, which includes a control register and interrupt generation module, an internal DMA module, an SD/SDIO command interface module, an SD/SDIO data interface module, and a frequency divider and trigger/sampling enable signal generation module which is connected to an output end of the control register and interrupt generation module; the frequency divider and trigger/sampling enable signal generation module employs a frequency divider to perform frequency division on a local high-speed clock so as to obtain the operating clock of the SD/SDIO card, and simultaneously generates a trigger/sampling enable signal by the frequency divider and enables the position of the enable signal to be adjustable with respect to the operating clock of the SD/SDIO card. The present invention is capable of solving the setup/hold time issues caused by delay in digital signals.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: July 8, 2014
    Assignee: Omnivision Technologies (Shanghai) Co., Ltd.
    Inventors: Yuchi Zheng, Jinxiang Chen
  • Patent number: 8775695
    Abstract: A specific identification information management device coupled to a feature expansion device includes: a storage unit configured to store the specific identification information of the feature expansion device; a detection unit configured to detect access to the feature expansion device; and a control unit configured to transmit the specific identification information stored in the storage unit to the source of access to the feature expansion device when the access is detected by the detection unit.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: July 8, 2014
    Assignee: Fujitsu Limited
    Inventors: Manabu Kanaya, Yukio Oguma
  • Patent number: 8775697
    Abstract: A method and a circuit for checking data transferred between a circuit and a processing unit, in which: the data originating from the circuit transit through a first buffer element having a size which is a multiple of the size of data to be subsequently delivered over a bus of the processing unit; an address provided by the processing unit for the circuit is temporarily stored in a second element; and the content of the first element is compared with current data originating from the circuit, at least when they correspond to an address of data already present in this first element.
    Type: Grant
    Filed: October 18, 2008
    Date of Patent: July 8, 2014
    Assignees: Proton World International N.V., STMicroelectronics S.A.
    Inventors: Fabrice Romain, Jean-Louis Modave
  • Patent number: 8769164
    Abstract: In a first aspect, a first method is provided for self-adjusting allocation of memory bandwidth in a network processor system. The first method includes the steps of (1) determining an amount of memory bandwidth of a network processor used by each of a plurality of data types; and (2) dynamically adjusting the amount of memory bandwidth allocated to at least one of the plurality of data types based on the determination. Numerous other aspects are provided.
    Type: Grant
    Filed: September 18, 2003
    Date of Patent: July 1, 2014
    Assignee: International Business Machines Corporation
    Inventors: Merwin H. Alferness, William J. Goetzinger, Kent H. Haselhorst, Lonny Lambrecht, Joshua W. Rensch
  • Patent number: 8762456
    Abstract: Technology is disclosed herein for a cloud based file system that facilitates storing data beyond a physical storage limit of a computing device. In some embodiments, the file system stores the metadata of the data in a local storage of the device and the data itself in a cloud storage. Upon accessing a data object on the device, the device obtains the data from the cloud storage and presents it to the user as if the content data is stored locally. The device identifies the data objects that are likely to be accessed by the user, pre-fetches the content of these data objects and stores them in a cache locally. Prefetching profiles are used to identify the data objects that are likely to be used based on a usage pattern of the data objects. Different prefetching profiles may be generated for multiple devices associated with the user.
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: June 24, 2014
    Assignee: Nextbit Systems Inc.
    Inventors: Michael A. Chan, Justin Quan, Michael K. Fleming
  • Patent number: 8762598
    Abstract: An arrangement with a superordinated control unit and at least one intelligent field device connectable with the control unit, wherein associated with the control unit is at least one interface with a connection element for accommodating a corresponding connection counterpart. The connection counterpart is associable with an interface module, wherein associated with the interface module is a software protection system securing accessing of the field device. The interface module permits communication between the corresponding field device and the superordinated control unit, wherein associated with the superordinated control unit is a software-protected processing program for the field device, and wherein the processing program is started or enabled via the software protection system, when the connection counterpart of the interface module of the field device is connected with the connection element of the control unit.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: June 24, 2014
    Assignee: Endress + Hauser Conducta Gesellschaft für Mess- und Regeltechnik mbH + Co. KG
    Inventors: Detlev Wittmer, Jörg Giebson, Stephan Buschnakowski, Stefan Pilz
  • Patent number: 8762599
    Abstract: In one embodiment, the present invention includes a method for handling a registration message received from a host processor, where the registration message delegates a poll operation with respect to a device from the host processor to another component. Information from the message may be stored in a poll table, and the component may send a read request to poll the device and report a result of the poll to the host processor based on a state of the device. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: June 24, 2014
    Assignee: Intel Corporation
    Inventors: Michael J. Espig, Zhen Fang, Ravishankar Iyer, David J. Harriman
  • Patent number: 8762619
    Abstract: A display device that has multiple inputs for receiving video data and peripheral data from multiple computing devices, and an output for attaching a peripheral. The display is operable in one of two states, to provide both a video and peripheral signal paths between a selected one of the interconnected computing devices and the display's panel and attached peripherals. At any given time only one of the computing devices may utilize both the display and any attached peripherals. Exemplary embodiments may handle video and peripheral data streams received from a computing device over a single physical link.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: June 24, 2014
    Assignee: ATI Technologies ULC
    Inventors: Lawrence H. Sasaki, David Glen
  • Patent number: 8744353
    Abstract: A Bluetooth mouse for fast switching linking objects comprises a signal processing circuit triggered by a key unit to generate a control signal according to a displacement amount of the mouse. The signal processing circuit is electrically connected with a Bluetooth transmission device. The mouse has a pairing information memory storing pairing codes for establishing data transmission linkages between the Bluetooth transmission device and at least one information processing systems. The key unit is programmed one key or a combination of the keys to trigger the signal processing circuit to generate an object-switching signal. The object-switching signal drives the Bluetooth transmission device to access one pairing code from the pairing information memory according to the displacement amount of the mouse, and establishes a data transmission linkage with one information processing system corresponding to the pairing code.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: June 3, 2014
    Assignee: Zippy Technology Corp.
    Inventor: Yu-Chun Hsieh
  • Patent number: 8745282
    Abstract: Methods operable on a storage controller and related structure are provided for responding to inquiry commands from a host for a storage device. A command requesting information about a storage device is received from a host. In response to the command, the storage controller determines that the storage device is not initialized, and begins an initialization process for the storage device. Information received from the storage device during the initialization process is stored for completing a response to the inquiry. A response to the inquiry is transmitted to the host based on the stored information to complete the inquiry without waiting for the storage device to complete the initialization.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: June 3, 2014
    Assignee: LSI Corporation
    Inventors: Sandeep Darisala, Sathya Prakash Veerichetty, Travis Veldkamp
  • Patent number: 8745290
    Abstract: A multi-modem device is disclosed. The multi-modem device includes a housing. Included within the housing is a plurality of modems, wherein the modems send and receive data along a common data bus. The multi-modem device further includes an interface that provides a connection that enables the modems to communicate with a computer, wherein each of the modems is made available to the computer so that the modems may be selected either individually or in parallel to provide one or more communication links to the computer.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: June 3, 2014
    Assignee: Hobnob, Inc.
    Inventors: Hisham Atef Sakr, Jared Go, Aron B. Hall
  • Patent number: 8745289
    Abstract: An image processing apparatus which is connected to a plurality of information processing apparatuses receives notification information, which includes information about each information processing apparatus and is transmitted from the plurality of information processing apparatuses, and displays an information processing apparatus corresponding to the notification information as a list. When a deletion instruction to delete a specific information processing apparatus from among the information processing apparatuses that are objects to be displayed is accepted, the image processing apparatus deletes the specific information processing apparatus from the list.
    Type: Grant
    Filed: December 9, 2009
    Date of Patent: June 3, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yoko Murase
  • Patent number: 8738823
    Abstract: Provided are a computer program product, system, and method for quiescing Input/Output (I/O) requests to subsets of logical addresses in a storage for a requested operation. A requested operation is received to a subset of addresses in the storage that requires that Input/Output (I/O) requests to the subset of addresses received following the requested operation be quiesced. The subset of addresses is indicated in quiesce information. I/O requests received following the receiving of the requested operation are quiesced when one address subject to the I/O request is included in the subset of addresses. If there are in-progress I/O requests pending against the subset of addresses when the requested operation was received, then the requested operation is indicated as executable. A quiesced I/O request is executed when no address subject to the quiesced I/O request is included in the subset of addresses indicated in the quiesce information.
    Type: Grant
    Filed: October 16, 2012
    Date of Patent: May 27, 2014
    Assignee: International Business Machines Corporation
    Inventors: Theresa M. Brown, Nedlaya Y. Francisco, Kurt A. Lovrien, Carol S. Mellgren, Jared M. Minch
  • Patent number: 8738822
    Abstract: The present invention provides a system and method for generating a control identity for binding together a component and a computer system including hardware devices and software applications. The binding system comprises a processor, a validator module for controlling the processor to generate the control identity, and a store for storing the control identity. The validator module is arranged to define a binding configuration for the component, representing a weighted combination of at least one of a set of hardware elements and a set of software elements needed within the computer system for operation of the component, the validator module also being arranged to prompt the processor to establish whether instances of the elements within the at least one set of elements are present in the computer system.
    Type: Grant
    Filed: May 3, 2005
    Date of Patent: May 27, 2014
    Assignee: Flexera Software LLC
    Inventor: Mohamed Shamil Uwais
  • Publication number: 20140143458
    Abstract: A mechanism is provided for offloading an input/output (I/O) completion operation. Responsive to a second processor identifying that a flag has been set by a first processor requesting assistance in completing an I/O operation, the second processor copies an I/O response from a first I/O response data structure associated with the first processor to a second I/O response data structure associated with the second processor. The second processor deletes the I/O response from the first I/O response data structure, clears the flag, and processes the I/O operation by addressing the I/O response in the second I/O response data structure. Responsive to completing the I/O operation, the second processor deletes the I/O response from the second I/O response data structure.
    Type: Application
    Filed: November 19, 2012
    Publication date: May 22, 2014
    Applicant: International Business Machines Corporation
    Inventors: Bruce G. Mealey, Greg R. Mewhinney, Mysore S. Srinivas, Suresh E. Warrier
  • Patent number: 8732355
    Abstract: Technology is disclosed for data prefetching on a computing device utilizing a cloud based file system. The technology can receive a current execution state and a data access pattern associated with an instance of an application executing on a computing device. The technology can further receive a data access pattern associated with another instance of the application executing on another computing device. The technology can utilize the received data access patterns to determine one or more future access requests for a subset of data associated with the application, where the one or more future access requests is a function of the current execution state of the application executing on the computing device. The technology can generate a prefetching profile utilizing the determined subset of data.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: May 20, 2014
    Assignee: Nextbit Systems Inc.
    Inventors: Michael A. Chan, Justin Quan, Michael K. Fleming
  • Patent number: 8732346
    Abstract: Coordinating methods of I/O access to a shared data store. A method includes at a node, in a distributed system, performing one or more I/O operations on the shared data store using direct I/O access on a virtual data container. Direct I/O access includes performing I/O operations directly from the node to the shared data store including not having an owner node perform the I/O operation on the shared data store on the node's behalf. The owner node is a different node than the node doing the direct I/O operation. The owner node accesses the shared data store through a local data container. The method further includes determining that one or more subsequent I/O operations should be performed using redirected I/O access, where I/O operations are directed through a centralized node. The method further includes indicating to nodes in the distributed system to switch to redirected I/O access method.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: May 20, 2014
    Assignee: Microsoft Corporation
    Inventors: Andrea D'Amato, Vinod R. Shankar, Alan Warwick
  • Patent number: 8732354
    Abstract: A method and apparatus for controlling access to a storage area network among a group of hosts in a distributed computing environment. A host requests access to the storage area network by issuing an input/output request, and the input/output request is intercepted at the dynamic multipath (DMP) layer. The DMP layer checks the input/output request against an access control list. The DMP layer can grant or deny the input/output request from the host system. If the input/output request is granted, then the DMP layer passes on the input/output request to the HBA driver layer and the host is allowed to access the storage area network. If the request to access the storage area network is denied, the DMP management layer can initiate an appropriate response, such as a security procedure or generation of an error message alerting a user the request has been denied.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: May 20, 2014
    Assignee: Symantec Operating Corporation
    Inventor: Tommi Salli
  • Patent number: 8732341
    Abstract: Some embodiments include methods and apparatus to decode a functional request embedded in a portion of a standard device request, and execute the functional request by a universal serial bus (USB) device. The standard device request can include a Get_Descriptor request. Other embodiments are described.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 20, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Girish Desai, Senthil Chellamuthu
  • Patent number: 8732345
    Abstract: A disclosed image forming apparatus includes an image processing device including plural image processing units; a control device configured to control the plural image processing units; and a connection unit configured to connect the image processing device to the control device. Each of the plural image processing units is connected to the control device by one of plural channels; the image processing device is connected to the control device by a first bus including the channels; and the connection unit is provided on the first bus so that the image processing device is connected to the control device by a single connection unit.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 20, 2014
    Assignee: Ricoh Company, Ltd.
    Inventors: Takashi Aihara, Hidemasa Morimoto
  • Patent number: 8732356
    Abstract: A storage system includes: an access path management unit managing a state of each access path for each logical disk; an I/O speed calculation unit storing, for each of the access paths, a data size and required time obtained when an I/O is executed, and calculates an I/O speed for every calculation cycle; a path candidate selection unit selecting an access path in the available state as an I/O use candidate; and a path candidate exclusion unit which excludes access paths of which speed is slow from the candidates, using a highest speed value among the speed values of the access paths selected as candidates, and the access path management unit sequentially changes the states of the access paths, out of the remaining candidates, to the I/O use states, in order of the I/O speed from the fastest until the number of access paths reaches the maximum number of paths.
    Type: Grant
    Filed: March 20, 2012
    Date of Patent: May 20, 2014
    Assignee: NEC Corporation
    Inventor: Masanori Kabakura
  • Patent number: 8725912
    Abstract: A method for binding input/output (I/O) objects to nodes. The method includes receiving, by an I/O Subsystem, a request to use an I/O device from a process, determining a first resource to service the request, and generating a first I/O object corresponding to the first resource. The method includes sending the first I/O object to a NUMA I/O Framework, obtaining a first I/O object effective load from the first I/O object, and obtaining a first I/O load capacity of a first NUMA node of a plurality of NUMA nodes. The method includes comparing the first I/O load capacity and the first I/O object effective load, selecting the first NUMA node based on a determination that the first I/O load capacity is greater than the first I/O object effective load, binding the first I/O object to the first NUMA node, and processing the first resource corresponding to the first I/O object.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: May 13, 2014
    Assignee: Oracle International Corporation
    Inventors: Nicolas G. Droux, Stuart J. Maybee
  • Patent number: 8725924
    Abstract: A method of operation of an information backup system includes: supplying a power to a first communication port and a second communication port; electrically connecting a host microcontroller to the first communication port for connecting a handheld device; electrically connecting the host microcontroller to the second communication port for connecting a mass storage device, the host microcontroller is for functioning as a host to the second communication port and the first communication port; and transferring data between the first communication port and the second communication port.
    Type: Grant
    Filed: October 13, 2011
    Date of Patent: May 13, 2014
    Assignee: ClevX, LLC
    Inventors: Simon B. Johnson, Lev M. Bolotin
  • Patent number: 8725913
    Abstract: A method for binding input/output (I/O) objects to nodes includes an subsystem receiving a request to use an I/O device from a process, determining a first resource to service the request, generating a first I/O object corresponding to the first resource, wherein the first I/O object is unbound, and sending the first I/O object to a Non-Uniform Memory Access (NUMA) I/O Framework. The method further includes the NUMA I/O Framework selecting a first NUMA node of a plurality of NUMA nodes, to which to bind the first I/O object and binding the first I/O object to the first NUMA node. The method further includes servicing the request by processing, on the first NUMA node, the first resource corresponding to the first I/O object.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: May 13, 2014
    Assignee: Oracle International Corporation
    Inventors: Nicolas G. Droux, Jonathan Chew, Rajagopal Kunhappan
  • Publication number: 20140129742
    Abstract: A technique for controlling (e.g. (re)setting, adjusting, fixing, increasing, decreasing, determining, monitoring, calculating, measuring, storing) a holding time of a request from a controller of a host device to an endpoint of a peripheral device across a universal serial bus reduces power and memory loss and enhances overall system performance. The host device may include a programmable and/or hardwired controller for controlling the amount of time before the request from the host device is initially sent and/or resent to the endpoint of the peripheral device across the universal serial bus.
    Type: Application
    Filed: November 8, 2012
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Chung-Hong Lai, Krishnaraj S. Rao, Rahul Jain
  • Publication number: 20140129743
    Abstract: A plurality of devices for sending and receiving a signal relating to a process are capable of being connected to an input/output instrument. The input/output instrument includes an operating signal receiving portion that receives, from a first device that is one of the plurality of the devices, an operating signal corresponding to a specific operating instruction, a selecting portion that selects, based on the operating signal that has been received by the operating signal receiving portion, any single second device, from among the devices connected to a local input/output instrument, other than the first device that is the source that sent the operating signal, and a remote device information sending portion that sends as remote device information to the first device that was the source that sent the operating signal, information pertaining to the second device that was selected by the selecting portion.
    Type: Application
    Filed: November 7, 2013
    Publication date: May 8, 2014
    Applicant: AZBIL CORPORATION
    Inventor: Toshiya MORITA
  • Patent number: 8719496
    Abstract: A storage apparatus includes a microprocessor package configured to access a logical volume and a local memory in the microprocessor package. An input/output (I/O) request range of one I/O request, including a start position address and an end position address of the logical volume which is a target of the one I/O request, is stored in the local memory. A counter value indicating a number of I/O requests to and from the logical volume associated with the one I/O request is acquired and stored in the local memory. If the counter value associated with the one I/O request is greater than the counter value associated with another I/O request, the I/O request ranges of the one I/O request and the other I/O request are compared. If there is no overlap between the I/O request ranges, the one I/O request is executed; otherwise, the one I/O request is placed on standby.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: May 6, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Takumi Sano, Isamu Kurokawa, Akihiro Mori, Ran Ogata, Yuya Goto
  • Patent number: 8719467
    Abstract: The present invention belongs to the field of computer, and particularly provides a method, an apparatus and a system for mounting a file system. The method comprises: requesting, from a node mounted with a file system of a storage stack at the network distal end, for metadata corresponding to the mounting when the file system of the storage stack is to be mounted; receiving metadata transmitted by the node mounted with the file system of the storage stack, and caching the metadata in a memory; and mounting the file system of the storage stack according to the metadata; wherein the network bandwidth is larger than the IO bandwidth of the storage stack. The technical solutions provided by the present invention have the advantages that the time for mounting the file system is short and the reading and writing efficiency of the operating system is high.
    Type: Grant
    Filed: April 30, 2013
    Date of Patent: May 6, 2014
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Zhenghu Wen
  • Patent number: 8713204
    Abstract: A method includes receiving from a host multiple commands for execution in a memory, in accordance with a storage protocol that supports processing of only a single command at any given time. At a first time, a first command is executed in the memory and data related to the first command is exchanged with the host, even though a second command, different from the first command, is selected to serve as the single command for which the processing is currently supported in accordance with the storage protocol. A progress of the first command is reported to the host at a second time, which is later than the first time, upon detecting that the first command is selected to serve as the single command for which the processing is currently supported.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: April 29, 2014
    Assignee: Apple Inc.
    Inventor: Arie Peled
  • Patent number: 8713182
    Abstract: An aspect of the present invention facilitates selecting suitable nodes to host virtual machines (VMs) in an environment containing a large number of nodes (such as a grid). In one embodiment, information indicating corresponding resources available in each machine node (a node capable of hosting VMs) in the grid is maintained distributed over a set of management nodes contained in the grid. On receiving an indication that a VM requiring a set of resources is sought to be hosted, a machine node having available the set of resources is identified based on the distributed information. The VM is then provisioned/hosted on the identified machine node. The maintenance of the resource availability information distributed across multiple management nodes enables the solution to be scaled for use in environments having a large number of nodes.
    Type: Grant
    Filed: August 3, 2009
    Date of Patent: April 29, 2014
    Assignee: Oracle International Corporation
    Inventor: Vijay Srinivas Agneeswaran
  • Patent number: 8713217
    Abstract: A computer system has a master device having a first register for storing a first process ID associated with a software process number. The master device transmits the first process ID onto a system bus when it generates a transaction. The computer system has a slave device holding a second process ID for permitting access. The slave device accepts the transaction when the first process ID and the second process ID meet a predetermined condition.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: April 29, 2014
    Assignee: Nec Corporation
    Inventor: Kouhei Nadehara