Abstract: Methods and apparatus for producing a semiconductor on glass (SOG) structure include: bringing a first surface of a glass substrate into direct or indirect contact with a semiconductor wafer; heating at least one of the glass substrate and the semiconductor wafer such that a second surface of the glass substrate, opposite to the first surface thereof, is at a lower temperature than the first surface; applying a voltage potential across the glass substrate and the semiconductor wafer; and maintaining the contact, heating and voltage to induce an anodic bond between the semiconductor wafer and the glass substrate via electrolysis.

Abstract: The invention relates to a method for preparing a surface of a semiconductor substrate by oxidizing the surface of the semiconductor substrate to thereby transform the natural oxide into an artificial oxide and then removing the artificial oxide, in particular to obtain an oxide-free substrate surface.

Abstract: A method that in one embodiment is useful in bonding a first substrate to a second substrate includes forming a layer including metal over the first substrate. The layer including metal in one embodiment surrounds a semiconductor device, which can be a micro electromechanical system (MEMS) device. On the second substrate is formed a first layer comprising silicon. A second layer comprising germanium and silicon is formed on the first layer. A third layer comprising germanium is formed on the second layer. The third layer is brought into contact with the layer including metal. Heat (and pressure in some embodiments) is applied to the third layer and the layer including metal to form a mechanical bond material between the first substrate and the second substrate in which the mechanical bond material is electrically conductive. In the case of the mechanical bond surrounding a semiconductor device such as a MEMS, the mechanical bond can be particularly advantageous as a hermetic seal for protecting the MEMS.

Abstract: An electronic element wafer module is provided, in which a transparent support substrate is disposed facing a plurality of electronic elements formed on a wafer and a plurality of wafer-shaped optical elements are disposed on the transparent support substrate, where a groove is formed along a dicing line between the adjacent electronic elements, penetrating from the optical elements through the transparent support substrate, with a depth reaching a surface of the wafer or with a depth short of the surface of the wafer; and a light shielding material is applied on side surfaces and a bottom surface of the groove or is filled in the groove, and the light shielding material is applied or formed on a peripheral portion of a surface of the optical element, except for on a light opening in a center of the surface.

Abstract: A method of fabricating a joined wafer has an exposure process which comprises a device formed-area exposure process of exposing by a stepper such that parts of the photosensitive adhesive layer formed over a surface of the transparent wafer or the device formed wafer are removed, the parts corresponding to the device formed areas when the transparent wafer and the device formed wafer are stuck together; and a wafer periphery exposure process of exposing such that a portion of the photosensitive adhesive layer over the periphery of the transparent wafer is left.

Abstract: An object is to manufacture a semiconductor substrate having a single crystal semiconductor layer with favorable characteristics, without requiring CMP treatment and/or heat treatment at high temperature. In addition, another object is to improve productivity of semiconductor substrates. Vapor-phase epitaxial growth is performed by using a first single crystal semiconductor layer provided over a first substrate as a seed layer, whereby a second single crystal semiconductor layer is formed over the first single crystal semiconductor layer, and separation is performed at an interface of the both layers. Thus, the second single crystal semiconductor layer is transferred to the second substrate to provide a semiconductor substrate, and the semiconductor substrate is reused by performing laser light treatment on the seed layer.

Abstract: The invention relates to a process for manufacturing a multilayered semiconductor wafer comprising a handle wafer (5) and a layer (40) comprising silicon carbide bonded to the handle wafer (5), the process comprising the steps of: a) providing a handle wafer (5), b) providing a donor wafer (1) comprising a donor layer (2) and a remainder (3) of the donor wafer, the donor layer (2) comprising monocrystalline silicon, e) bonding the donor layer (2) of the donor wafer (1) to the handle wafer (5), and f) removing the remainder (3) of the donor wafer in order to expose the donor layer (2) which remains bonded to the handle wafer (5), the process being characterized by further steps of c) implanting carbon ions into the donor layer (2) in order to produce a layer (4) comprising implanted carbon, and d) heat-treating the donor layer (2) comprising the layer (4) comprising implanted carbon in order to form a silicon carbide donor layer (44) in at least part of the donor layer (2).

Abstract: A method for manufacturing a high quality semiconductor device having a through via structure. A substrate is manufactured with an oxide layer including a window region in a region in which a through via is formed. The substrate is bonded with another substrate to form an SOI substrate. The SOI substrate is ground to reduce its thickness. An island region is formed in a region at which a TSV (Through Silicon Via) structure is formed. A device and a TSV are coupled by a wire. The silicon substrate at a bottom side of the SOI substrate is removed to expose the island region from the bottom. A back contact for the TSV is formed in the window region, which is formed in a buried oxide layer.

Abstract: A photovoltaic cell device, e.g., solar cell, solar panel, and method of manufacture. The device has an optically transparent substrate comprises a first surface and a second surface. A first thickness of material (e.g., semiconductor material, single crystal material) having a first surface region and a second surface region is included. In a preferred embodiment, the surface region is overlying the first surface of the optically transparent substrate. The device has an optical coupling material provided between the first surface region of the thickness of material and the first surface of the optically transparent material. A second thickness of semiconductor material is overlying the second surface region to form a resulting thickness of semiconductor material.

Abstract: Techniques are here disclosed for a solar cell pre-processing method and system for annealing and gettering a solar cell semiconductor wafer having an undesirably high dispersion of transition metals, impurities and other defects. The process forms a surface contaminant layer on the solar cell semiconductor (e.g., silicon) wafer. A surface of the semiconductor wafer receives and holds impurities, as does the surface contaminant layer. The lower-quality semiconductor wafer includes dispersed defects that in an annealing process getter from the semiconductor bulk to form impurity cluster toward the surface contaminant layer. The impurity clusters form within the surface contaminant layer while increasing the purity level in wafer regions from which the dispersed defects gettered. Cooling follows annealing for retaining the impurity clusters and, thereby, maintaining the increased purity level of the semiconductor wafer in regions from which the impurities gettered.

Abstract: An adhesive bonding sheet having an optically transmitting supporting substrate and an adhesive bonding layer, and being used in both a dicing step and a semiconductor element adhesion step, wherein the adhesive bonding layer comprises: a polymer component (A) having a weight average molecular weight of 100,000 or more including functional groups; an epoxy resin (B); a phenolic epoxy resin curing agent (C); a photoreactive monomer (D), wherein the Tg of the cured material obtained by ultraviolet light irradiation is 250° C. or more; and a photoinitiator (E) which generates a base and a radical by irradiation with ultraviolet light of wavelength 200-450 nm.

Abstract: Forming an insulating film on a surface of the single crystal semiconductor substrate, forming a fragile region in the single crystal semiconductor substrate by irradiating the single crystal semiconductor substrate with an ion beam through the insulating film, forming a bonding layer over the insulating film, bonding a supporting substrate to the single crystal semiconductor substrate by interposing the bonding layer between the supporting substrate and the single crystal semiconductor substrate, dividing the single crystal semiconductor substrate at the fragile region to separate the single crystal semiconductor substrate into a single crystal semiconductor layer attached to the supporting substrate, performing first dry etching treatment on a part of the fragile region remaining on the single crystal semiconductor layer, performing second dry etching treatment on a surface of the single crystal semiconductor layer subjected to the first etching treatment, and irradiating the single crystal semiconductor la

Abstract: A semiconductor device having a semiconductor element (a thin film transistor, a thin film diode, a photoelectric conversion element of silicon PIN junction, or a silicon resistor element) which is light-weight, flexible (bendable), and thin as a whole is provided as well as a method of manufacturing the semiconductor device. In the present invention, the element is not formed on a plastic film. Instead, a flat board such as a substrate is used as a form, the space between the substrate (third substrate (17)) and a layer including the element (peeled layer (13)) is filled with coagulant (typically an adhesive) that serves as a second bonding member (16), and the substrate used as a form (third substrate (17)) is peeled off after the adhesive is coagulated to hold the layer including the element (peeled layer (13)) by the coagulated adhesive (second bonding member (16)) alone. In this way, the present invention achieves thinning of the film and reduction in weight.

Abstract: A bonding pad includes multiple metal layers, insulation layers disposed between the multiple metal layers, and a fixing pin coupled between the uppermost metal layer and an underlying metal layer of the multiple metal layers, where a bonding is performed on the uppermost metal layers.

Abstract: A manufacturing method of a highly reliable semiconductor with a waterproof property. The method includes the steps of: sequentially forming a peeling layer, an inorganic insulating layer, and an element formation layer including an organic compound layer, over a substrate; separating the peeling layer and the inorganic insulating layer from each other, or separating the substrate and the inorganic insulating layer from each other; removing a part of the inorganic insulating layer or a part of the inorganic insulating layer and the element formation layer, thereby isolating at least the inorganic insulating layer into a plurality of sections so that at least two layers among the organic compound layer, a flexible substrate, and an adhesive agent are stacked at outer edges of the isolated inorganic insulating layers; and cutting a region where at least two layers among the organic compound layer, the flexible substrate, and the adhesive agent are stacked.

Abstract: A method of fabricating a semiconductor substrate structure comprises forming an oxide region in contact with a first semiconductor, e.g. silicon, substrate, implanting P-type dopants into the first semiconductor substrate to form a P-doped region, bonding the oxide region to a second semiconductor, e.g. silicon, substrate, and removing a portion of the first semiconductor substrate before or after implanting.

Abstract: Systems and methods are disclosed for bonding of semiconductor, metal, metal-ceramic or combinations of these substrates using microwave energy. In some embodiments, metal-ceramic substrates carrying semiconductor substrates can be bonded simultaneously through a thin interlayer metal to a metal substrate by using microwave energy. In some embodiments, other substrate combinations can be bonded by using microwave energy. High intensity microwave energy is applied to the substrate assembly positioned within a microwave cavity. A process of selective heating can occur in the thin interlayer metal enhanced by the presence of third microwave absorbing substrate, resulting in melting of the thin interlayer metal to facilitate bonding of the two substrates. Some of the advantages associated with such bonding process are disclosed.

Abstract: A method for minimizing or avoiding contamination of a receiving handle wafer during transfer of a thin layer from a donor wafer. This method includes providing a donor wafer and a receiving handle wafer, each having a first surface prepared for bonding and a second surface, with the donor wafer providing a layer of material to be transferred to the receiving handle wafer. Next, at least one of the first surfaces is treated to provide increased bonding energy when the first surfaces are bonded together; the surfaces are then bonded together to form an intermediate multilayer structure; and a portion of the donor wafer is removed to transfer the thin layer to the receiving handle wafer and form the semiconductor structure. This method avoids or minimizes contamination of the second surface of the receiving handle wafer by treating only the first surface of the donor wafer prior to bonding by exposure to a plasma, and by conducting any thermal treatments after plasma activation at a temperature of 300° C.

Abstract: Reconditioned donor substrates that include a remainder substrate from a donor substrate wherein the remainder substrate has a detachment surface where a transfer layer was detached and an opposite surface; and an additional layer deposited upon the opposite surface of the remainder substrate to increase its thickness and to form the reconditioned substrate. The reconditioned substrate is recycled as a donor substrate for fabricating compound material wafers and is typically made from gallium nitride donor substrates.

Abstract: A method for transferring a thin layer from an initial substrate includes forming an assembly of the initial substrate with one face of a silicone type polymer layer, this face having been treated under an ultraviolet radiation, and processing the initial substrate to form the thin layer on the silicone type polymer layer.

Abstract: A wafer for backside illumination type solid imaging device having a plurality of pixels inclusive of a photoelectric conversion device and a charge transfer transistor at its front surface side and a light receiving surface at its back surface side is produced by a method comprising a step of forming a BOX oxide layer on at least one of a wafer for support substrate and a wafer for active layer, a step of bonding the wafer for support substrate and the wafer for active layer and a step of thinning the wafer for active layer, which further comprises a step of forming a plurality of concave portions on a bonding face of the BOX oxide layer to the other wafer and filling a polysilicon plug into each of the concave portions to form a composite layer before the step of bonding the wafer for support substrate and the wafer for active layer.

Abstract: A semiconductor structure and a method of manufacturing a silicon on insulator (SOI) structure having a silicon germanium (SiGe) layer interposed between the silicon and the insulator. According to one manufacturing method, a first SiGe layer, a silicon layer, and a second SiGe layer are epitaxially grown in sequence over a first substrate, and then an insulating layer is formed on the second SiGe layer. Then, impurity ions are implanted into a predetermined location of the first substrate underlying the first SiGe layer to form an impurity implantation region. A second substrate is bonded to the insulating layer on the first substrate. After the first substrate is separated along the impurity implantation region and removed, the first SiGe layer remaining on the surface of the separated region is removed so that the surface of the silicon layer may be exposed.

Abstract: A method of fabricating a mixed microtechnology structure includes providing a provisional substrate including a sacrificial layer on which is formed a mixed layer including at least first patterns of a first material and second patterns of a second material different from the first material, where the first and second patterns reside adjacent the sacrificial layer. The sacrificial layer is removed exposing a mixed surface of the mixed layer, the mixed surface including portions of the first patterns and portions of the second patterns. A continuous is formed covering layer of a third material on the mixed surface by direct bonding.

Abstract: A bonded substrate comprising two semiconductor substrates is provided. Each semiconductor substrate includes semiconductor devices. At least one through substrate via is provided between the two semiconductor substrates to provide a signal path therebetween. The bottom sides of the two semiconductor substrate are bonded by at least one bonding material layer that contains a cooling mechanism. In one embodiment, the cooling mechanism is a cooling channel through which a cooling fluid flows to cool the bonded semiconductor substrate during the operation of the semiconductor devices in the bonded substrate. In another embodiment, the cooling mechanism is a conductive cooling fin with two end portions and a contiguous path therebetween. The cooling fin is connected to heat sinks to cool the bonded semiconductor substrate during the operation of the semiconductor devices in the bonded substrate.

Abstract: The present invention provides methods, systems and system components for transferring, assembling and integrating features and arrays of features having selected nanosized and/or microsized physical dimensions, shapes and spatial orientations. Methods of the present invention utilize principles of ‘soft adhesion’ to guide the transfer, assembly and/or integration of features, such as printable semiconductor elements or other components of electronic devices. Methods of the present invention are useful for transferring features from a donor substrate to the transfer surface of an elastomeric transfer device and, optionally, from the transfer surface of an elastomeric transfer device to the receiving surface of a receiving substrate. The present methods and systems provide highly efficient, registered transfer of features and arrays of features, such as printable semiconductor element, in a concerted manner that maintains the relative spatial orientations of transferred features.

Abstract: A process for treating a structure to prepare it for electronics or optoelectronics applications. The structure includes a bulk substrate, an oxide layer, and a semiconductor layer, and the process includes providing a masking to define on the semiconductor layer a desired pattern, and applying a thermal treatment for removing a controlled thickness of oxide in the regions of the oxide layer corresponding to the desired pattern to assist in preparing the structure.

Abstract: A silicon layer having a conductivity type opposite to that of a bulk is provided on the surface of a silicon substrate and hydrogen ions are implanted to a predetermined depth into the surface region of the silicon substrate through the silicon layer to form a hydrogen ion-implanted layer. Then, an n-type germanium-based crystal layer whose conductivity type is opposite to that of the silicon layer and a p-type germanium-based crystal layer whose conductivity type is opposite to that of the germanium-based crystal layer are successively vapor-phase grown to provide a germanium-based crystal. The surface of the germanium-based crystal layer and the surface of the supporting substrate are bonded together. In this state, impact is applied externally to separate a silicon crystal from the silicon substrate along the hydrogen ion-implanted layer, thereby transferring a laminated structure composed of the germanium-based crystal and the silicon crystal onto the supporting substrate.

Abstract: A silicon wafer which achieves a gettering effect without occurrence of slip dislocations is provided, and the silicon wafer is subject to heat treatment after slicing from a silicon monocrystal ingot so that a layer which has zero light scattering defects according to the 90° light scattering method is formed in a region at a depth from the wafer surface of 25 ?m or more but less than 100 ?m, and a layer which has a light scattering defect density of 1×108/cm3 or more according to the 90° light scattering method is formed in a region at a depth of 100 ?m from the wafer surface.

Abstract: Materials, and methods that use such materials, that are useful for forming chip stacks, chip and wafer bonding and wafer thinning are disclosed. Such methods and materials provide strong bonds while also being readily removed with little or no residues.

Abstract: A semiconductor structure that includes a monocrystalline germanium-containing layer, preferably substantially pure germanium, a substrate, and a buried insulator layer separating the germanium-containing layer from the substrate. A porous layer, which may be porous silicon, is formed on a substrate and a germanium-containing layer is formed on the porous silicon layer. The porous layer may be converted to a layer of oxide, which provides the buried insulator layer. Alternatively, the germanium-containing layer may be transferred from the porous layer to an insulating layer on another substrate. After the transfer, the insulating layer is buried between the latter substrate and the germanium-containing layer.

Abstract: It is shown in the invention a method for manufacturing a semiconductor wafer structure with an active layer for impurity removal, which method comprises phases of depositing a first layer on a first wafer surface for providing an active layer, an optional phase of preparation for said first layer for next phase, growing thermal oxide layer on a second wafer, bonding said first and second wafers into a stack, annealing the stack for a crystalline formation in said thermal oxide layer as a second layer, and thinning said first wafer to a pre-determined thickness. The invention concerns also a wafer manufactured according to the method, chip that utilizes such a wafer structure and an electronic device utilizing such a chip.

Abstract: A manufacturing method of an SOI substrate which possesses a base substrate having low heat resistance and a very thin semiconductor layer having high planarity is demonstrated. The method includes: implanting hydrogen ions into a semiconductor substrate to form an ion implantation layer; bonding the semiconductor substrate and a base substrate such as a glass substrate, placing a bonding layer therebetween; heating the substrates bonded to each other to separate the semiconductor substrate from the base substrate, leaving a thin semiconductor layer over the base substrate; irradiating the surface of the thin semiconductor layer with laser light to improve the planarity and recover the crystallinity of the thin semiconductor layer; and thinning the thin semiconductor layer. This method allows the formation of an SOI substrate which has a single-crystalline semiconductor layer with a thickness of 100 nm or less over a base substrate.

Abstract: A method of manufacturing a semiconductor device of the present invention includes a coating process in which a pasty thermosetting resin composition having a flux activity is coated on at least either one of a substrate and a semiconductor chip; a bonding process in which the substrate and the semiconductor chip are electrically bonded while placing the pasty thermosetting resin composition in between; a curing process in which the pasty thermosetting resin composition is cured under heating; and a cooling process, succeeding to the curing process, in which cooling is performed at a cooling rate between 10[° C./hour] or above and 50[° C./hour] or below.

Abstract: It is an object to provide a method for manufacturing a semiconductor substrate in which contamination of a semiconductor layer due to an impurity is prevented and the bonding strength between a support substrate and the semiconductor layer can be increased. An oxide film containing first halogen is formed on a surface of a semiconductor substrate, and the semiconductor substrate is irradiated with ions of second halogen, whereby a separation layer is formed and the second halogen is contained in a semiconductor substrate. Then, heat treatment is performed in a state in which the semiconductor substrate and the support substrate are superposed with an insulating surface containing hydrogen interposed therebetween, whereby part of the semiconductor substrate is separated along the separation layer, so that a semiconductor layer containing the second halogen is provided over the support substrate.

Abstract: A process for fabricating a composite structure for epitaxy, including at least one crystalline growth seed layer of semiconductor material on a support substrate, with the support substrate and the crystalline growth seed layer each having, on the periphery of their bonding face, a chamfer or an edge rounding zone. The process includes at least one step of wafer bonding the crystalline growth seed layer directly onto the support substrate and at least one step of thinning the crystalline growth seed layer. After thinning, the crystalline growth seed layer has a diameter identical to its initial diameter.

Abstract: A plurality of wafers are aligned and stacked on a thermally variable rotary table, the table and stack are rotated, and an underfill material is disposed and cured between wafers in the stack, bonding the wafers. Corresponding wafer portions of the plurality of wafers in the stack may be singulated from the stack, and may comprise semiconductor device packages either individually or when coupled with a substrate.

Abstract: A method of producing a bonded wafer, comprising: performing bonding of a first semiconductor wafer and a second semiconductor wafer without interposing an insulation film in between; and performing thinning of the second semiconductor wafer, wherein surface portions at least including bonded surfaces of the first semiconductor wafer and the second semiconductor wafer have an oxygen concentration of 1.0×1018 atoms/cm3 (Old ASTM) or less.

Abstract: A method for micropatterning a radiation-emitting surface of a semiconductor layer sequence for a thin-film light-emitting diode chip. The semiconductor layer sequence is grown on a substrate. A mirror layer is formed or applied on the semiconductor layer sequence, which reflects back into the semiconductor layer sequence at least part of a radiation that is generated in the semiconductor layer sequence during the operation thereof and is directed toward the mirror layer. The semiconductor layer sequence is separated from the substrate by means of a lift-off method, in which a separation zone in the semiconductor layer sequence is at least partly decomposed in such a way that anisotropic residues of a constituent of the separation zone, in particular a metallic constituent of the separation layer, remain at the separation surface of the semiconductor layer sequence, from which the substrate is separated.

Abstract: One surface of a single crystal semiconductor substrate is irradiated with ions to form a damaged region in the single crystal semiconductor substrate. An insulating layer is formed over the one surface of the single crystal semiconductor substrate. A surface of a substrate having an insulating surface and a surface of the insulating layer are disposed in contact with each other to bond the substrate having the insulating surface and the single crystal semiconductor substrate to each other. Heat treatment is performed to divide the single crystal semiconductor substrate along the damaged region and to form a semiconductor layer over the substrate having the insulating surface. One surface of the semiconductor layer is irradiated with light from a flash lamp under conditions where the semiconductor layer is not melted, to repair a defect.

Abstract: A manufacturing method of a highly reliable semiconductor with a waterproof property. The method includes the steps of: sequentially forming a peeling layer, an inorganic insulating layer, and an element formation layer including an organic compound layer, over a substrate; separating the peeling layer and the inorganic insulating layer from each other, or separating the substrate and the inorganic insulating layer from each other; removing a part of the inorganic insulating layer or a part of the inorganic insulating layer and the element formation layer, thereby isolating at least the inorganic insulating layer into a plurality of sections so that at least two layers among the organic compound layer, a flexible substrate, and an adhesive agent are stacked at outer edges of the isolated inorganic insulating layers; and cutting a region where at least two layers among the organic compound layer, the flexible substrate, and the adhesive agent are stacked.

Abstract: A microstructure of the semiconductor on insulator type with different patterns is produced by forming a stacked uniform structure including a plate forming a substrate, a continuous insulative layer and a semiconductor layer. The continuous insulative layer is a stack of at least three elementary layers, including a bottom elementary layer, at least one intermediate elementary layer, and a top elementary layer overlying the semiconductor layer, where at least one of the bottom elementary layer and the top elementary layer being of an insulative material. In the stacked uniform structure, at least two patterns are differentiated by modifying at least one of the elementary layers in one of the patterns so that the elementary layer has a significantly different physical or chemical property between the two patterns, where at least one of the bottom and top elementary layer is an insulative material that remains unchanged.

Abstract: A substrate with which a semiconductor device with excellent electric characteristics and high reliability can be manufactured is provided. An aspect of the invention is a method for manufacturing a substrate for manufacturing a semiconductor device: a first silicon oxide film, a silicon nitride film, and a second silicon oxide film are stacked in this order over a surface of a semiconductor substrate by a thermal CVD method, and then a weakened layer is formed at a given depth of the semiconductor substrate; the semiconductor substrate and a substrate having an insulating surface are arranged to face each other, and the second silicon oxide film provided for the semiconductor substrate and a supporting substrate are bonded to each other; and the semiconductor substrate is separated at the weakened layer by heat treatment, whereby a semiconductor film separated from the semiconductor substrate is left over the substrate having the insulating surface.

Abstract: A semiconductor apparatus includes two thin semiconductor films bonded to a substrate, and a thin-film interconnecting line electrically connecting a semiconductor device such as a light-emitting device in the first thin semiconductor film to an integrated circuit in the second thin semiconductor film. Typically, the integrated circuit drives the semiconductor device. The two thin semiconductor films are formed separately from the substrate. The first thin semiconductor film may include an array of semiconductor devices. The first and second thin semiconductor films may be replicated as arrays bonded to the same substrate. Compared with conventional semiconductor apparatus comprising an array chip and a separate driver chip, the invented apparatus is smaller and has a reduced material cost.

Abstract: A hypersensitive semiconductor die structure is disclosed, in which flip-chip packaging is used in conjunction with a modified SOI die in which a thick silicon support substrate has been removed to increase sensitivity of the sensing device. Rather than being located beneath layers of interconnects and dielectric, the disclosed structure places the sensing devices close to the surface, more closely exposed to the environment in which sensing is to occur. The structure also allows for the placement of sensing films on nearer to the sensing devices and/or an oxide layer overlying the sensing devices.

Abstract: Economical methods for forming a co-planar multi-chip wafer-level packages are proposed. Partial wafer bonding and partial wafer dicing techniques are used to create chips as well as pockets. The finished chips are then mounted in the corresponding pockets of a carrier substrate, and global interconnects among the chips are formed on the top planar surface of the finished chips. The proposed methods facilitate the integration of chips fabricated with different process steps and materials. There is no need to use a planarization process such as chemical-mechanical polish to planarize the top surfaces of the chips. Since the chips are precisely aligned to each other and all the chips are mounted facing up, the module is ready for global wiring, which eliminates the need to flip the chips from an upside-down position.

Abstract: In aspects of the present invention, a method is disclosed to form a lamina having opposing first and second surfaces. Heavily doped contact regions extend from the first surface to the second surface. Generally the lamina is formed by affixing a semiconductor donor body to a receiver element, then cleaving the lamina from the semiconductor donor body wherein the lamina remains affixed to the receiver element. In the present invention, the heavily doped contact regions are formed by doping the semiconductor donor body before cleaving of the lamina. A photovoltaic cell comprising the lamina is then fabricated. By forming the heavily doped contact regions before bonding to the receiver element and cleaving, post-bonding high-temperature steps can be avoided, which may be advantageous.

Abstract: A silicon interposer producing method comprising the steps of forming through holes 12 in a silicon wafer 11, forming an oxide coating 13 on the silicon wafer 11, providing a power feeding layer 14 for plating on one of the surfaces of the through holes 12, supplying a low thermal expansion filler 15 having a thermal expansion coefficient lower than the thermal expansion coefficient of the conductive material 16 of through-hole electrodes 17 to the through holes 12, filling the conductive material 16 into the through holes 12 by plating to form the through-hole electrodes 17, and removing the power feeding layer 14 for plating.

Abstract: Methods are disclosed for preparing a reconditioned donor substrate by providing a remainder substrate from a donor substrate wherein the remainder substrate has a detachment surface where a transfer layer was detached and an opposite surface; and depositing an additional layer onto the opposite surface of the remainder substrate to increase its thickness and to form a reconditioned substrate. The reconditioned substrate is recycled as a donor substrate for fabricating compound material wafers.

Abstract: There is provided a method for suppressing the occurrence of defects such as voids or blisters even in the laminated wafer having no oxide film wherein hydrogen ions are implanted into a wafer for active layer having no oxide film on its surface to form a hydrogen ion implanted layer, and ions other than hydrogen are implanted up to a position that a depth from the surface side the hydrogen ion implantation is shallower than the hydrogen ion implanted layer, and the wafer for active layer is laminated onto a wafer for support substrate, and then the wafer for active layer is exfoliated at the hydrogen ion implanted layer.

Abstract: A backside illuminated image sensor includes a photodiode, formed below the top surface of a semiconductor substrate, for receiving light illuminated from the backside of the semiconductor substrate to generate photoelectric charges, a reflecting gate, formed on the photodiode over the front upper surface of the semiconductor substrate, for reflecting light illuminated from the backside of the substrate and receiving a bias to control a depletion region of the photodiode, and a transfer gate for transferring photoelectric charges from the photodiode to a sensing node of a pixel.