Abstract: The method of forming a wordline is provided in the present invention. The proposed method includes steps of: (a) etching a metal-silicide layer and a POLY layer via a hard mask, wherein the metal-silicide layer is disposed on the POLY layer; (b) forming a POLY recess in the POLY layer; and (c) forming a liner film covering the metal-silicide layer.

Abstract: A method for texturing a surface of a semiconductor substrate is proposed. Therein, the surface is etched with an etching solution which etches the semiconductor substrate material, wherein a wetting agent is added to the etching solution, which wetting agent contains water-soluble polymers, in particular in the form of polyvinyl alcohol. Therein, the process temperatures of the etching solution can be increased in comparison to conventional texturing methods, as a result of which the process time can be reduced. Process guidance is simplified and process stability is increased. A suitable texturing device for carrying out the method can, in addition to a basin for accommodating the etching solution and a heater for heating the etching solution to at least 85° C.

Abstract: A method for forming an edge-chamfered substrate with a buried insulating layer is provided, which comprises the following steps: providing a first substrate (S10); forming an etching mask layer on surfaces of the first substrate, wherein said etching mask layer is formed on the whole surfaces of the first substrate (S11); chamfering a glazed surface of the first substrate and the etching mask layer thereon by the edge grinding (S12); by rotary etching, etching the first substrate which is exposed by the edge grinding on the etching mask layer (S13); providing a second substrate (S14); and bonding the first substrate to the second substrate with a buried insulating layer (S15). The method avoids the edge collapses and the changes of the warp degree in subsequent processes.

Abstract: Systems and methods for processing sacrificial layers in MEMS device fabrication are provided. In one embodiment, a method comprises: applying a patterned layer of Aerogel material onto a substrate to form an Aerogel sacrificial layer; applying at least one non-sacrificial silicon layer over the Aerogel sacrificial layer, wherein the non-sacrificial silicon layer is coupled to the substrate through one or more gaps provided in the patterned layer of Aerogel material; and removing the Aerogel sacrificial layer by exposing the Aerogel sacrificial layer to a removal liquid.

Abstract: There is provided an electromechanical transducer capable of improving yield and obtaining a cavity having a good internal flatness, and a method of fabricating the same. The electromechanical transducer is fabricated in such a manner that an SOI substrate 209 having an active layer 210 whose surface is planarized on a supporting substrate 201 with a thermal oxide insulating layer 205 interposed therebetween is provided; the active layer is patterned into a cavity shape; insulating films 206 and 207 are formed on the patterned active layer; an etching hole 203 passing through the insulating films and communicating with the active layer is formed; and a cavity 202 is formed by etching away the active layer using the etching hole.

Abstract: Embodiments of the invention generally relate to methods for treating a silicon-containing material on a substrate surface and performing a chamber clean process. In one embodiment, a method includes positioning a substrate containing a silicon material having a contaminant thereon within a process chamber and exposing the substrate to an etching gas containing chlorine gas and a silicon source gas while removing the contaminant and maintaining a temperature of the substrate within a range from about 500° C. to less than about 800° C. during an etching process. The method further includes exposing the substrate to a deposition gas after the etching process during a deposition process and exposing the process chamber to a chamber clean gas containing chlorine gas and the silicon source gas after the deposition process during a chamber clean process. The chamber clean process limits the etching of quartz and metal surfaces within the process chamber.

Abstract: Disclosed is a method for treating semiconductor wafer including: providing a layer that contains lanthanum oxide or a lanthanide oxide (e.g. Dy2O3, Pr2O3, Ce2O3) applying an aqueous solution, wherein the aqueous solution is carbonated water, whereby the layer that contains lanthanum oxide or a lanthanide oxide is removed at specific areas, so that the surface, on which the layer that contains lanthanum oxide or a lanthanide oxide has been deposited, is exposed.

Abstract: The present disclosure provides a method for making a semiconductor device. The method includes forming a first material layer on a substrate; forming a second material layer on the first material layer; forming a sacrificial layer on the second material layer; forming a patterned resist layer on the sacrificial layer; applying a first wet etching process using a first etch solution to the substrate to pattern the sacrificial layer using the patterned resist layer as a mask, resulting in a patterned sacrificial layer; applying an ammonia hydroxide-hydrogen peroxide-water mixture (APM) solution to the substrate to pattern the second material layer, resulting in a patterned second material layer; applying a second wet etching process using a second etch solution to the substrate to pattern the first material layer; and applying a third wet etching process using a third etch solution to remove the patterned sacrificial layer.

Abstract: An improved structure of heterojunction field effect transistor (HFET) and a fabrication method thereof are disclosed. The improved HFET structure comprises sequentially a substrate, a channel layer, a spacing layer, a carrier supply layer, a Schottky layer, a Schottky capping layer formed by a higher energy gap material, a tunneling layer formed by a lower energy gap material, a first etching stop layer, and a first n type doped layer.

Abstract: The present invention relates to an etching composition, in particular, for silicon materials, a method for characterizing defects on surfaces of such materials and a process of treating such surfaces with the etching composition, wherein the etching composition comprises an organic oxidant dissolved in a solvent, and a deoxidant, wherein the deoxidant comprises HF or HBF4 or mixtures thereof.

Abstract: A method for manufacturing a semiconductor device with high electric characteristics is provided. Part of a stacked semiconductor film in which an amorphous semiconductor film is provided on a crystalline semiconductor film is etched using a mixed gas including an HBr gas, a CF4 gas, and an oxygen gas, so that part of the crystalline semiconductor film provided in the stacked semiconductor film is exposed. Etching for forming a back channel portion of a thin film transistor is performed with the method for etching, whereby high electric characteristics can be provided for the thin film transistor.

Abstract: Methods for forming photoresists sensitive to radiation on substrate are provided. Atomic layer deposition methods of forming films (e.g., silicon-containing films) photoresists are described. The process can be repeated multiple times to deposit a plurality of silicon photoresist layers. Process of depositing photoresist and forming patterns in photoresist are also disclosed which utilize carbon containing underlayers such as amorphous carbon layers.

Abstract: A method and an apparatus for treating a silicon substrate for effectively removing a silicon oxide film formed on a surface of a silicon film and improving surface uniformity of the silicon film. The method comprises providing a substrate including a silicon film; providing a first fluid, which is capable of etching a silicon oxide film, to a surface of the substrate in a first time band; providing a second fluid containing water to the surface of the substrate in a second time band, which is different from the first time band; and providing a third fluid, which is capable of etching the silicon oxide film, has different ingredients as compared to the first fluid, and has high etching ratio with respect to the silicon oxide film, to a surface of the substrate in a third time band, which is different from the first time band and the second time band.

Abstract: A method of making a semiconductor device includes providing an insulating layer containing a plurality of openings, forming a first conductivity type semiconductor layer in the plurality of openings, forming a second conductivity type semiconductor layer over the first conductivity type semiconductor layer in the plurality of openings, and selectively etching the second conductivity type semiconductor layer using an upper surface of the first conductivity type semiconductor layer as a stop to form a recess in the plurality of openings.

Abstract: A manufacturing apparatus for a semiconductor device, treating a SiN film formed on a wafer with phosphoric acid solution, including a processing bath to store phosphoric acid solution provided for treatment of the wafer, a control unit for calculating integrated SiN etching amount of the phosphoric acid solution, determining necessity of quality adjustment of the phosphoric acid solution, based on correlation between the integrated SiN etching amount calculated and etching selectivity to oxide film, and calculating a quality adjustment amount of the phosphoric acid solution as needed, and also including a mechanism to adjust the quality of the phosphoric acid solution based on the quality adjustment amount calculated.

Abstract: An aspect of the present invention relates to a method of etching a surface layer portion of a silicon wafer comprising: positioning the silicon wafer within a sealed vessel containing a mixed acid A of hydrofluoric acid and sulfuric acid so that the silicon wafer is not in contact with mixed acid A; introducing a solution B in the form of nitric acid containing nitrogen oxides into the sealed vessel and causing solution B to mix with mixed acid A; and vapor phase decomposing the surface layer portion of the silicon wafer within the sealed vessel within which mixed acid A and solution B have been mixed.

Abstract: In a MEMS device having a substrate 1, a sealing membrane 7, and a movable portion 3 of beam and an electrode 5 which have a region wherein they overlap with a gap in perpendicular to a substrate 1 surface, a first cavity 9 is on the side of the movable portion 3 in the direction perpendicular to the surface of the substrate, and a second cavity is the other cavity, and an inner surface a of a side wall A in contact with the electrode 5, of the first cavity 9, is positioned more inside than an inner surface b of a side wall B in contact with the electrode 5, of the second cavity 10, in the direction parallel to the substrate surface, such that the movable portion 3 does not collide with the electrode 5 when mechanical stress is applied from outside to the sealing membrane 7.

Abstract: There is provided a resist underlayer film having heat resistance that is used for a lithography process in the production of semiconductor devices, and a high refractive index film having transparency that is used for an electronic device. A polymer comprising a unit structure of Formula (1): wherein each of R1, R2, R3, and R5 may be a hydrogen atom, R4 may be phenyl group or naphthyl group. A resist underlayer film forming composition comprising the polymer, and a resist underlayer film formed from the composition. A high refractive index film forming composition comprising the polymer, and a high refractive index film formed from the composition.

Abstract: There is provided a substrate treatment method for performing treatment by feeding a chemical liquid to a surface of a substrate, in which, before feeding the chemical liquid to a predetermined area of the substrate, a liquid substance having a resistivity lower than that of the chemical liquid is fed to the surface of the substrate so that the liquid substance wets at least the predetermined area, and then, the chemical liquid is fed to the predetermined area so that the treatment is performed on the substrate with the chemical liquid fed to the surface of the substrate.

Abstract: An SiC substrate includes the steps of preparing a base substrate having a main surface and made of SiC, washing the main surface using a first alkaline solution, and washing the main surface using a second alkaline solution after the step of washing with the first alkaline solution. The SiC substrate has the main surface, and an average of residues on the main surface are equal to or larger than 0.2 and smaller than 200 in number.

Abstract: A process is provided for etching a silicon-containing substrate to form nanowire arrays. In this process, one deposits nanoparticles and a metal film onto the substrate in such a way that the metal is present and touches silicon where etching is desired and is blocked from touching silicon or not present elsewhere. One submerges the metallized substrate into an etchant aqueous solution comprising HF and an oxidizing agent. In this way arrays of nanowires with controlled diameter and length are produced.

Abstract: Provided is an etching composition for electively removing silicon dioxide at a high etch rate, more particularly, a composition for wet etching of silicon dioxide, including 1 to 40 wt % of hydrogen fluoride (HF); 5 to 40 wt % of ammonium hydrogen fluoride (NH4HF2); and water, and further including a surfactant to improve selectivity of the silicon dioxide and a silicon nitride film. Since the composition for wet etching of silicon dioxide has the high etch selectivity of the silicon dioxide to the silicon nitride film, it is useful for selectively removing silicon dioxide.

Abstract: According to one embodiment, a memory device includes a semiconductor substrate, first, second, third and fourth fin-type stacked layer structures, each having memory strings stacked in a first direction perpendicular to a surface of the semiconductor substrate, and each extending to a second direction parallel to the surface of the semiconductor substrate, a first part connected to first ends in the second direction of the first and second fin-type stacked layer structures each other, a second part connected to first ends in the second direction of the third and fourth fin-type stacked layer structures each other, a third part connected to second ends in the second direction of the first and third fin-type stacked layer structures each other, and a fourth part connected to second ends in the second direction of the second and fourth fin-type stacked layer structures each other.

Abstract: A stacked structure including a soluble organic semiconductor material and a water soluble photosensitive material is provided. The water soluble photosensitive material is disposed on the surface of the soluble organic semiconductor material.

Abstract: A convex part formation method of forming a convex part in parallel with a <110> direction of a backing on the backing having a {100} face as the top surface thereof, includes: (a) forming a mask layer in parallel with the <110> direction on the backing; (b) etch the backing so as to form a convex-part upper layer whose sectional shape on a cutting plane corresponding to a {110} face is an isosceles trapezoid, the base of which is longer than the upper side thereof, and the side surface of which has an inclination of ?U; and (c) further etching the backing so as to form a convex-part lower layer whose sectional shape on the cutting plane corresponding to the {110} face is an isosceles trapezoid, the base of which is longer than the upper side thereof, and the side surface of which has an inclination of ?D (where ?D??U).

Abstract: Substrate treatment equipment includes a wet treatment apparatus for treating a substrate with a solution (liquid), a drying (treatment) apparatus discrete from the wet treatment apparatus and for drying the substrate using a supercritical fluid, and a transfer device. The substrate is extracted by the transfer device from the wet treatment apparatus after the substrate has been treated and the substrate is transferred by the device while wet to the dry treatment apparatus. To this end, various elements/methods may be used to keep the substrate wet or wet the substrate. In any case, the substrate is prevented from drying naturally, i.e., from air-drying, as the substrate is being transferred from the wet treatment apparatus to the drying apparatus. Thus, equipment and method prevent defects such as water spots and the leaning of fine structures on the substrate.

Abstract: A Light-Emitting Diode (LED) is formed on a sapphire substrate that is removed from the LED by grinding and then etching the sapphire substrate. The sapphire substrate is ground first to a first specified thickness using a single abrasive or multiple abrasives. The remaining sapphire substrate is removed by dry etching or wet etching.

Abstract: The present invention provides an etching solution for revealing defects in a germanium layer, a method for revealing defects in a germanium layer using such an etching solution and to a method for making such an etching solution. The etching solution according to embodiments of the present invention is able to exhibit an etch rate of between 4 nm·min?1 and 450 nm·min?1, which makes it suitable to be used for revealing defects in a thin layer of germanium, i.e. in a layer of germanium with a thickness of between 20 nm and 10 ?m, for example between 20 nm and 2 ?m, between 20 nm and 1 ?m or between 20 nm and 200 nm.

Abstract: Systems and methods for single lithography step interconnection metallization using a stop-etch layer are described. A method that includes depositing a stop-etch layer over a semiconductor device, depositing an interconnect metallization material over the stop-etch layer, performing a single lithography step to pattern a mask over the interconnect metallization material, etching the interconnect metallization material in non-masked areas, and removing the stop-etch layer. A system comprises a stop-etch layer material for deposit into a stop-etch layer over a wafer, an interconnect metallization material for deposit over the chrome layer, a lithography operation for patterning a mask over the interconnect metallization material, a first etching compound for etching the interconnect metallization material, where the etching stops at the stop-etch layer, and a second etching compound for removing the stop-etch layer.

Abstract: In a dual stress liner approach, unwanted material provided between closely spaced gate electrode structures may be removed to a significant degree on the basis of a wet chemical etch process, thereby reducing the risk of creating patterning-related irregularities. Consequently, the probability of contact failures in sophisticated interlayer dielectric material systems formed on the basis of a dual stress liner approach may be reduced.

Abstract: A method of manufacturing a semiconductor device includes forming a resist pattern on a first region on a substrate, bringing a descum solution including an acid source into contact with the resist pattern and with a second region of the substrate, decomposing resist residues remaining on the second region of the substrate by using acid obtained from the acid source in the descum solution and removing the decomposed resist residues and the descum solution from the substrate.

Abstract: Processes for selectively patterning a magnetic film structure generally include selectively etching an exposed portion of a freelayer disposed on a tunnel barrier layer by a wet process, which includes exposing the freelayer to an etchant solution comprising at least one acid and an organophosphorus acid inhibitor or salt thereof, stopping on the tunnel barrier layer.

Abstract: To provide a substrate processing method and a semiconductor chip manufacturing method that enable low-cost formation of a mask for etching using plasma etching. During formation of a mask used in plasma dicing for separating a semiconductor wafer 1 into discrete semiconductor chips 1e by means of etching using plasma processing, there is adopted a method including printing a lyophobic liquid in an area on a rear surface 1b that is to be an objective of etching, thereby forming a lyophobic pattern made up of lyophobic films 3; supplying a low viscosity resin 4a and a high viscosity resin 4b, in this sequence, to the rear surface 1b on which the lyophobic pattern is formed, thereby forming a resin film 4 that is thicker than the lyophobic films 3 in an area where the lyophobic films 3 are not present; and curing the resin film 4, to thus form a mask 4* that covers an area except for the area to be etched.

Abstract: Processes for enhancing solubility and the reaction rates in supercritical fluids are provided. In preferred embodiments, such processes provide for the uniform and precise deposition of metal-containing films on semiconductor substrates as well as the uniform and precise removal of materials from such substrates. In one embodiment, the process includes, providing a supercritical fluid containing at least one reactant, the supercritical fluid being maintained at above its critical point, exposing at least a portion of the surface of the semiconductor substrate to the supercritical fluid, applying acoustic energy, and reacting the at least one reactant to cause a change in at least a portion of the surface of the semiconductor substrate.

Abstract: To remove a silicon nitride layer on a silicon wafer, phosphoric acid is applied onto the wafer in a sealed chamber. The phosphoric acid may be atomized and sprayed onto the wafer as a mist or aerosol. The wafer is heated to a processing temperature and then maintained at or near the processing temperature with a coating of phosphoric acid on the wafer. The heating and applying phosphoric acid are then stopped, the wafer is cooled, and then removed from the process chamber. An infrared radiating assembly above the processing chamber may project infrared radiation into the chamber to heat the wafer. The wafer may be cooled by optionally spraying de-ionized water and/or nitrogen gas onto the workpiece. A cooling assembly may be used to cool an infrared radiating assembly. Silicon nitride is rapidly removed using very small amounts of phosphoric acid, and without the risks and disadvantages of conventional hot phosphoric bath techniques.

Abstract: Methods for reducing line roughness of spacers and other features utilizing a non-plasma and non-wet etch fluoride processing technology are provided. Embodiments of the methods can be used for spacer or line reduction and/or smoothing the surfaces along the edges of such features through the reaction and subsequent removal of material.

Abstract: A semiconductor wet etchant includes deionized water, a fluorine-based compound, an oxidizer and an inorganic salt. A concentration of the fluorine-based compound is 0.25 to 10.0 wt % based on a total weight of the etchant, a concentration of the oxidizer is 0.45 to 3.6 wt % based on a total weight of the etchant, and a concentration of the inorganic salt is 1.0 to 5.0 wt % based on a total weight of the etchant. The inorganic salt comprises at least one of an ammonium ion (NH4+) and a chlorine ion (Cl?).

Abstract: The invention concerns a method to thin an initial silicon-on-insulator substrate that has a layer of silicon oxide buried between a silicon carrier substrate and a silicon surface layer.

Abstract: An exemplary method of patterning oxide layer and removing residual nitride includes steps of forming a first oxide layer, a nitride layer, a second oxide layer and a complex hard mask on a substrate in turn. The first oxide layer covers an insulating structure. The second oxide layer, the complex hard mask and the nitride layer are etched by utilizing a patterned photoresist as an etching mask, so as to expose the first oxide layer. In addition, the part of the nitride layer covering the insulating structure can be further removed. Accordingly, the present invention can effectively control layout patterns of material layers and doped regions and thereby can improve the performance of a narrow width device.

Abstract: During the patterning of via openings in sophisticated metallization systems of semiconductor devices, the opening may extend through a conductive cap layer and an appropriate ion bombardment may be established to redistribute material of the underlying metal region to exposed sidewall portions of the conductive cap layer, thereby establishing a protective material. Consequently, in a subsequent wet chemical etch process, the probability for undue material removal of the conductive cap layer may be greatly reduced.

Abstract: Processes for treating gas streams contaminated with fluorine-containing compounds, in addition to apparatuses for such treatment processes that may also be used to monitor the emission of these compounds, are disclosed. In the processes and apparatuses, catalytic conversion (pyrolysis) one or more fluorine-containing contaminants (e.g., perfluorocarbon) in the gas stream is carried out using a catalyst comprising tungstated zirconia or sulfated zirconia. The catalysts exhibit exceptional responsiveness, recovery, and/or activity, compared to conventional catalysts, for this purpose.

Abstract: A first gas for plasma etch and a second gas for plasma deposition are introduced onto a semiconductor substrate, the semiconductor substrate including a mask pattern. A flow rate of the first and second gases is periodically changed within a range of flow rates during a process cycle, such that a plasma etch process and a plasma deposition process are performed together to form an opening in the semiconductor substrate.

Abstract: For patterning during integrated circuit fabrication, a first pattern of first masking structures is formed, and a buffer layer is formed on exposed surfaces of the first masking structures. Also, a second pattern of second masking structures is formed in recesses between the buffer layer at sidewalls of the first masking structures. Furthermore, the first and masking structures are formed from spin-coating respective high carbon containing materials. Such first and second masking structures pattern a target layer with higher pitch than possible with traditional photolithography.

Abstract: Embodiments of the present invention describe a removal chemistry for removing hard mask. The removal chemistry is a wet-etch solution that removes a metal hard mask formed on a dielectric layer, and is highly selective to a metal conductor layer underneath the dielectric layer. The removal chemistry comprises an aqueous solution of hydrogen peroxide (H2O2), a hydroxide source, and a corrosion inhibitor. The hydrogen peroxide and hydroxide source have the capability to remove the hard mask while the corrosion inhibitor prevents the metal conductor layer from chemically reacting with the hydrogen peroxide and hydroxide source during the hard mask removal.

Abstract: Embodiments described herein relate to a substrate processing apparatus includes a reaction tube, a processing chamber provided inside the reaction tube to process a substrate therein, an induction target provided inside the reaction tube to surround the processing chamber and configured to heat the substrate, a heat insulator provided inside the reaction tube to surround the induction target, an induction target provided outside the reaction tube to inductively heat at least the induction target, a first gas supply unit for supplying a first gas into the processing chamber, and a second gas supply unit for supplying a second gas to a first gap provided between the induction target and the heat insulator.

Abstract: The invention relates to a method of fabricating an electromechanical device including an active element, wherein the method comprises the following steps: a) making a monocrystalline first stop layer on a monocrystalline layer of a first substrate; b) growing a monocrystalline mechanical layer epitaxially on said first stop layer out of at least one material that is different from that of the stop layer; c) making a sacrificial layer on said active layer out of a material that is suitable for being etched selectively relative to said mechanical layer; d) making a bonding layer on the sacrificial layer; e) bonding a second substrate on the bonding layer; and f) eliminating the first substrate and the stop layer to reveal the surface of the mechanical layer opposite from the sacrificial layer, the active element being made by at least a portion of the mechanical layer.

Abstract: A method for removing silicon oxide based residue from a stack with a doped silicon oxide layer with features with diameters less than 100 nm is provided. A wet clean solution of between 25% to 60% by weight of NH4F, and between 0.05% and 5% by weight of phosphoric acid, and between 0.05% and 5% by weight citric acid, in a water solvent is provided to an area on a surface of the stack. The wet clean solution is removed from the area on the surface of the stack between 0.5 to 10 seconds after the area on the surface of the stack was exposed to the wet clean solution.

Abstract: A method for processing a substrate includes receiving a substrate and processing the substrate using a first fluid meniscus and a second fluid meniscus. The first fluid meniscus and the second fluid meniscus are applied to a surface of the substrate such that the first fluid meniscus is spaced apart from the second fluid meniscus by a transition region. A saturated gas chemistry is applied to the surface of the substrate at the transition region. The saturated gas chemistry is configured to maintain moisture in the transition region so as to prevent drying of the surface of the substrate in the transition region, before the second fluid meniscus is applied to the surface of the substrate.

Abstract: Embodiments of the present invention generally relates to an apparatus and a method for processing semiconductor substrates. Particularly, embodiments of the present invention relates to methods and apparatus for profile modification prior to filling a structure, such as a trench or a via. One embodiment of the present invention comprises forming a sacrifice layer to pinch off a top opening of a structure by exposing the structure to an etchant. In one embodiment, the etchant is configured to remove the first material by reacting with the first material and generating a by-product, which forms the sacrifice layer.

Abstract: Methods of making current tracks for semiconductors are disclosed. The methods involve selectively depositing a hot melt ink resist containing rosin resins and waxes on a silicon dioxide or silicon nitride layer coating a semiconductor followed by etching uncoated portions of the silicon dioxide or silicon nitride layer with an inorganic acid etch to expose the semiconductor and simultaneously inhibit undercutting of the hot melt ink resist. The etched portions may then be metallizaed to form a plurality of substantially uniform current tracks.