Chemical Etching (epo) Patents (Class 257/E21.219)
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Publication number: 20120261800Abstract: In one embodiment, a method of forming a plug includes providing a base layer, providing an intermediate oxide layer above an upper surface of the base layer, providing an upper layer above an upper surface of the intermediate oxide layer, etching a trench including a first trench portion extending through the upper layer, a second trench portion extending through the oxide layer, and a third trench portion extending into the base layer, depositing a first material portion within the third trench portion, depositing a second material portion within the second trench portion, and depositing a third material portion within the first trench portion.Type: ApplicationFiled: September 14, 2011Publication date: October 18, 2012Applicant: ROBERT BOSCH GMBHInventors: Andrew B. Graham, Gary Yama, Gary O'Brien
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Publication number: 20120258564Abstract: The present disclosure provides one embodiment of a method. The method includes providing a semiconductor substrate having a front side and a backside, wherein the front side of the semiconductor substrate includes a plurality of backside illuminated imaging sensors; bonding a carrier substrate to the semiconductor substrate from the front side; thinning the semiconductor substrate from the backside; performing an ion implantation to the semiconductor substrate from the backside; performing a laser annealing process to the semiconductor substrate from the backside; and thereafter, performing a polishing process to the semiconductor substrate from the backside.Type: ApplicationFiled: April 5, 2011Publication date: October 11, 2012Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chung Chien Wang, Yeur-Luen Tu, Chia-Shiung Tsai
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Publication number: 20120258600Abstract: A method of patterning a substrate, comprises providing a set of patterned features on the substrate, exposing the set of patterned features to a dose of ions incident on the substrate over multiple angles, and selectively etching exposed portions of the patterned features.Type: ApplicationFiled: April 7, 2011Publication date: October 11, 2012Inventors: Ludovic Godet, Christopher R. Hatem, Patrick M. Martin, Timothy J. Miller
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Publication number: 20120253058Abstract: Difluoroethylene carbonate, trifluoroethylene and tetrafluoroethylene carbonate are produced by the reaction between elemental fluorine and ethylene carbonate or fluorinated ethylene carbonates with a lower degree of fluorination.Type: ApplicationFiled: September 27, 2010Publication date: October 4, 2012Applicant: SOLVAY FLUOR GMBHInventors: Jens Olschimke, Dirk Seffer, Martin Bomkamp
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Patent number: 8277570Abstract: A method for processing a substrate includes receiving a substrate and processing the substrate using a first fluid meniscus and a second fluid meniscus. The first fluid meniscus and the second fluid meniscus are applied to a surface of the substrate such that the first fluid meniscus is spaced apart from the second fluid meniscus by a transition region. A saturated gas chemistry is applied to the surface of the substrate at the transition region. The saturated gas chemistry is configured to maintain moisture in the transition region so as to prevent drying of the surface of the substrate in the transition region, before the second fluid meniscus is applied to the surface of the substrate.Type: GrantFiled: August 10, 2011Date of Patent: October 2, 2012Assignee: LAM Research CorporationInventors: Seokmin Yun, Mark Wilcosson
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Publication number: 20120244715Abstract: In a method and system for vapor etching, a material to be etched and an etch resistant material are placed into an etching chamber. Thereafter, a pressure in the etching chamber is adjusted to a desired pressure and the substrate is exposed to an etching gas and a gas that comprises oxygen. The exposure substantially selectively etches the material to be etched while substantially avoiding the etching of the etch resistant material.Type: ApplicationFiled: December 2, 2010Publication date: September 27, 2012Applicant: XACTIX, INC.Inventors: Kyle S. Lebouitz, Andrew David Johnson, Eugene Karwacki, JR., Suhas Narayan Ketkar, John Neumann, David L. Springer
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Publication number: 20120241912Abstract: There is provided a thermal treatment method of a silicon wafer. The method includes the successive steps of: (a) terminating silicon atoms existing on an active surface of the silicon wafer with hydrogen, wherein the active surface is mirror-polished, and a semiconductor device is to be formed on the active surface; (b) terminating the silicon atoms existing on the active surface of the silicon wafer with fluorine; (c) rapidly heating the silicon wafer to a first temperature under an inert gas atmosphere or a reducing gas atmosphere, wherein the first temperature is in a range of 1300° C. to 1400° C.; (d) holding the silicon wafer at the first temperature for a certain time; and (e) rapidly cooling the silicon wafer.Type: ApplicationFiled: March 15, 2012Publication date: September 27, 2012Applicant: Covalent Materials CorporationInventors: Takeshi SENDA, Koji Araki
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Publication number: 20120241920Abstract: A method of cleaning polybenzoxazole (PBO) from a semiconductor wafer coated with PBO includes baking a PBO-coated semiconductor wafer, and then exposing the semiconductor wafer with ultraviolet light through a patterned mask to soften selected regions of PBO on the semiconductor wafer. PBO is then dissolved in an edge region of the semiconductor wafer with solvent. After dissolving PBO in the edge region, the semiconductor wafer is chemically developed to dissolve the elected softened regions of PBO on the semiconductor wafer and to dissolve PBO remaining in the edge region of the semiconductor wafer that was left behind after the step of dissolving the PBO in the edge region with the solvent.Type: ApplicationFiled: March 21, 2012Publication date: September 27, 2012Applicant: POLAR SEMICONDUCTOR, INC.Inventor: Roger Carroll
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Publication number: 20120238104Abstract: An etching method includes: applying a radiation to an etching aqueous solution; and etching a material to be etched by using the etching aqueous solution irradiated with the radiation.Type: ApplicationFiled: February 17, 2012Publication date: September 20, 2012Applicant: FUJITSU LIMITEDInventors: Shirou Ozaki, Masayuki Takeda
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Publication number: 20120231607Abstract: A method for forming a silicon layer according to inventive concept comprises: preparing an SOI substrate; applying an etchant or vapor of the etchant to the SOI substrate; and irradiating a light to the SOI substrate.Type: ApplicationFiled: November 29, 2011Publication date: September 13, 2012Applicant: Industry-Academic Cooperation Foundation, Yonsei UniversityInventors: Taeyoon LEE, Ja Hoon KOO, Sang Wook LEE, Ka Young LEE
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Publication number: 20120231630Abstract: Disclosed is an etching gas provided containing CHF2COF. The etching gas may contain, as an additive, at least one kind of gas selected from O2, O3, CO, CO2, F2, NF3, Cl2, Br2, I2, XFn (In this formula, X represents Cl, I or Br. n represents an integer satisfying 1?n?7.), CH4, CH3F, CH2F2, CHF3, N2, He, Ar, Ne, Kr and the like, from CH4, C2H2,C2H4,C2H6, C3H4, C3H6, C3H5, HI, HBr, HCl, CO, NO, NH3, H2 and the like, or from CH4, CH3F, CH2F2 and CHF3. This etching gas is not only excellent in etching performances such as the selection ratio to a resist and the patterning profile but also easily available and does not substantially by-produce CF4 that places a burden on the environment.Type: ApplicationFiled: November 19, 2010Publication date: September 13, 2012Applicant: Central Glass Company, LimitedInventors: Naoto Takada, Isamu Mori
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Publication number: 20120231632Abstract: This disclosure relates to an etching composition containing at least one sulfonic acid, at least one compound containing a halide anion, the halide being chloride or bromide, at least one compound containing a nitrate or nitrosyl ion, and water. The at least one sulfonic acid can be from about 25% by weight to about 95% by weight of the composition. The halide anion can be chloride or bromide, and can be from about 0.01% by weight to about 0.5% by weight of the composition. The nitrate or nitrosyl ion can be from about 0.1% by weight to about 20% by weight of the composition. The water can be at least about 3% by weight of the composition.Type: ApplicationFiled: March 8, 2012Publication date: September 13, 2012Applicants: FUJIFILM Corporation, Fujifilm Electronic Materials U.S.A., Inc.Inventors: Tomonori Takahashi, Tadashi Inaba, Atsushi Mizutani, Bing Du, William A. Wojtczak, Kazutaka Takahashi, Tetsuya Kamimura
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Publication number: 20120231565Abstract: Provided is a process for producing a substrate for a liquid ejection head, including forming a liquid supply port in a silicon substrate, the process including the steps of (a) forming an etch stop layer at a portion of a front surface of the silicon substrate at which portion the liquid supply port is to be formed; (b) performing dry etching using a Bosch process from a rear surface side of the silicon substrate up to the etch stop layer with use of an etching mask formed on a rear surface of the silicon substrate to thereby form the liquid supply port; and (c) simultaneously removing the etch stop layer and a deposition film formed inside the liquid supply port.Type: ApplicationFiled: March 5, 2012Publication date: September 13, 2012Applicant: CANON KABUSHIKI KAISHAInventor: Toshiyasu Sakai
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Patent number: 8257549Abstract: Provided is a spin head for supporting a substrate. The spin head includes a rotatable body, and chuck pins protruding upward from the body and configured to support an edge of a substrate placed at the body when the body is rotated. Each of the chuck pins includes a vertical rod vertically disposed at the body, and a support rod extending from a side of the vertical rod and configured to make contact with the edge of the substrate placed at the body when the body is rotated. When the substrate is rotated, the vertical rod is spaced apart from the edge of the substrate. The contact portion includes a streamlined side surface. The support rod includes a contact portion. The contact portion tapers toward the end of the support rod when viewed from the top of the support rod.Type: GrantFiled: August 4, 2008Date of Patent: September 4, 2012Assignee: Semes Co., Ltd.Inventors: Woo-Seok Lee, Woo-Young Kim, Jeong-Yong Bae
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Publication number: 20120214309Abstract: A method of fabricating a SiC semiconductor device includes the steps of preparing a silicon carbide semiconductor including a first surface having impurities implanted at least partially, forming a second surface by dry etching the first surface of the silicon carbide semiconductor using gas including hydrogen gas, and forming an oxide film constituting the silicon carbide semiconductor device on the second surface.Type: ApplicationFiled: February 23, 2011Publication date: August 23, 2012Applicant: Sumitomo Electric Industries, Ltd.Inventors: Satomi Itoh, Hiromu Shiomi, Yasuo Namikawa, Keiji Wada, Mitsuru Shimazu, Toru Hiyoshi
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Publication number: 20120214306Abstract: Methods for etching metal nitrides and metal oxides include using ultradilute HF solutions and buffered, low-pH HF solutions containing a minimal amount of the hydrofluoric acid species H2F2. The etchant can be used to selectively remove metal nitride layers relative to doped or undoped oxides, tungsten, polysilicon, and titanium nitride. A method is provided for producing an isolated capacitor, which can be used in a dynamic random access memory cell array, on a substrate using sacrificial layers selectively removed to expose outer surfaces of the bottom electrode.Type: ApplicationFiled: April 30, 2012Publication date: August 23, 2012Applicant: MICRON TECHNOLOGY, INC.Inventor: Kevin R. Shea
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Publication number: 20120214267Abstract: The present invention relates to a novel method for roughening an epitaxy structure layer, including: providing an epitaxy structure layer; and etching a surface of the epitaxy structure layer by an excimer laser having an energy density of 1000 mJ/cm2 or less to form a roughened surface. In addition, the present invention further provides a method for manufacturing a light-emitting diode having a roughened surface. Accordingly, the present invention can resolve the conventional problems of process complexity, time consumption and high cost.Type: ApplicationFiled: June 21, 2011Publication date: August 23, 2012Applicant: National Cheng Kung UniversityInventors: Shui-Jinn WANG, Wei-Chi Lee
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Publication number: 20120208370Abstract: The invention relates to a method for etching of silicon surfaces with the following steps: Furnishing an aqueous alkaline hydrocolloid etching solution containing at least one hydrocolloid, at a temperature of 50° C. to 95° C., bringing the silicon surface in contact with the hydrocolloid etching solution for a specified duration, and Removing the hydrocolloid etching solution from the silicon surface.Type: ApplicationFiled: June 2, 2010Publication date: August 16, 2012Applicant: RENA GmbHInventors: Ahmed Abdelbar El Jaouhari, Jürgen Schweckendiek
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Patent number: 8242025Abstract: According to a method of the present invention for manufacturing a semiconductor piece, at least two semiconductor layers (12) are first formed on a substrate (10) by stacking a sacrificial layer (11) and the semiconductor layer (12) on the substrate (10) in this order and repeating this stacking. Next, the semiconductor layers (12) are divided into pieces by etching part of the sacrificial layers (11) and part of the semiconductor layers (12). Then, the pieces are separated from the substrate by removing the sacrificial layers (11).Type: GrantFiled: January 12, 2007Date of Patent: August 14, 2012Assignee: Panasonic CorporationInventors: Takahiro Kawashima, Tohru Saitoh, Tohru Nakagawa, Hideo Torii
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Patent number: 8242026Abstract: Provided is a method for performing etching process or film forming process to a substrate W whereupon a prescribed pattern is formed with an opening. The method is provided with a step of mixing a liquid and a gas, at least one of which contains a component that contributes to the etching process or the film forming process, and generating charged nano-bubbles 85 having a diameter smaller than that of the opening formed on the semiconductor substrate W; a step of forming an electric field to attract the nano-bubbles onto the surface of the substrate W; and a step of performing the process by supplying the substrate with the liquid containing the nano-bubbles 85 while forming the electric field.Type: GrantFiled: December 21, 2007Date of Patent: August 14, 2012Assignee: Tokyo Electron LimitedInventor: Sumie Nagaseki
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Patent number: 8236696Abstract: A method for fabricating a semiconductor device to enlarge a channel region is provided. The channel region is enlarged due to having pillar shaped sidewalls of a transistor. The transistor includes a fin active region vertically protruding on a substrate, an isolation layer enclosing a lower portion of the fin active region, and a gate electrode crossing the fin active region and covering a portion of the fin active region. An isolation layer is formed enclosing a lower portion of the fin active region and the isolation layer under the spacers is partially removed to expose a portion of the sidewalls of the fin active region. Subsequently, dry etching is performed to form the sidewalls having a pillar/neck.Type: GrantFiled: December 27, 2007Date of Patent: August 7, 2012Assignee: Hynix Semiconductor Inc.Inventor: Jun-Hee Cho
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Patent number: 8236694Abstract: The present invention relates to a method for manufacturing an acceleration sensor. In the method, thin SOI-wafer structures are used, in which grooves are etched, the walls of which are oxidized. A thick layer of electrode material, covering all other material, is grown on top of the structures, after which the surface is ground and polished chemo-mechanically, thin release holes are etched in the structure, structural patterns are formed, and finally etching using a hydrofluoric acid solution is performed to release the structures intended to move and to open a capacitive gap.Type: GrantFiled: September 17, 2010Date of Patent: August 7, 2012Assignee: Valtion Teknillinen TutkimuskeskusInventors: Jyrki Kiihamäki, Hannu Kattelus
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Publication number: 20120193764Abstract: The instant disclosure relates to a nanostructuring process for an ingot surface prior to the slicing operation. A surface treatment step is performed for at least one surface of the ingot in forming a nanostructure layer thereon. The nanostructure layer is capable of enhancing the mechanical strength of the ingot surface to reduce the chipping ratio of the wafer during slicing.Type: ApplicationFiled: January 19, 2012Publication date: August 2, 2012Applicant: SINO-AMERICAN SILICON PRODUCTS INC.Inventors: Jiunn-Yih CHYAN, Jian-Jhih LI, Kun-Lin YANG, Wen-Ching HSU
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Publication number: 20120193680Abstract: A trench is formed by an anisotropic etch in a semiconductor material layer employing a masking layer, which can be gate spacers. In one embodiment, an adsorbed fluorine layer is provided at a cryogenic temperature only on vertical sidewalls of the semiconductor structure including the sidewalls of the trench. The adsorbed fluorine layer removes a controlled amount of the underlying semiconductor material once the temperature is raised above the cryogenic temperature. The trench can be filled with another semiconductor material to generate stress in the semiconductor material layer. In another embodiment, the semiconductor material is laterally etched by a plasma-based etch at a controlled rate while a horizontal portion of a contiguous oxide liner prevents etch of the semiconductor material from the bottom surface of the trench.Type: ApplicationFiled: April 9, 2012Publication date: August 2, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Sebastian Ulrich Engelmann, Nicholas C.M. Fuller, Eric Andrew Joseph, Isaac Lauer, Ryan M. Martin, James Vichiconti, Ying Zhang
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Publication number: 20120196445Abstract: An aspect of the invention is to provide a method and apparatus for etching the silicon oxide layer of a semiconductor substrate, whereby the processing time for cleaning or rinsing, as well as any undesired aftereffects by residual hydrofluoric acid, may be reduced, in using the dry etching method involving the use of dense carbon dioxide that contains hydrofluoric acid, during the manufacturing process of a micro-electronic device.Type: ApplicationFiled: February 10, 2011Publication date: August 2, 2012Applicant: Pukyong National UniversityInventor: Kwon-Taek LIM
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Publication number: 20120190186Abstract: A semiconductor device manufacturing method includes: forming a first insulating film over the surface of a semiconductor substrate having at least two adjacent protrusions in such a manner that the film thickness between the two protrusions is not less than 1.2 times the height of at least one of the two protrusions; and forming a second insulating film over the first insulating film, the second insulating film being harder than the first insulating film.Type: ApplicationFiled: January 13, 2012Publication date: July 26, 2012Inventor: Fuminobu NAKASHIMA
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Publication number: 20120190209Abstract: Disclosed is a method for producing ZnO contact layers for solar cells. The layers are etched using hydrofluoric acid so as to generate a texture.Type: ApplicationFiled: August 7, 2010Publication date: July 26, 2012Inventors: Eerke Bunte, Jorj Owen, Juergen Huepkes
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Publication number: 20120189143Abstract: A micromechanical microphone device includes a membrane that is mounted in an elastically deflectable manner above a substrate and that has at least one gate electrode. The device further includes a source region and a drain region provided in or on the substrate with a channel region therebetween. The channel region is at least partly covered by the gate electrode and is spaced apart from the gate electrode by a gap. The membrane is deflectable under the influence of sound in such a way that the gap is variable.Type: ApplicationFiled: January 4, 2012Publication date: July 26, 2012Applicant: Robert Bosch GmbHInventors: Alexander Buhmann, Ando Feyh
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Patent number: 8227354Abstract: Provided is a method of forming patterns of a semiconductor device, whereby patterns having various widths can be simultaneously formed, and pattern density can be doubled by a double patterning process in a portion of the semiconductor device. In the method of forming patterns of a semiconductor device, a first mold mask pattern and a second mold mask patter having different widths are formed on a substrate. A pair of first spacers covering both sidewalls of the first mold mask pattern and a pair of second spacers covering both sidewalls of the second mold mask pattern are formed. The first mold mask pattern and the second mold mask pattern are removed, and a wide-width mask pattern covering the second spacer is formed. A lower layer is etched using the first spacers, the second spacers, and the wide-width mask pattern as an etch mask.Type: GrantFiled: June 9, 2009Date of Patent: July 24, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Bong-cheol Kim, Dae-youp Lee, Sang-youn Jo, Ja-min Koo, Byeong-hwan Son, Jang-hwan Jeong
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Patent number: 8222147Abstract: The present invention provides a method of fabricating a semiconductor device including forming stop layers (32) that include silicon oxy-nitride films above a semiconductor substrate, forming a cover film (34) between and on the stop layers, in which a top surface of the cover film above a region between the stop layers is higher than top surfaces of the stop layers, and polishing the cover film to the stop layers by using ceria slurry, and also provides a semiconductor device including metal layers (30) provided above a semiconductor substrate, silicon oxy-nitride films (32) provided on the metal layers, and an embedded layer (36) provided between the metal layers to have a top surface substantially coplanar with top surfaces of the silicon oxy-nitride films. According to the present invention, it is possible to provide a semiconductor device having a film of excellent planarization on a surface thereof and fabrication method therefor.Type: GrantFiled: June 29, 2006Date of Patent: July 17, 2012Assignee: Spansion LLCInventors: Takayuki Enda, Masayuki Moriya
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Publication number: 20120177891Abstract: Methods of forming a patterned, silicon-enriched developable antireflective material. One such method comprises forming a silicon-enriched developable antireflective composition. The silicon-enriched developable antireflective composition comprises a silicon-enriched polymer and a crosslinking agent. The silicon-enriched polymer and the crosslinking agent are reacted to form a silicon-enriched developable antireflective material that is insoluble and has at least one acid-sensitive moiety. A positive-tone photosensitive material, such as a positive-tone photoresist, is formed over the silicon-enriched developable antireflective material and regions thereof are exposed to radiation. The exposed regions of the positive-tone photosensitive material and underlying regions of the silicon-enriched developable antireflective material are removed. Additional methods are disclosed, as are semiconductor device structures including a silicon-enriched developable antireflective material.Type: ApplicationFiled: January 7, 2011Publication date: July 12, 2012Applicant: MICRON TECHNOLOGY, INC.Inventors: Dan B. Millward, Yuan He, Lijing Gou, Zishu Zhang, Anton J. deVilliers, Jianming Zhou, Kaveri Jain, Scott Light, Michael Hyatt
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Publication number: 20120168898Abstract: A single crystal silicon etching method includes providing a single crystal silicon substrate having at least one trench therein. The single crystal silicon substrate is exposed to an anisotropic etchant that undercuts the single crystal silicon. By controlling the length of the etch, single crystal silicon islands or smooth vertical walls in the single crystal silicon may be created.Type: ApplicationFiled: March 9, 2012Publication date: July 5, 2012Applicant: MICRON TECHNOLOGY, INC.Inventors: Janos Fucsko, David H. Wells, Patrick Flynn, Whonchee Lee
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Publication number: 20120168894Abstract: A hard mask composition, a method of forming a pattern, and a semiconductor integrated circuit device, the hard mask composition including a solvent; and an aromatic ring-containing compound, the aromatic ring-containing compound including at least one of a moiety represented by the following Chemical Formula 1 and a moiety represented by the following Chemical Formula 2:Type: ApplicationFiled: September 23, 2011Publication date: July 5, 2012Inventors: Min-Soo Kim, Hwan-Sung Cheon, Jee-Yun Song, Young-Min Kim, Cheol-Ho Lee, Chung-Heon Lee
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Patent number: 8211802Abstract: A substrate processing apparatus cleaning method that includes: containing a cleaning gas in a reaction tube without generating a gas flow of the cleaning gas in the reaction tube by supplying the cleaning gas into the reaction tube and by completely stopping exhaustion of the cleaning gas from the reaction tube or by exhausting the cleaning gas at an exhausting rate which substantially does not affect uniform diffusion of the cleaning gas in the reaction tube from at a point of time of a period from a predetermined point of time before the cleaning gas is supplied into the reaction tube to a point of time when several seconds are elapsed after starting of supply of the cleaning gas into the reaction tube; and thereafter exhausting the cleaning gas from the reaction tube.Type: GrantFiled: November 24, 2010Date of Patent: July 3, 2012Assignee: Hitachi Kokusai Electric Inc.Inventors: Kazuyuki Okuda, Toru Kagaya, Masanori Sakai
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Publication number: 20120160320Abstract: An aqueous acidic etching solution suitable for texturing the surface of single crystal and polycrystal silicon substrates and containing, based on the complete weight of the solution, 3 to 10% by weight of hydrofluoric acid; 10 to 35% by weight of nitric acid; 5 to 40% by weight of sulfuric acid; and 55 to 82% by weight of water; a method for texturing the surface of single crystal and polycrystal silicon substrates comprising the step of (1) contacting at least one major surface of a substrate with the said aqueous acidic etching solution; (2) etching the at least one major surface of the substrate for a time and at a temperature sufficient to obtain a surface texture consisting of recesses and protrusions; and (3) removing the at least one major surface of the substrate from the contact with the aqueous acidic etching solution; and a method for manufacturing photovoltaic cells and solar cells using the said solution and the said texturing method.Type: ApplicationFiled: September 9, 2010Publication date: June 28, 2012Applicants: GP SOLAR GmbH, BASF SEInventors: Simon Braun, Julian Proelss, Ihor Melnyk, Michael Michel, Stefan Mathijssen
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Publication number: 20120164830Abstract: Provided is a method of fabricating a semiconductor device. The method includes: preparing a substrate with an etching target, and etching the etching target through a plasma-free etching process that uses an etching gas including one of interhalogen compound, F2, XeF2 and combinations thereof.Type: ApplicationFiled: November 23, 2011Publication date: June 28, 2012Inventors: Mongsup Lee, Inseak Hwang
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Publication number: 20120164840Abstract: A substrate processing method includes a liquid processing process that supplies a processing liquid onto a substrate to process the substrate; a heating process that heats the substrate on which a liquid film of the processing liquid is formed; a supplying process that supplies a volatile processing liquid to the substrate on which the liquid film of the processing liquid is formed; a stopping process that stops the supply of the volatile processing liquid to the substrate; and a drying process that dries the substrate by removing the volatile processing liquid, in which the heating process starts before the supplying process that supplies the volatile processing liquid and the substrate is heated so that the surface temperature of the substrate is higher than a dew point before the surface of the substrate is exposed from the volatile processing liquid.Type: ApplicationFiled: December 21, 2011Publication date: June 28, 2012Inventors: Satoru Tanaka, Takehiko Orii, Hirotaka Maruyama, Teruomi Minami, Mitsunori Nakamori
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Publication number: 20120153260Abstract: A method of etching active quantum nanostructures provides the step of laterally etching of an intermediate active quantum nanostructure layer interposed between cladding layers. The lateral etching can be carried out on at least one side of the intermediate active quantum nanostructure layer selectively, with respect to the cladding layers to define at least one lateral recess or spacing in the intermediate active quantum nanostructure layer and respective lateral protrusions of cladding layers protruding with respect to the intermediate active quantum nanostructure layer. This method can be applied to create devices including active quantum nanostructures such as, for example, three-dimensional photonic crystals, a photonic crystal double-slab and a photonic crystal laser.Type: ApplicationFiled: December 8, 2011Publication date: June 21, 2012Inventors: Seheon KIM, Axel SCHERER, Jingqing HUANG, Dong Yoon OH
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Publication number: 20120153424Abstract: A hard mask composition, a method of forming a pattern, and a semiconductor integrated circuit device, the hard mask composition including a solvent; and a compound, the compound including a structural unit represented by the following Chemical Formula 1:Type: ApplicationFiled: September 23, 2011Publication date: June 21, 2012Inventors: Seung-Bae OH, Hwan-Sung Cheon, Sung-Wook Cho, Min-Soo Kim, Jee-Yun Song, Yoo-Jeong Choi
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Publication number: 20120156802Abstract: An optoelectronic swept-frequency semiconductor laser coupled to a microfabricated optical biomolecular sensor with integrated resonator and waveguide and methods related thereto are described. Biomolecular sensors with optical resonator microfabricated with integrated waveguide operation can be in a microfluidic flow cell.Type: ApplicationFiled: February 18, 2011Publication date: June 21, 2012Inventors: Richard C. FLAGAN, Amnon YARIV, Jason GAMBA, Naresh SATYAN, Jacob SENDOWSKI, Arseny VASILYEV
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Publication number: 20120156886Abstract: Production efficiency of a substrate (in particular, a substrate on which a SiC epitaxial film is formed) is improved and formation of the film inside a gas supply port is suppressed. This is accomplished by a substrate processing apparatus including a reaction chamber configured to accommodate a plurality of substrates 14, a heating part installed to surround the reaction chamber and configured to heat the reaction chamber, and a first gas supply pipe 60 extending in the reaction chamber, wherein the first gas supply pipe 60 includes a first gas supply port 68 configured to inject a first gas toward the plurality of substrates 14, and first shielding walls installed at both sides of the first gas supply port to expose the first gas supply port 68, the first shielding walls extending toward the plurality of substrates 14 from the first gas supply port 68.Type: ApplicationFiled: December 20, 2011Publication date: June 21, 2012Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Kenji Shirako, Masanao Fukuda, Takafumi Sasaki, Yoshinori Imai, Daisuke Hara, Shuhei Saido, Koei Kuribayashi
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Publication number: 20120149197Abstract: A manufacturing method of a device is provided. In the manufacturing method, a substrate is provided. The substrate has a plurality of patterns and a plurality of openings formed thereon, and the openings are located among the patterns. A first liquid supporting layer is formed on the patterns, and the openings are filled with the first liquid supporting layer. The first liquid supporting layer is transformed into a first solid supporting layer. The first solid supporting layer includes a plurality of supporting elements formed in the openings, and the supporting elements are formed among the patterns. A treatment process is performed on the patterns. The first solid supporting layer that includes the supporting elements is transformed into a second liquid supporting layer. The second liquid supporting layer is removed.Type: ApplicationFiled: December 8, 2010Publication date: June 14, 2012Applicant: NANYA TECHNOLOGY CORPORATIONInventors: Chien-Mao Liao, Yi-Nan Chen
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Publication number: 20120149208Abstract: According to one embodiment, a substrate processing apparatus includes a substrate support unit configured to support a substrate by fixing the substrate from a back surface side of a surface to be processed; and a substrate processing unit in which a pad into which a predetermined liquid is soaked is arranged and which performs a substrate process on the surface to be processed of the substrate with the liquid. The surface to be processed of the substrate is brought into contact with the liquid on the pad surface by bringing the surface to be processed of the substrate close to a side of the pad, without rotating the substrate and the pad, to perform a substrate process.Type: ApplicationFiled: September 21, 2011Publication date: June 14, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Takahito NAKAJIMA
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Patent number: 8198125Abstract: A method of making a monolithic photovoltaic module having a flexible substrate is described. The method includes the following steps. First, a flexible substrate is provided, and a first adhesive layer, a metal layer, and a second adhesive layer are formed thereon. The second adhesive layer, the metal layer and the first adhesive layer are etched with at least one etching paste. In addition, a patterned semiconductor body layer patterned by an etching paste or a laser scribing is formed thereon. Furthermore, transparent top electrodes patterned by an etching paste or a cold laser scribing are formed on the patterned semiconductor body layer.Type: GrantFiled: December 8, 2010Date of Patent: June 12, 2012Assignee: Du Pont Apollo LimitedInventors: Chiou-Fu Wang, Huo-Hsien Chiang
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Patent number: 8193099Abstract: A method of forming a semiconductor device includes forming a transistor gate stack over a substrate having an active area and a shallow trench isolation (STI) region. First sidewall spacers are formed on the transistor gate stack, and an isotropic etch process is applied to isotropically remove an excess portion of a metal layer included within the transistor gate stack, the excess portion left unprotected by the first sidewall spacers. Second sidewall spacers are formed on the transistor gate stack, the second sidewall spacers completely encapsulating the metal layer of the transistor gate stack.Type: GrantFiled: March 17, 2011Date of Patent: June 5, 2012Assignee: International Business Machines CorporationInventors: Mukesh V. Khare, Renee T. Mo, Ravikumar Ramachandran, Richard S. Wise, Hongwen Yan
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Patent number: 8192636Abstract: The present invention relates to a method for treating copper or copper alloy surfaces for tight bonding to polymeric substrates, for example solder masks found in multilayer printed circuit boards. The substrate generally is a semiconductor-device, a lead frame or a printed circuit board.Type: GrantFiled: October 23, 2006Date of Patent: June 5, 2012Assignee: Atotech Deutschland GmbHInventors: Dirk Tews, Christian Sparing
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Publication number: 20120135607Abstract: A substrate processing method for forming a space extending along a predetermined line in a silicon substrate includes a first step of converging a laser light which is an elliptically-polarized light having an ellipticity other than 1 at the substrate so as to form a plurality of modified spots within the substrate along the line and produce a modified region including the modified spots, and a second step of anisotropically etching the substrate so as to advance an etching selectively along the modified region and form the space in the substrate. In the first step, the light is converged at the substrate such that a moving direction of the light with respect to the substrate and a direction of polarization of the light form an angle of 45° or greater therebetween, and the modified spots are made align in one row along the line.Type: ApplicationFiled: July 19, 2011Publication date: May 31, 2012Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Hideki Shimoi, Keisuke Araki
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Publication number: 20120135608Abstract: A substrate processing method for forming a space extending along a predetermined line in a silicon substrate includes a first step of converging a laser light which is an elliptically-polarized light having an ellipticity other than 1 at the substrate so as to form a plurality of modified spots within the substrate along the line and construct a modified region including the modified spots, and a second step of anisotropically etching the substrate so as to advance an etching selectively along the modified region and form the space in the substrate. In the first step, the light is converged at the substrate such that a moving direction of the light with respect to the substrate and a direction of polarization of the light form an angle of less than 45° therebetween, and the modified spots are made align in a plurality of rows along the line.Type: ApplicationFiled: July 19, 2011Publication date: May 31, 2012Applicant: Hamamatsu Photonics K.K.Inventors: Hideki Shimoi, Keisuke Araki
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Patent number: 8187975Abstract: A raised source-drain structure is formed using a process wherein a semiconductor structure is received in a process chamber that is adapted to support both an etching process and an epitaxial growth process. This semiconductor structure includes a source region and a drain region, wherein the source and drain regions each include a damaged surface layer. The process chamber is controlled to set a desired atmosphere and set a desired temperature. At the desired atmosphere and temperature, the etching process of process chamber is used to remove the damaged surface layers from the source and drain regions and expose an interface surface. Without releasing the desired atmosphere and while maintaining the desired temperature, the epitaxial growth process of the process chamber is used to grow, from the exposed interface surface, a raised region above each of the source and drain regions.Type: GrantFiled: December 6, 2010Date of Patent: May 29, 2012Assignee: STMicroelectronics, Inc.Inventors: Prasanna Khare, Nicolas Loubet, Qing Liu
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Patent number: 8187955Abstract: A semiconductor-carbon alloy layer is formed on the surface of a semiconductor substrate, which may be a commercially available semiconductor substrate such as a silicon substrate. The semiconductor-carbon alloy layer is converted into at least one graphene layer during a high temperature anneal, during which the semiconductor material on the surface of the semiconductor-carbon alloy layer is evaporated selective to the carbon atoms. As the semiconductor atoms are selectively removed and the carbon concentration on the surface of the semiconductor-carbon alloy layer increases, the remaining carbon atoms in the top layers of the semiconductor-carbon alloy layer coalesce to form a graphene layer having at least one graphene monolayer. Thus, a graphene layer may be provided on a commercially available semiconductor substrate having a diameter of 200 mm or 300 mm.Type: GrantFiled: August 24, 2009Date of Patent: May 29, 2012Assignee: International Business Machines CorporationInventors: Jack O. Chu, Christos D. Dimitrakopoulos, Alfred Grill, Chun-yung Sung