Detail Of Nonsemiconductor Component Of Radiation-sensitive Semiconductor Device (epo) Patents (Class 257/E31.11)
  • Publication number: 20130008494
    Abstract: One method of implanting a workpiece involves implanting the workiece with an n-type dopant in a first region with center and a periphery. The workpiece also is implanted with a p-type dopant in a second region complementary to the first region. This second region also has a center and a periphery. The periphery of the first region and the periphery of the second region at least partially overlap. A dose at the periphery of the first region or second region is less than a dose at the center of the first region or second region. The region of overlap may function as a junction where charge carriers cannot pass.
    Type: Application
    Filed: July 7, 2011
    Publication date: January 10, 2013
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Nicholas P.T. Bateman, Peter L. Kurunczi, Benjamin B. Riordon, John W. Graff
  • Patent number: 8350275
    Abstract: An optoelectronic device assembly can include: a coated element and an electroactive cell on the coated element, wherein the electroactive cell is selected from the group consisting of a light emitting diode and a photovoltaic cell. The coated element can include: transparent thermoplastic substrate and a protective weathering layer. The transparent thermoplastic substrate can include a material selected from the group consisting of aromatic polycarbonate and polyester, and combinations including at least one of the foregoing materials. The protective weathering layer can have a UV absorbance loss rate at 330 nm of less than or equal to 0.15 A/year as estimated from filtered xenon arc exposure and/or having a rate of erosion of less than or equal to 5 ?m per year as estimated from filtered xenon arc exposure.
    Type: Grant
    Filed: April 1, 2011
    Date of Patent: January 8, 2013
    Assignee: SABIC Innovative Plastics IP B.V.
    Inventors: Min Yan, James Edward Pickett, Rebecca Suzanne Northey
  • Publication number: 20130005071
    Abstract: The present invention provides a sealing material for a solar cell that seals a solar cell element of a solar cell in a short time in the production of a solar cell module, thereby enabling efficient production of solar cell modules. The sealing material for a solar cell of the present invention has a feature of containing 100 parts by weight of a modified butene-based resin that is produced by graft-modifying a butene-ethylene copolymer having a butene content of 1 to 25% by weight with maleic anhydride and has a total content of the maleic anhydride of 0.1 to 3% by weight, and 0.1 to 15 parts by weight of a silane compound having an epoxy group.
    Type: Application
    Filed: January 26, 2011
    Publication date: January 3, 2013
    Inventors: Hiroshi Hiraike, Masahiro Asuka, Masahiro Ishii, Jiamo Guo, Kiyomi Uenomachi, Takahiko Sawada, Takahiro Nomura
  • Publication number: 20130001733
    Abstract: According to one embodiment, a method for manufacturing a solid-state imaging apparatus is provided. The method for manufacturing a solid-state imaging apparatus includes forming an element separating area separating photoelectric converting elements therebetween by epitaxially growing a semiconductor layer of a first conductivity type; and forming a charge accumulating area in the photoelectric converting element by epitaxially growing a semiconductor layer of a second conductivity type.
    Type: Application
    Filed: March 16, 2012
    Publication date: January 3, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Ryota WATANABE
  • Publication number: 20130001661
    Abstract: Embodiments of a process for forming a photodetector region in a CMOS pixel by dopant implantation, the process comprising masking a photodetector area of a surface of a substrate for formation of the photodetector region, positioning the substrate at a plurality of twist angles, and at each of the plurality of twist angles, directing dopants at the photodetector area at a selected tilt angle. Embodiments of a CMOS pixel comprising a photodetector region formed in a substrate, the photodetector region comprising overlapping first and second dopant implants, wherein the overlap region has a different dopant concentration than the non-overlapping parts of the first and second implants, a floating diffusion formed in the substrate, and a transfer gate formed on the substrate between the photodetector and the transfer gate. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: September 13, 2012
    Publication date: January 3, 2013
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Duli Mao, Hsin-Chih Tai, Vincent Venezia, Yin Qian, Howard E. Rhodes
  • Publication number: 20130001731
    Abstract: A method of fabricating an optoelectronic device includes creating an optoelectronic structure on a first substrate. The optoelectronic structure includes a release layer and a plurality of inorganic semiconductor layers supported by the release layer. The plurality of inorganic semiconductor layers is configured to be active in operation of the optoelectronic device. The plurality of inorganic semiconductor layers are permanently attached to a second substrate, which is flexible. The plurality of inorganic semiconductor layers are released from the first substrate after the attaching step, and the second substrate is deformed to a non-planar configuration.
    Type: Application
    Filed: June 28, 2012
    Publication date: January 3, 2013
    Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Stephen Forrest, Jeramy D. Zimmerman, Xin Xu, Christopher Kyle Renshaw
  • Publication number: 20120329197
    Abstract: A photovoltaic device including at least one top cell that include at least one III-V semiconductor material; a bottom cell of a germanium containing material having a thickness of 10 microns or less; and a back surface field (BSF) region provided by a eutectic alloy layer of aluminum and germanium on the back surface of the bottom cell of that is opposite the interface between the bottom cell and at least one of the top cells. The eutectic alloy of aluminum and germanium bonds the bottom cell of the germanium-containing material to a supporting substrate.
    Type: Application
    Filed: September 6, 2012
    Publication date: December 27, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Publication number: 20120325282
    Abstract: A plurality of solar cells is connected together in a shingled fashion. Each of the solar cells includes grid wires that are attached to an electrode of the solar cell so as to receive charge carriers produced when photons are absorbed by the solar cell. The grid wires are then interconnected with adjacent solar cells when the solar cells are shingled together. The grid wires may be applied to the solar cells via a laminate and the electrical interconnection of the grid wires may be achieved by the use of a conductive epoxy.
    Type: Application
    Filed: June 24, 2011
    Publication date: December 27, 2012
    Applicant: SoloPower, Inc.
    Inventors: Richard Snow, Eric Lee, Burak Metin, Serkan Erdemli, Anjuli Appapillai
  • Publication number: 20120325315
    Abstract: A photoelectric converter device includes a front surface glass plate, a photoelectric conversion unit formed on the front surface glass plate and serving to generate electric power in response to incidence of light, and a back surface glass plate arranged so as to cover the photoelectric conversion unit. The front surface glass plate and the back surface glass plate are fused and joined in at least a part of a peripheral portion of the glass plates.
    Type: Application
    Filed: August 31, 2012
    Publication date: December 27, 2012
    Applicant: Panasonic Corporation
    Inventor: Wataru Shinohara
  • Publication number: 20120328235
    Abstract: The present invention relates to a flexible method of provide chips for optical interconnect with different number of channels.
    Type: Application
    Filed: April 30, 2012
    Publication date: December 27, 2012
    Applicant: IPTRONICS A/S
    Inventors: Steen Bak Christensen, Thorkild Franck
  • Publication number: 20120322195
    Abstract: The present invention relates to a process for producing solar modules.
    Type: Application
    Filed: August 3, 2010
    Publication date: December 20, 2012
    Applicant: LANXESS DEUTSCHLAND GMBH
    Inventors: Gerd Bergmann, Michael Herrmann, Arndt Kremers
  • Publication number: 20120319225
    Abstract: Embodiments of the present invention relate to photovoltaic cells. Specifically, the present invention relates to photovoltaic (PV) cells configurable for energy conversion and imaging. In a typical embodiment, each photovoltaic cell (PV) in the photovoltaic array is divided into a pixel-based array. Each photovoltaic cell is coupled to a set of switches and the photovoltaic cell is dynamically configured for energy conversion or imaging based on the settings of at least one of the switches.
    Type: Application
    Filed: June 14, 2011
    Publication date: December 20, 2012
    Inventor: Moon J. Kim
  • Publication number: 20120319242
    Abstract: Forming a doped isolation region in a substrate during manufacture of an image sensor. A method of an aspect includes forming a hardmask layer over the substrate, and forming a photoresist layer over the hardmask layer. An opening is formed in the photoresist layer over an intended location of the doped isolation region. An opening is etched in the hardmask layer by exposing the hardmask layer to one or more etchants through the opening. The opening in the hardmask layer may have a width of less than 0.4 micrometers. The doped isolation region may be formed in the substrate beneath the opening in the hardmask layer by performing a dopant implantation that introduces dopant through the opening in the hardmask layer. The method of an aspect may include forming sidewall spacers on sidewalls of the opening in the hardmask layer and using the sidewall spacers as a dopant implantation mask.
    Type: Application
    Filed: June 20, 2011
    Publication date: December 20, 2012
    Inventors: Duli Mao, Hsin-Chih Tai, Vincent Venezia, Keh-Chiang Ku, Yin Qian, Gang Chen, Rongsheng Yang, Howard Rhodes
  • Patent number: 8334554
    Abstract: An image sensor includes a first region of a substrate having photoelectric conversion elements formed therein, and includes a second region of the substrate outside of the first region. The image sensor includes a plurality of lenses, a plurality of embossing structures, and a protective layer. The lenses are formed over the first region. The embossing structures are formed over the second region, and the embossing structures are separated from each-other. The protective layer is formed over the lenses and the embossing structures that prevent crack propagation.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: December 18, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Kwan Kim, June-Taeg Lee, Jeong-Wook Ko, Jung-Saeng Kim
  • Publication number: 20120315709
    Abstract: Process for producing a solar cell substrate, where metal particles are deposited on the surface of substrate. Metal particles are produced by liquid flame spraying method in such a way that the mean diameter of the particles to be between 30 nm and 150 nm and the deposition process is controlled in such a way that the average distance between particles is not more than four times the mean diameter of particles. Apparatus for carrying out such process.
    Type: Application
    Filed: December 13, 2010
    Publication date: December 13, 2012
    Applicant: BENEQ OY
    Inventors: Tommi Vainio, Jarmo Skarp
  • Publication number: 20120313203
    Abstract: A semiconductor package includes a wiring board, an electronic component mounted on the wiring board, and an enclosing frame arranged on an upper surface of the electronic component. The enclosing frame includes a basal portion, which has the form of a closed frame and extends along the upper surface of the electronic component, and an adhesion portion, which is wider than the basal portion and is arranged on the upper surface of the basal portion. A cap is adhered to an upper surface of the adhesion portion. A molding resin contacts a lower surface of the adhesion portion and seals the electronic component and the wiring board that are exposed from the enclosing frame.
    Type: Application
    Filed: June 1, 2012
    Publication date: December 13, 2012
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventors: Masayuki FUSE, Satoshi MATSUZAWA
  • Patent number: 8329500
    Abstract: Provided is a method of manufacturing a photovoltaic device using a Joule heating-induced crystallization method. The method includes: forming a first conductive pattern on a substrate; forming a photoelectric conversion layer on the substrate having the first conductive pattern; and crystallizing at least part of the photoelectric conversion layer by applying an electric field to the photoelectric conversion layer, wherein the photoelectric conversion layer includes a first amorphous semiconductor layer containing first impurities, a second intrinsic, amorphous semiconductor layer, and a third amorphous semiconductor layer containing second impurities.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: December 11, 2012
    Assignees: Samsung Display Co., Ltd., Samsung SDI Co., Ltd.
    Inventors: Byoung-Kyu Lee, Se-Jin Chung, Byoung-June Kim, Czang-Ho Lee, Myung-Hun Shin, Min-Seok Oh, Ku-Hyun Kang, Yuk-Hyun Nam, Seung-Jae Jung, Min Park, Mi-Hwa Lim, Joon-Young Seo
  • Publication number: 20120305946
    Abstract: A modular LED array light source comprises an assembly of a plurality of solid-state LED array modules. Modules are abutted to provide a large area, high intensity, and high-density array that provides substantially uniform irradiance. Preferably, in each module, a linear or rectangular array of groups of LED is provided in which the density of LED die in the array is higher at ends or edges of the modules abutting other modules, to provide improved uniformity of irradiance over the illuminated area between modules. Particular arrangements of clusters of LEDs are provided that reduce or overcome the discontinuity or dip in irradiance due to edge or wall effects caused by the spacing of LED die from edges of the substrate/packaging of each module. These arrangements are advantageous for hermetically sealed LED array modules, for example, which require a minimum wall thickness for an effective seal.
    Type: Application
    Filed: February 10, 2010
    Publication date: December 6, 2012
    Inventors: Sola Anne Kuk, Yong Wang, James Francis Farrell
  • Patent number: 8319302
    Abstract: The wafer arrangement (100) provided comprises a first wafer (101), which comprises an integrated circuit and a recess (105). The wafer arrangement further comprises a portion of a second wafer (103), which comprises a carrier portion and a protrusion (107), the protrusion comprising an active component or actively controlled component (109) such as a MEMS component, wherein the portion of the second wafer (103) is coupled to the first wafer (101) such that the protrusion (107) is received in the recess (105). The invention provides a mechanism for accurately aligning an active component (109) on the second wafer (103) with components on the first wafer (101), such as photonic, electronic or optical components.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: November 27, 2012
    Assignee: Agency for Science, Technology and Research
    Inventors: Qingxin Zhang, Guo-Qiang Patrick Lo, Mingbin Yu, Dim-Lee Kwong
  • Publication number: 20120295388
    Abstract: A solar module includes a substrate member, a plurality of photovoltaic strips arranged in an array configuration overlying the substrate member, and a concentrator structure comprising extruded glass material operably coupled to the plurality of photovoltaic strips. A plurality of elongated convex regions are configured within the concentrator structure. The plurality of elongated convex regions are respectively coupled to the plurality of photovoltaic strips. Each of the plurality of elongated convex regions includes a length and a convex surface region characterized by a radius of curvature, each of the elongated convex regions being configured to have a magnification ranging from about 1.5 to about 5. A coating material rendering the glass self-cleaning overlies the plurality of elongated convex regions.
    Type: Application
    Filed: July 30, 2012
    Publication date: November 22, 2012
    Applicant: Solaria Corporation
    Inventors: Kevin R. GIBSON, Abhay MAHESHWARI
  • Publication number: 20120291840
    Abstract: Methods of isolating photovoltaic cells in a module by providing a textured glass substrate with a pattern of textured areas and a pattern of non-textured areas; forming a plurality of photovoltaic cells on the glass substrate; and isolating each of the cells from each adjacent cell to form the module. Glass substrates have a surface with a pattern of textured areas; and a pattern of non-textured areas, wherein the non-textured areas are in the form of strips having an average width of from 10 microns to 500 microns. Articles have a glass substrate having a surface comprising a pattern of textured areas and a pattern of non-textured areas; and a plurality of isolated photovoltaic cells formed on the glass substrate.
    Type: Application
    Filed: April 26, 2012
    Publication date: November 22, 2012
    Inventors: Glenn Eric Kohnke, Jia Liu, Sasha Marjanovic
  • Publication number: 20120292658
    Abstract: The present invention discloses a semiconductor optoelectronic converting system and the fabricating method thereof, the system comprises a supporting module, a heat pipe, a power converting module and a heat-dissipating plate module. The main features of the present invention are that the supporting module has an accommodating space for disposing the heat pipe, and wherein the supporting module and the heat pipe have a common surface for disposing the power converting module thereon. Furthermore, the present invention further decreases the heat resistant therebetween and improves the heat conducting rate and further capable of becoming a rechargeable self-sufficiency lighting system.
    Type: Application
    Filed: May 14, 2012
    Publication date: November 22, 2012
    Applicant: NEOBULB TECHNOLOGIES, INC.
    Inventors: Jen-Shyan Chen, Hsian-Lung Tan
  • Patent number: 8313974
    Abstract: An embodiment of the substrate transport method of the present invention includes a plasma CVD apparatus (10), a first transport robot (20) that retrieves the plurality of substrates processed by the plasma CVD apparatus (10) one by one, and sequentially storing the substrates in a substrate cassette (30) capable of loading substrates in multiple stages, and a second transport robot (40) that retrieves the substrates from the substrate cassette (3) one by one and transports the substrates to a pre-patterning alignment step (50).
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: November 20, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Junichi Nozaki
  • Publication number: 20120288978
    Abstract: Disclosed is a method for forming a buffer layer (5) in a dye-sensitized solar cell including a transparent electrode (1), a counter electrode (2), an electrolyte layer (3) disposed between the electrodes (1) and (2), and a photocatalyst film (4) disposed between the electrodes (1) and (2) and near the transparent electrode (1), the buffer layer (5) being disposed between the transparent electrode (1) and photocatalyst film (4), the method including: forming the buffer layer by sintering a mixed solution of an alcohol solution and 0.03% to 5% by mass of metal alkoxide by laser beam irradiation after applying the mixed solution to the surface of the transparent electrode (1) by spin coating, the transparent electrode (1) being rotated by a rotating table (52).
    Type: Application
    Filed: December 22, 2010
    Publication date: November 15, 2012
    Applicant: HITACHI ZOSEN CORPORATION
    Inventors: Takeshi Sugiyo, Tetsuya Inoue
  • Publication number: 20120285522
    Abstract: Method of depositing a TCO layer on a substrate, of depositing precursors of a solar cell and precursors of a solar cell are described. The methods includes DC sputtering a ZnO-containing transparent conductive oxide layer over the substrate, the substrate having a size of 1.4 m2 or above and texturing the ZnO-containing transparent conductive oxide layer, wherein the textured ZnO-containing transparent conductive oxide layer has a root means square roughness of 60 nm or below.
    Type: Application
    Filed: May 10, 2012
    Publication date: November 15, 2012
    Applicant: Applied Materials, Inc.
    Inventors: Elisabeth Sommer, Philipp Obermeyer, Thomas Zilbauer, Inge Vermeir, Daniel Severin, Niels Kuhr, Markus Kress, Christof Kurthen, Ursula Ingeborg Schmidt, Stefan Klein, Susanne Buschbaum, Konrad Schwanitz, Christian Stoemmer, Tobias Stolley, Martin Rohde, Andreas Rembeck
  • Publication number: 20120288983
    Abstract: Disclosed is a method for manufacturing a dye sensitized solar cell module. The method includes putting at least one or more heating-wires on an upper portion of an electrode of each solar cell sub-module; applying a metal paste on the upper portion of the electrode including at least one or more heating-wires; and heating and curing the metal paste by after overlapping the electrodes of a plurality of solar cell sub-modules each other, allowing a current to flow to at least one or more heating-wires.
    Type: Application
    Filed: April 30, 2012
    Publication date: November 15, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Moo Jung Chu, Ju Mi Kim, Yong Sung Eom, Ah Ram Jeon, Jong Tae Moon
  • Patent number: 8309392
    Abstract: A back-illuminated type solid-state image pickup device (1041) includes read circuits (Tr1, Tr2) formed on one surface of a semiconductor substrate (1042) to read a signal from a photo-electric conversion element (PD) formed on the semiconductor substrate (1042), in which electric charges (e) generated in a photo-electric conversion region (1052c1) formed under at least one portion of the read circuits (Tr1, Tr2) are collected to an electric charge accumulation region (1052a) formed on one surface side of the semiconductor substrate (1042) of the photo-electric conversion element (PD) by electric field formed within the photo-electric conversion element (PD). Thus, the solid-state image pickup device and the camera are able to make the size of pixel become very small without lowering a saturation electric charge amount (Qs) and sensitivity.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: November 13, 2012
    Assignee: Sony Corporation
    Inventors: Shin Iwabuchi, Kazuhide Yokota, Takeshi Yanagita, Yasushi Maruyama
  • Publication number: 20120279559
    Abstract: The present invention relates to solar modules comprising polycarbonate blend films as rear face films for protection against weathering and mechanical damage.
    Type: Application
    Filed: October 1, 2010
    Publication date: November 8, 2012
    Applicant: Bayer MaterialScience AG
    Inventors: Gunther Stollwerck, Ernst-Ulrich Reisner, Katrin Petzel-Maryniak, Andreas Seidel
  • Patent number: 8304848
    Abstract: Certain embodiments provide an infrared imaging device including: an SOI structure that is placed at a distance from a substrate, and includes: heat-sensitive diodes that detect infrared rays and convert the infrared rays into heat; and STI regions that separate the heat-sensitive diodes from one another; an interlayer insulating film that is stacked on the SOI structure; and supporting legs that are connected to the heat-sensitive diodes and vertical signal lines provided in outer peripheral regions of the heat-sensitive diodes. Each of the supporting legs includes: an interconnect unit that transmit signals to the vertical signal lines; and interlayer insulating layers that sandwich the interconnect unit, each bottom side of the interlayer insulating layers being located in a higher position than the SOI structure.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: November 6, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Suzuki, Ikuo Fujiwara, Keita Sasaki, Honam Kwon, Hitoshi Yagi, Hiroto Honda, Koichi Ishii, Masako Ogata, Risako Ueno, Hideyuki Funaki
  • Publication number: 20120273908
    Abstract: Disclosed herein is a stacked chip package including an image sensor including a recess formed on a surface thereof, and a digital signal processor chip that is positioned within the recess. Also disclosed herein is a method of fabricating a stacked chip package including the steps of forming a recess on a surface of an image sensor and positioning a digital signal processor in the recess of the image sensor.
    Type: Application
    Filed: January 18, 2012
    Publication date: November 1, 2012
    Applicant: APTINA IMAGING CORPORATION
    Inventors: LARRY KINSMAN, YU TE HSIEH
  • Publication number: 20120273043
    Abstract: A device, system, and method for solar cell construction and bonding/layer transfer are disclosed herein. An exemplary structure of solar cell construction involves providing a monocrystalline donor layer. A solder bonding layer bonds the donor layer to a carrier substrate. A porous layer may be used to separate the donor layer.
    Type: Application
    Filed: April 30, 2012
    Publication date: November 1, 2012
    Applicant: AMBERWAVE INC.
    Inventors: Anthony Lochtefeld, Chris Leitz, Mark Carroll
  • Publication number: 20120270364
    Abstract: A semiconductor device includes a semiconductor substrate having at least one surface provided with a semiconductor element, wherein the semiconductor substrate includes a region of a first conductivity type, the region being formed in a surface layer portion of the semiconductor substrate; a first diffusion region of a second conductivity type, the first diffusion region having a first impurity concentration and being formed in the surface layer portion, and a pn junction being formed between the first diffusion region and the region of the first conductivity type; and a first metal silicide film formed on part of a portion of the surface corresponding to the first diffusion region.
    Type: Application
    Filed: June 28, 2012
    Publication date: October 25, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Masaya Katayama
  • Publication number: 20120270358
    Abstract: Method for determining the dimensions of a plurality of chip-size photovoltaic cells diced out of a photovoltaic wafer, the method includes the procedures of determining the field of view angle of a plurality of crossed compound parabolic concentrators of an optical layer, determining the index of refraction of the material forming the optical layer, determining the dimensions of the optical entry aperture and the optical exit aperture of the crossed compound parabolic concentrators, as well as the distance separating the optical entry apertures of adjacent ones of the crossed compound parabolic concentrators, determining a dicing width for dicing the photovoltaic wafer into the plurality of chip-size photovoltaic cells, and determining the dimensions of the plurality of chip-size photovoltaic cells according to the dimensions of the optical entry aperture of the plurality of crossed compound parabolic concentrators, the distance separating the optical entry apertures of adjacent ones of the crossed compound
    Type: Application
    Filed: October 21, 2010
    Publication date: October 25, 2012
    Applicant: Impel Microchip Ltd.
    Inventors: Zohar Haviv, Mauricio De-La-Vega
  • Publication number: 20120270359
    Abstract: Embodiments of the present invention relate to a single step diffusion process used in selective emitter solar cell fabrication. In one embodiment, a dopant paste is selectively applied on a front surface of a substrate having opposite conductivity type from the dopant paste. The substrate is then exposed to a dopant containing vapor to deposit a doping layer having opposite conductivity type from the substrate on the front surface of the substrate. While the substrate is exposed to the dopant containing vapor, a portion of the dopant paste also contribute to deposition of the doping layer via gas phase transport of doping atoms from the dopant paste. The substrate is then heated in an atmosphere comprising oxygen and/or nitrogen to a temperature sufficient to cause the dopant atoms in the dopant paste and the doping layer to diffuse into the substrate, forming heavily and lightly doped emitter regions.
    Type: Application
    Filed: February 27, 2012
    Publication date: October 25, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventors: PRABHAT KUMAR, Jason Dominguez, David Tanner
  • Patent number: 8294230
    Abstract: A surface profile sensor includes an interlayer insulating film provided with a planarized upper surface formed above a semiconductor substrate, a detection electrode film formed on the interlayer insulating film, an upper insulating film formed on the detection electrode film and the interlayer insulating film and including the surface on which a silicon nitride film is exposed, and a protection insulating film deposited on the upper insulating film and made of a tetrahedral amorphous carbon (ta-C) film including a window formed on the detection electrode film.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: October 23, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Takahiro Yamagata, Kouichi Nagai
  • Publication number: 20120260974
    Abstract: Certain example embodiments relate to techniques for creating improved photovoltaic (PV) modules. In certain example embodiments and first and second glass substrate are provided. A PV array is provided between the first and second glass substrates. The first and second substrates are laminated together with the PV array between the glass substrates. In certain example embodiments the PV module is dimensioned to be similar to an existing roof system (e.g., a sunroof) in a vehicle. In certain example embodiments, holes are provided in a PV module sandwiched between two substrates, the holes being shaped and arranged within the PV module so as to allow light transmission into the vehicle at desired level while still being substantially filled by the laminate or adhesive material used to secure the PV module to the two surrounding substrates.
    Type: Application
    Filed: April 18, 2012
    Publication date: October 18, 2012
    Applicant: Guardian Industries Corporation
    Inventors: Greg Brecht, Vincent E. Ruggero, II, Timothy J. Frey, Robert A. Vandal
  • Publication number: 20120261729
    Abstract: Techniques and apparatus for using single photon avalanche diode (SPAD) devices in various applications.
    Type: Application
    Filed: April 17, 2012
    Publication date: October 18, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Hod Finkelstein, Sadik C. Esener
  • Publication number: 20120258561
    Abstract: In embodiments of the present invention an undoped amorphous, nanocrystalline or microcrystalline semiconductor layer and a heavily doped amorphous, nanocrystalline, or microcrystalline semiconductor layer are formed on a monocrystalline silicon lamina. The lamina is the base region of a photovoltaic cell, while the amorphous, nanocrystalline or monocrystalline layers serve to passivate the surface of the lamina, reducing recombination at this surface. In embodiments, the heavily doped layer additionally serves as either the emitter of the cell or to provide electrical contact to the base layer. The undoped and heavily doped layers are deposited at low temperature, for example about 150 degrees C. or less with hydrogen dilution. This low temperature allows use of low-temperature materials and methods, while increased hydrogen dilution improves film quality and/or conductivity.
    Type: Application
    Filed: April 11, 2011
    Publication date: October 11, 2012
    Applicant: TWIN CREEKS TECHNOLOGIES, INC.
    Inventors: Jian Li, Venkatesan Murali, Yonghua Liu, Dong Xu
  • Publication number: 20120255600
    Abstract: A photovoltaic device including at least one top cell that include at least one semiconductor material; a bottom cell of a germanium containing material having a thickness of 10 microns or less; and a back surface field (BSF) region provided by a eutectic alloy layer of aluminum and germanium on the back surface of the bottom cell of that is opposite the interface between the bottom cell and at least one of the top cells. The eutectic alloy of aluminum and germanium bonds the bottom cell of the germanium-containing material to a supporting substrate.
    Type: Application
    Filed: April 6, 2011
    Publication date: October 11, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Publication number: 20120249822
    Abstract: A solid-state imaging unit includes: a solid-state imaging device mounted on a substrate; a bonding wire which electrically connects a pad formed on the solid-state imaging device and a lead formed on the substrate; a frame member having a frame shape which surrounds side portions of the solid-state imaging device; and an optical member having optical transparency and mounted on the frame member so as to face an imaging surface of the solid-state imaging device, wherein the frame member has a leg portion which protrudes from an optical member side toward the imaging surface of the solid-state imaging device, and the frame member and the solid-state imaging device are integrally fixed to each other in a state where the leg portion comes into contact with an intermediate area which is located between an imaging area and a pad forming area on the imaging surface.
    Type: Application
    Filed: March 6, 2012
    Publication date: October 4, 2012
    Applicant: SONY CORPORATION
    Inventors: ATSUSHI YOSHIDA, YUUJI KISHIGAMI
  • Publication number: 20120248560
    Abstract: An image sensor includes a semiconductor substrate, a plurality of photo detecting elements and a backside protection pattern. The plurality of photo detecting elements may be formed in an upper portion of the semiconductor substrate. The plurality of photo detecting elements may be separate from each other. The backside protection pattern may be formed in a lower portion of the semiconductor substrate between the plurality of photo detecting elements.
    Type: Application
    Filed: March 27, 2012
    Publication date: October 4, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyung-Ho Lee, Jung-Chak Ahn
  • Publication number: 20120241895
    Abstract: Disclosed herein is a solid-state imaging device including: an opto-electrical conversion section provided inside a semiconductor substrate to receive incident light coming from one surface of the semiconductor substrate; a wiring layer provided on the other surface of the semiconductor substrate; and a light absorption layer provided between the other surface of the semiconductor substrate and the wiring layer to absorb transmitted light passing through the opto-electrical conversion section as part of the incident light.
    Type: Application
    Filed: March 2, 2012
    Publication date: September 27, 2012
    Applicant: Sony Corporation
    Inventor: Syogo Kurogi
  • Publication number: 20120241626
    Abstract: In the reference element employed in the thermal-type infrared solid-state image sensing device according to the present invention, a slit used for construction of a light receiving element is opened in insulating films between which a thermoelectric conversion element is tucked to such an extent that the slit pierces into the sacrifice layer; a film made of electrically conductive material covering the light receiving section and the slit is provided and a protective film is provided thereon, and the film made of electrically conductive material and the protective film enter the interior of the slit along a side wall of the slit, whereby a void is left in the interior of the slit. As a result, residual stresses of the insulating films are kept equal in the light receiving element and the reference element, and thereby, the light blocking effect and the heat transfer effect are improved.
    Type: Application
    Filed: March 23, 2012
    Publication date: September 27, 2012
    Inventor: Shigeru Tohyama
  • Publication number: 20120242875
    Abstract: A solid state imaging device includes: a substrate; a photoelectric conversion unit that is formed on the substrate to generate and accumulate signal charges according to light quantity of incident light; a vertical transmission gate electrode that is formed to be embedded in a groove portion formed in a depth direction from one side face of the substrate according to a depth of the photoelectric conversion unit; and an overflow path that is formed on a bottom portion of the transmission gate to overflow the signal charges accumulated in the photoelectric conversion unit.
    Type: Application
    Filed: February 28, 2012
    Publication date: September 27, 2012
    Applicant: SONY CORPORATION
    Inventor: Ryosuke Nakamura
  • Publication number: 20120242876
    Abstract: According to one embodiment, a solid-state image sensing device includes a semiconductor substrate which includes a first surface and a second surface opposite to the first surface, a pixel which is provided in the semiconductor substrate and which photoelectrically converts light emitted via a lens on the second surface, a support substrate which is provided on a first insulating layer covering an element on the first surface and which includes a trench, and a first device which is provided on the first insulating layer and which is accommodated in the trench of the support substrate.
    Type: Application
    Filed: March 22, 2012
    Publication date: September 27, 2012
    Inventor: Kenichiro Hagiwara
  • Publication number: 20120244655
    Abstract: An integrated circuit is formed by coating a top surface of a wafer that has been processed through all integrated circuit chip manufacturing steps prior to backgrind with photoresist, applying backgrind tape over a top surface of the photoresist, backgrinding a back surface of the wafer to a specified thickness, removing the backgrind tape from the top surface of the photoresist, and removing the photoresist. The surface of the integrated circuit and any devices that may be bonded to the surface of the integrated circuit are protected by the photoresist layer during removal of the backgrind tape.
    Type: Application
    Filed: March 5, 2012
    Publication date: September 27, 2012
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Gregory A. MOORE, Tyonda HILL
  • Patent number: 8273597
    Abstract: The present invention provides a process for making solar panels. The process of the present invention avoids the use of laser scribing so it is particularly useful in making flexible solar panels. In addition, the present invention provides an alternative scheme for connecting the first electrodes and second electrodes in a solar panel.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: September 25, 2012
    Assignee: Du Pont Apollo Ltd.
    Inventors: Chiou Fu Wang, Huo-Hsien Chiang
  • Publication number: 20120237842
    Abstract: The method for producing the optical semiconductor of the present disclosure includes a mixing step of producing a mixture containing a reduction inhibitor and a niobium compound that contains at least oxygen in its composition; a nitriding step of nitriding the mixture by the reaction between the mixture and a nitrogen compound gas; and a washing step of isolating niobium oxynitride from the material obtained through the nitriding step by dissolving chemical species other than niobium oxynitride with a washing liquid. The optical semiconductor of the present disclosure substantially consists of niobium oxynitride having a crystal structure of baddeleyite and having a composition represented by the composition formula, NbON.
    Type: Application
    Filed: May 29, 2012
    Publication date: September 20, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Takahiro SUZUKI, Takaiki NOMURA, Satoru TAMURA, Kazuhito HATO, Noboru TANIGUCHI, Kenichi TOKUHIRO, Nobuhiro MIYATA
  • Publication number: 20120235271
    Abstract: According to one embodiment, there is provided a solid-state image sensing device including a photodiode in which a semiconductor region of a first conductivity type formed on a substrate and a semiconductor region of a second conductivity type which is different from the first conductivity type is made as a PN junction. The semiconductor region of the first conductivity type has a first semiconductor region and a plurality of second semiconductor regions. Either of the first semiconductor region and each of the second semiconductor regions is formed by a material containing Si as a main component. The other of the first semiconductor region and each of the second semiconductor regions is formed by a material containing Si1-xGex (0<x?1) as a main component. Each of the plurality of second semiconductor regions is provided in a shape of an island over the first semiconductor region.
    Type: Application
    Filed: March 13, 2012
    Publication date: September 20, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Hisayo MOMOSE
  • Publication number: 20120234388
    Abstract: Methods and devices are provided for avalanche breakdown in a thin-film solar cell.
    Type: Application
    Filed: August 26, 2010
    Publication date: September 20, 2012
    Inventors: Robert Stancel, Joseph Jalbert