Detail Of Nonsemiconductor Component Of Radiation-sensitive Semiconductor Device (epo) Patents (Class 257/E31.11)
  • Publication number: 20120238049
    Abstract: In a method for removing at least sections of at least one semiconductor layer (4) of a layer stack (1), an optically dense metallisation layer (3) is heated such that the semiconductor layer located on top is detached.
    Type: Application
    Filed: November 29, 2010
    Publication date: September 20, 2012
    Applicant: Manz Automation AG
    Inventors: Vasile Raul Moldovan, Christoph Tobias Neugebauer
  • Publication number: 20120235265
    Abstract: A light receiving element includes a core configured to propagate a signal light, a first semiconductor layer having a first conductivity type, the first semiconductor layer being configured to receive the signal light from the core along a first direction in which the core extends, an absorbing layer configured to absorb the signal light received by the first semiconductor layer, and a second semiconductor layer having a second conductivity type opposite to the first conductivity type.
    Type: Application
    Filed: February 22, 2012
    Publication date: September 20, 2012
    Applicant: FUJITSU LIMITED
    Inventor: Kazumasa TAKABAYASHI
  • Publication number: 20120235269
    Abstract: An optical sensor includes an impurity region for a photodiode and an angle limiting filter limiting the incidence angle of incidence light incident to a light receiving area of the photodiode, which are formed on a semiconductor substrate. The angle limiting filter is formed by at least a first plug corresponding to a first insulating layer and a second plug corresponding to a second insulating layer located in an upper layer of the first insulating layer. Between the first plug and the second plug, there is a gap area having a gap space that is equal to or less than ?/2.
    Type: Application
    Filed: March 15, 2012
    Publication date: September 20, 2012
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Akira UEMATSU, Yoshiyuki TERASHIMA, Yoichi SATO, Atsushi MATSUO
  • Publication number: 20120238048
    Abstract: A method of manufacturing a solar cell, which includes an edge deletion step using a laser beam, and a manufacturing apparatus which is used in such a method, the method and the apparatus being capable of preventing a shunt and cracks from being generated are provided. By radiating a first laser beam to a multilayer body, which includes a transparent electrode layer, a photoelectric conversion layer, and a back electrode layer sequentially formed on a transparent substrate, from a side of the transparent substrate, the photoelectric conversion layer and the back electrode layer in a first region are removed, and by radiating a second laser beam into the region such that the second laser beam is spaced from a peripheral rim of the region, the transparent electrode layer in a second region is removed.
    Type: Application
    Filed: August 30, 2010
    Publication date: September 20, 2012
    Inventors: Yoshiaki Yamamoto, Hitoshi Ikeda, Tomoki Ohnishi, Kouichi Tamagawa
  • Patent number: 8269300
    Abstract: A packaged image sensor assembly utilizes a spacer paste to control the height of a transparent window above an image sensor die to provide safe wire bond clearance. A dam structure is used to control the height of the transparent window. The dam may be formed either entirely from spacer paste or by depositing the spacer paste on an underlying patterned mesa. An additional encapsulant is provided outside of the dam to encapsulate wirebonds and provide additional protection from moisture permeation.
    Type: Grant
    Filed: April 29, 2008
    Date of Patent: September 18, 2012
    Assignee: OmniVision Technologies, Inc.
    Inventors: Yeh-An Chien, Wei-Feng Lin
  • Patent number: 8269264
    Abstract: An image sensor having an array of pixels disposed in a substrate. Each pixel includes a photosensitive element, a color filter, and waveguide walls. The waveguide walls are disposed in the color filter and surround portions of the color filter to form waveguides through the color filter. The refractive index of the waveguide walls is less than the refractive index of the color filter. The image sensor may be back side illuminated (BSI) or front side illuminated (FSI). In some embodiments, metal walls may be coupled to the waveguide walls.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: September 18, 2012
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hidetoshi Nozaki, Fei Wu
  • Patent number: 8263428
    Abstract: This disclosure provides polymer electrolytes for dye-sensitized solar cells that can not only prevent electrolytes from leaking, but also exhibit a higher solar conversion efficiency when compared with conventional polymer electrolytes, whereby the polymer electrolytes are applicable to a process for manufacturing dye-sensitized solar cells with a large surface area or flexible dye-sensitized solar cells, and methods for manufacturing modules of dye-sensitized solar cells using the same.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: September 11, 2012
    Assignee: Toray Advanced Materials Korea Inc.
    Inventors: Chang-Hoon Sim, Sang-Pil Kim, Ki-Jeong Moon
  • Patent number: 8258595
    Abstract: Provided are an image sensor and a method for manufacturing the same. The image sensor comprises a substrate, a bonding silicon, an interlayer dielectric, a first contact plug, a second contact plug, a second metal interconnection, and a color filter layer and a microlens. The substrate comprises a first metal interconnection. The bonding silicon is formed on the substrate, and comprises a plurality of impurity regions. The interlayer dielectric is formed on the bonding silicon. The first contact plug penetrates the bonding silicon and is electrically connected to the first metal interconnection. The second contact plug penetrates the interlayer dielectric and is connected to a surface of the bonding silicon. The second metal interconnection is formed on the interlayer dielectric, and is connected to the second contact plug. The color filter layer and a microlens are formed over the second metal interconnection.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: September 4, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Seoung Hyun Kim
  • Publication number: 20120217600
    Abstract: A manufacturing method of a semiconductor device according to embodiments includes forming a photodiode layer, which is an active region including a photodiode, on a main surface of a first substrate, forming a wiring layer, which includes a wire and a dielectric layer covering the wire, on the photodiode layer, and forming a dielectric film on the wiring layer. The manufacturing method of the semiconductor device according to the embodiments further includes bonding a second substrate to the dielectric film of the first substrate so that a crystal orientation of the photodiode layer matches a crystal orientation of the second substrate.
    Type: Application
    Filed: February 8, 2012
    Publication date: August 30, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi HONGO, Kazumasa Tanida, Akihiro Hori, Kenji Takahashi, Hideo Numata
  • Publication number: 20120217558
    Abstract: A solid-state imaging device includes: a substrate which is formed of a semiconductor and includes a first surface and a second surface which face opposite sides; a gate insulation film which is formed on a trench formed in the substrate to penetrate the first surface and the second surface; and a gate electrode which is embedded in the trench through the gate insulation film to be exposed to a second surface side of the substrate. A step difference is formed from the second surface of the substrate to a tip end surface of the gate electrode on the second surface side.
    Type: Application
    Filed: January 25, 2012
    Publication date: August 30, 2012
    Applicant: SONY CORPORATION
    Inventor: Hideaki Togashi
  • Patent number: 8253214
    Abstract: An image sensor includes a unit cell having a plurality of pixels; the unit cell comprising an amplifier input transistor that is shared by the plurality of pixels; a plurality of floating diffusions that are joined by a floating diffusion interconnect layer and are connected to the amplifier input transistor; and an interconnect layer which forms an output signal wire which shields the floating diffusion interconnect layer.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: August 28, 2012
    Assignee: Omnivision Technologies, Inc.
    Inventors: Robert M. Guidash, Ravi Mruthyunjaya, Weize Xu
  • Publication number: 20120212637
    Abstract: A solid-state imaging apparatus, comprising: a semiconductor chip having a principal face including a pixel region; a protruding portion disposed on the principal face to surround the pixel region; a cover member disposed over the pixel region; and an adhesive material surrounding the pixel region and bonding the cover member and the protruding portion, is provided. The protruding portion has top and first side faces facing the space, a first edge line being formed by this two faces. The adhesive material bonds the top face of the protruding portion and the cover member. The adhesive material has a first face facing the interior space, and the first face extends from the first edge line toward the cover member. Perimeters of the interior space, in planes parallel to the principal face become shorter in a direction from the top face of the protruding portion toward the cover member.
    Type: Application
    Filed: January 27, 2012
    Publication date: August 23, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Koji Tsuduki, Takanori Suzuki, Hisatane Komori, Satoru Hamasaki
  • Publication number: 20120211849
    Abstract: A method for manufacturing a semiconductor device including: forming a wiring layer on a surface side of a first semiconductor wafer; forming a buried film so as to fill in a level difference on the wiring layer, the level difference being formed at a boundary between a peripheral region of the first semiconductor wafer and an inside region being on an inside of the peripheral region, and the level difference being formed as a result of a surface over the wiring layer in the peripheral region being formed lower than a surface over the wiring layer in the inside region, and making the surfaces over the wiring layer in the peripheral region and the inside region substantially flush with each other; and opposing and laminating the surfaces over the wiring layer formed in the first semiconductor wafer to a desired surface of a second semiconductor wafer.
    Type: Application
    Filed: February 3, 2012
    Publication date: August 23, 2012
    Applicant: SONY CORPORATION
    Inventor: Hiroyasu Matsugai
  • Publication number: 20120211804
    Abstract: A photosite may include, in a semi-conductor substrate, a photodiode pinched in the direction of the depth of the substrate including a charge storage zone, and a charge transfer transistor to transfer the stored charge. The charge storage zone may include a pinching in a first direction passing through the charge transfer transistor defining a constriction zone adjacent to the charge transfer transistor.
    Type: Application
    Filed: February 16, 2012
    Publication date: August 23, 2012
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SA
    Inventors: Julien MICHELOT, Francois Roy, Frederic Lalanne
  • Publication number: 20120205682
    Abstract: A substrate-free semiconducting sheet has an array of semiconducting elements dispersed in a matrix material. The matrix material is bonded to the edge surfaces of the semiconducting elements and the substrate-free semiconducting sheet is substantially the same thickness as the semiconducting elements.
    Type: Application
    Filed: April 16, 2012
    Publication date: August 16, 2012
    Inventors: Karl W. Beeson, Scott M. Zimmerman, William R. Livesay, Richard L. Ross
  • Publication number: 20120205769
    Abstract: Provided is an image sensor device. The image sensor device includes having a front side, a back side, and a sidewall connecting the front and back sides. The image sensor device includes a plurality of radiation-sensing regions disposed in the substrate. Each of the radiation-sensing regions is operable to sense radiation projected toward the radiation-sensing region through the back side. The image sensor device includes an interconnect structure that is coupled to the front side of the substrate. The interconnect structure includes a plurality of interconnect layers and extends beyond the sidewall of the substrate. The image sensor device includes a bonding pad that is spaced apart from the sidewall of the substrate. The bonding pad is electrically coupled to one of the interconnect layers of the interconnect structure.
    Type: Application
    Filed: February 16, 2011
    Publication date: August 16, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shuang-Ji Tsai, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Hsiao-Hui Tseng
  • Publication number: 20120199202
    Abstract: A method for fabricating a crystalline silicon photovoltaic cell is disclosed. In one aspect, the method includes a) providing a crystalline silicon substrate of a first dopant type, b) performing an implantation, thereby introducing dopants of a second type opposite to the first type at a front side of the crystalline silicon substrate, c) after the implantation, depositing a hydrogen containing layer on the front surface of the substrate, and d) after depositing the hydrogen containing layer, performing a thermal treatment, thereby electrically activating the dopant of the second type.
    Type: Application
    Filed: February 3, 2012
    Publication date: August 9, 2012
    Applicants: Katholieke Universiteit Leuven, IMEC
    Inventor: Victor Prajapati
  • Publication number: 20120202307
    Abstract: A first waveguide member is formed, as viewed from above, in an image pickup region and a peripheral region of a semiconductor substrate. A part of the first waveguide member, which part is disposed in the peripheral region, is removed. A flattening step is then performed to flatten a surface of the first waveguide member on the side opposite to the semiconductor substrate.
    Type: Application
    Filed: February 3, 2012
    Publication date: August 9, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Sho Suzuki, Takehito Okabe, Masatsugu Itahashi
  • Publication number: 20120193608
    Abstract: A method of fabricating a frontside-illuminated inverted quantum well infrared photodetector may include providing a quantum well wafer having a bulk substrate layer and a quantum material layer, wherein the quantum material layer includes a plurality of alternating quantum well layers and barrier layers epitaxially grown on the bulk substrate layer. The method further includes applying at least one frontside common electrical contact to a frontside of the quantum well wafer, bonding a transparent substrate to the frontside of the quantum well wafer, thinning the bulk substrate layer of the quantum well wafer, and etching the quantum material layer to form quantum well facets that define at least one pyramidal quantum well stack. A backside electrical contact may be applied to the pyramidal quantum well stack. In one embodiment, a plurality of quantum well stacks is bonded to a read-out integrated circuit of a focal plane array.
    Type: Application
    Filed: February 2, 2011
    Publication date: August 2, 2012
    Applicant: L-3 Communications Cincinnati Electronics Corporation
    Inventors: David Forrai, Darrel Endres, Robert Jones, Michael James Garter
  • Publication number: 20120192935
    Abstract: A method to fabricate a photovoltaic device includes forming first and second contact regions at the first surface of a semiconductor donor body. A cleave plane may be formed by implanting ions into the donor body, and a lamina that includes the contact regions is cleaved from the donor body at the cleave plane. The first surface of the lamina may be contacted with a temporary support and fabricated into a photovoltaic device, wherein the lamina comprises the base of the photovoltaic device.
    Type: Application
    Filed: March 21, 2012
    Publication date: August 2, 2012
    Applicant: Twin Creeks Technologies, Inc.
    Inventors: Steven M. Zuniga, Christopher J. Petti, Gopal Prabhu
  • Publication number: 20120193742
    Abstract: A photoelectric conversion module includes: a substrate having a light transmitting property and having a mounting surface; a photoelectric conversion element mounted on the mounting surface of the substrate; a cover member fixed to the substrate via a solder layer constituted by solder and forming, cooperatively with the substrate, an airtight chamber housing the photoelectric conversion element; and a solder adsorbing film provided near an area fixed to the substrate by the solder layer, in a surface, of the cover member, facing the mounting surface, the solder having an adhesive property to the solder adsorbing film.
    Type: Application
    Filed: January 23, 2012
    Publication date: August 2, 2012
    Applicant: HITACHI CABLE, LTD.
    Inventors: Kouki HIRANO, Hiroki Yasuda, Yoshinori Sunaga, Shohei Hata
  • Patent number: 8232131
    Abstract: An image sensor module includes a semiconductor chip. Photodiode units are disposed in an active region of the semiconductor chip to convert light into electric signals. Pads are disposed in a peripheral region formed around the active region and the pads are electrically connected to the photodiode units. A connecting region is formed around the peripheral region. Re-distribution layers are electrically connected to respective pads and extend to the connecting region. A transparent substrate covers the photodiode units and the pads and exposes at least a portion of the re-distribution layers. Connecting layers are electrically connected to the respective re-distribution layers and extend to a top surface of the transparent substrate. Connecting members are connected to the respective connecting layers disposed on the top surface of the transparent substrate.
    Type: Grant
    Filed: March 8, 2011
    Date of Patent: July 31, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sung Min Kim
  • Publication number: 20120178207
    Abstract: Al pastes with additives of Co, Sr, V, compounds thereof and combinations thereof improve both the physical integrity of a back contact of a silicon solar cell as well as the electrical performance of a cell with such a contact.
    Type: Application
    Filed: January 3, 2012
    Publication date: July 12, 2012
    Applicant: FERRO CORPORATION
    Inventors: Hong Jiang, Chandrashekhar S. Khadilkar, Nazarali Merchant, Srinivasan Sridharan, Aziz S. Shaikh
  • Publication number: 20120168825
    Abstract: A charged coupled device (CCD) module fixed between a lens assembly and a main board having a first plate surface is disclosed. The CCD module comprises a hard PCB having a first surface and a second surface, a CCD component, and at least one fixed member. The first surface of the hard PCB faces the first plate surface of the main board. The CCD component facing the lens assembly is located on the second surface of the hard PCB. The fixed member is used for combining the hard PCB and the main board. The hard PCB and the fixed member can be used as a buffer to reduce possible damages to the CCD component and/or the main board.
    Type: Application
    Filed: June 1, 2011
    Publication date: July 5, 2012
    Applicant: ALTEK CORPORATION
    Inventor: Tzu-Chih Lin
  • Publication number: 20120168889
    Abstract: A manufacturing method of a solid-state imaging device includes: preparing a photoelectric conversion device; forming an insulating layer on a surface of the photoelectric conversion device; forming a wire-grid polarizer on a support base; bonding a forming surface of the wire-grid polarizer on the support base to the insulating layer on the surface of the photoelectric conversion device and removing the support base from the wire-grid polarizer.
    Type: Application
    Filed: December 16, 2011
    Publication date: July 5, 2012
    Applicant: Sony Corporation
    Inventor: Yutaka Ooka
  • Publication number: 20120171800
    Abstract: A method of sealing an electronic device is disclosed, comprising providing an assembly comprising first and second substrates in an opposed relationship, and an electronic device positioned between the first and second substrates; positioning a glass rod against or on the edge of the first and/or second substrate; and heating and softening the glass rod to form a hermetic seal between the first and second substrates and form a hermetically sealed electronic device.
    Type: Application
    Filed: December 30, 2010
    Publication date: July 5, 2012
    Applicant: DU PONT APOLLO Ltd.
    Inventors: Stephen Yau Sang Cheng, Chui-Ling Yip, Chung-Pui Chan
  • Publication number: 20120168890
    Abstract: An image sensor structure, which comprises: a pixel; a first metal line; a second metal line, located under the first metal line; a conductive region, located under the second metal line; and at least one dummy contact, provided between the second metal line and the conductive region, wherein the second metal line and the conductive region are not electrically connected to each other via the dummy contact
    Type: Application
    Filed: January 4, 2011
    Publication date: July 5, 2012
    Inventors: Yu Hin Desmond Cheung, Kihong Kim, Yang Wu
  • Publication number: 20120160299
    Abstract: A space based solar array has a substrate on which are placed a plurality of spaced apart solar cells. A transparent adhesive bonding layer is on the plurality of solar cells covering the solar cells and the substrate between said solar cells. In a preferred embodiment, the adhesive bonding layer is silicone. A transparent rigid buffer layer is on the transparent adhesive bonding layer. In a preferred embodiment, the transparent rigid buffer layer is made of polyimide and has properties suitable for the application of performance- or durability-enhancing thin-film coatings. A transparent thin-film stack including inorganic radiation protection layer is on the transparent rigid buffer layer. In a preferred embodiment, the transparent radiation protection layer is made of silica, alumina or thin glass. Performance enhancing layers can also be included into the thin film stack for anti-reflection and ESD control purposes.
    Type: Application
    Filed: December 28, 2010
    Publication date: June 28, 2012
    Inventors: Austin Daniel Reid, Theodore Garry Stern, Eric Peter McNaul
  • Publication number: 20120160295
    Abstract: A method for characterizing the electronic properties of a solar cell to be used in a photovoltaic module comprises the steps of performing a room temperature IV curve measurement of the solar cell and classifying the solar cell based on this IV curve measurement. In order to take stress-related effects into account, the solar cells are reclassified depending on the result of an additional measurement conducted on the solar cells under stress. This stress-related measurement may be gained from light induced thermography (LIT) yielding information on diode shunt areas within the solar cell.
    Type: Application
    Filed: June 24, 2011
    Publication date: June 28, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Lawrence A. Clevenger, Harold J. Hovel, Rainer Klaus Krause, Kevin S. Petrarca, Gerd Pfeiffer, Kevin Prettyman, Brian C. Sapp
  • Publication number: 20120161267
    Abstract: A solid-state image pickup device 1 according to the present invention includes a semiconductor substrate 2 on which a pixel 20 composed of a photodiode 3 and a transistor is formed. The transistor comprising the pixel 20 is formed on the surface of the semiconductor substrate, a pn junction portion formed between high concentration regions of the photodiode 3 is provided within the semiconductor substrate 2 and a part of the pn junction portion of the photodiode 3 is extended to a lower portion of the transistor formed on the surface of the semiconductor substrate 2. According to the present invention, there is provided a solid-state image pickup device in which a pixel size can be microminiaturized without lowering a saturated electric charge amount (Qs) and sensitivity.
    Type: Application
    Filed: December 21, 2011
    Publication date: June 28, 2012
    Applicant: Sony Corporation
    Inventors: Takayuki Ezaki, Teruo Hirayama
  • Publication number: 20120164778
    Abstract: A method of bonding by molecular bonding between at least one lower wafer and an upper wafer comprises positioning the upper wafer on the lower wafer. In accordance with the invention, a contact force is applied to the peripheral side of at least one of the two wafers in order to initiate a bonding wave between the two wafers.
    Type: Application
    Filed: June 11, 2010
    Publication date: June 28, 2012
    Applicant: SOITEC
    Inventors: Chrystelle Lagahe Blanchard, Marcel Broekaart, Arnaud Castex
  • Patent number: 8207013
    Abstract: A simplified method for fabricating a solar cell device is provided. The solar cell device has silicon nanowires (SiNW) grown on an upgraded metallurgical grade (UMG) silicon (Si) substrate. Processes of textured surface process and anti-reflection thin film process can be left out for further saving costs on equipment and manufacture investment. Thus, a low-cost Si-based solar cell device can be easily fabricated for wide application.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: June 26, 2012
    Assignee: Atomic Energy Council Institute of Nuclear Energy Research
    Inventor: Tsun-Neng Yang
  • Publication number: 20120153340
    Abstract: In order to simplify submount manufacture, and increase the manufacturing efficiency thereof, a first electrode layer (12) is formed as a layer on the surface of a submount substrate (11); a side surface (122) of the first electrode layer (12) is formed on substantially the same plane as a side surface (112) of the submount substrate (11); and the side surface (122) of the first electrode layer (12) is a connection surface for creating an electrical connection with the first electrode layer (12). By making the first electrode layer (12) sufficiently thick, the surface area of the side surface (122) can be made sufficiently large. This allows, for example, wire bonding using this side surface (122). Further, components such as an optical element (14) can be protected by a sealing material (16).
    Type: Application
    Filed: June 2, 2010
    Publication date: June 21, 2012
    Applicant: ADVANCED PHOTONICS, INC.
    Inventors: Xueliang Song, Foo Cheong Yit, Katsumasa Horiguchi, Shurong Wang
  • Publication number: 20120153122
    Abstract: An imaging array comprises a photodetector layer, a readout IC (ROIC) layer, and a charge storage capacitor layer which is distinct from the photodetector and ROIC layers; the layers are electrically interconnected to form the array. The capacitors within the charge storage capacitor layer are preferably micromachined; the charge storage capacitor layer can be an interposer layer or an outer layer.
    Type: Application
    Filed: December 15, 2010
    Publication date: June 21, 2012
    Inventors: Jeffrey F. DeNatale, David J. Gulbransen, William E. Tennant, Alexandros P. Papavasiliou
  • Publication number: 20120152348
    Abstract: In order to improve a photoelectric conversion efficiency, a solar cell element comprises a semiconductor substrate with a first surface serving as a light-receiving surface, a second surface that is a back surface of the first surface, and a plurality of through holes formed so as to extend from the first surface to the second surface. An area of an opening of each of the plurality of through holes increases as the through hole is located closer to a peripheral portion of the semiconductor substrate relative to a central portion thereof.
    Type: Application
    Filed: September 28, 2010
    Publication date: June 21, 2012
    Applicant: KYOCERA CORPORATION
    Inventor: Yoshio Miura
  • Publication number: 20120152332
    Abstract: A method for forming a solar battery assembly is provided, comprising: a) performing cold vacuuming at a temperature ranging from about 0° C. to about 50° C. and hot vacuuming at a temperature ranging from about 50° C. to about 200° C. to a glass plate, a plurality of solar cells and a back sheet that are laminated in turn and adhered together; and b) treating the laminated glass plate, plurality of solar cells and back sheet obtained in step (a) at a temperature ranging from about 100° C. to about 200° C. and a pressure ranging from about 0.5 MPa to about 1.5 MPa to obtain the solar battery assembly. A solar battery assembly is also provided.
    Type: Application
    Filed: February 28, 2012
    Publication date: June 21, 2012
    Inventor: Hui LUO
  • Publication number: 20120152344
    Abstract: Disclosed are aluminum paste compositions, processes to form solar cells using the aluminum paste compositions, and the solar cells so-produced. The aluminum paste compositions comprise 0.03% to 9%, by weight of crystalline calcium oxide; 27% to 89.9%, by weight of an aluminum powder; and 10% to 70%, by weight of an organic vehicle, wherein the amounts in % by weight are based on the total weight of the aluminum paste composition.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 21, 2012
    Applicant: E.I. DU PONT DE NEMOURS AND COMPANY
    Inventor: Raj G. Rajendran
  • Publication number: 20120154810
    Abstract: An agent sensing system may comprise an emitter optical resonator, a functionalized optical resonator, and a reference optical resonator. The emitter optical resonator may be configured to emit light at one or more system peak wavelengths. The functionalized optical resonator may be optically coupled to the emitter optical resonator and configured to propagate the emitted light in the absence of a particular agent, and filter the emitted light in the presence of the particular agent. The reference optical resonator may be optically coupled to at least one of the emitter optical resonator and the functionalized optical resonator such that an intensity of light propagated by the reference optical resonator is based at least on whether light emitted by the emitter optical resonator is filtered or propagated by the functionalized optical resonator.
    Type: Application
    Filed: July 15, 2009
    Publication date: June 21, 2012
    Inventors: Frank B. Jaworski, Anuradha M. Agarwal
  • Publication number: 20120156823
    Abstract: A method of forming a semiconductor device includes preparing a semiconductor substrate having a plurality of chips formed thereon and a scribe lane disposed between the chips, simultaneously forming a groove having a first depth in the scribe lane, and a through hole penetrating the chips and having a second depth. The chips are separated along the groove. The first depth is smaller than the second depth.
    Type: Application
    Filed: October 26, 2011
    Publication date: June 21, 2012
    Inventors: Jong-Yun MYUNG, Hyuek-Jae Lee, Ji-Sun Hong, Tae-Je Cho, Un-Byoung Kang, Hyung-Sun Jang, Eun-Mi Kim, Jung-Hwan Kim, Tae-Hong Min
  • Publication number: 20120153418
    Abstract: According to one embodiment, a solid-state imaging device includes photodiodes provided in a substrate, and includes semiconductor regions of a first conductivity type, respectively, and an element isolation region provided in the substrate, includes a semiconductor region of a second conductivity type, and configured to electrically isolate the photodiodes from each other. The element isolation region is tilted in a direction of the center of an image area in which the photodiodes are arrayed.
    Type: Application
    Filed: September 16, 2011
    Publication date: June 21, 2012
    Inventor: Kazuhiko NAKADATE
  • Publication number: 20120147717
    Abstract: A plurality of laser diode units is tested in a bar state, each of the laser diode units in which a laser diode that includes a first electrode and a second electrode formed on surfaces facing each other and that is mounted on a mounting surface of a submount such that the first electrode faces the mounting surface of the submount.
    Type: Application
    Filed: December 9, 2010
    Publication date: June 14, 2012
    Applicants: ROHM CO., LTD., TDK Corporation
    Inventors: Koji Shimazawa, Kosuke Tanaka, Ryuji Fujii, Takashi Honda, Yoshiteru Nagai, Tsuguki Noma, Hosei Mitsuzawa
  • Publication number: 20120146173
    Abstract: The present disclosure provides a method of manufacturing a solid-state imaging device, including, forming on a first substrate a semiconductor thin film which is to be photoelectric conversion sections, forming driving circuits on a face side of a second substrate, laminating the first substrate and the second substrate by disposing the first substrate and second substrate opposite to each other in a condition in which the semiconductor thin film is connected to the driving circuits, and removing the first substrate from the semiconductor thin film in a condition in which the semiconductor thin film is left on the second substrate side.
    Type: Application
    Filed: December 1, 2011
    Publication date: June 14, 2012
    Applicant: SONY CORPORATION
    Inventors: Kazuo Ohta, Ikuo Yoshihara
  • Patent number: 8198628
    Abstract: A semiconductor structure that is to be heated. The structure includes a substrate for the front face deposition of a useful layer intended to receive components for electronics, optics or optoelectronics. The structure contains doped elements that absorb infrared radiation so as to substantially increase infrared absorption by the structure so that the front face reaches a given temperature when a given infrared power is supplied to the structure. At least one part of the doped elements have insufficient electrical activity or localization in the structure, such that they cannot disturb the operation of the components. In addition, a method of producing this structure and a method of forming a useful layer of semiconductor material on the structure.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: June 12, 2012
    Assignee: Soitec
    Inventors: Robert Langer, Hacène Lahreche
  • Patent number: 8198713
    Abstract: One embodiment provides a semiconductor wafer structure including a semiconductor wafer and a spacer layer. The semiconductor wafer includes active areas. The spacer layer is configured to provide spacing between the semiconductor dice in a stacked die package and the spacer layer is disposed on one side of the semiconductor wafer.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: June 12, 2012
    Assignee: Infineon Technologies AG
    Inventor: Erich Hufgard
  • Patent number: 8198694
    Abstract: A back-illuminated type solid-state imaging device including (a) a semiconductor layer on a front surface side of a semiconductor substrate with an insulation film between them; (b) a photoelectric conversion element that constitutes a pixel in the semiconductor substrate; (c) at least part of transistors that constitute the pixel in the semiconductor film; and (d) a rear surface electrode to which a voltage is applied on the rear surface side of the semiconductor substrate, wherein, (1) a semiconductor layer of an opposite conduction type to a charge accumulation portion of the photoelectric conversion element is formed in the semiconductor substrate under the insulation film, and (2) the same voltage as the voltage applied to the rear surface electrode is applied to the semiconductor layer.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: June 12, 2012
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 8198695
    Abstract: A back-illuminated type solid-state imaging device is provided in which an electric field to collect a signal charge (an electron, a hole and the like, for example) is reliably generated to reduce a crosstalk. The back-illuminated type solid-state imaging device includes a structure 34 having a semiconductor film 33 on a semiconductor substrate 31 through an insulation film 32, in which a photoelectric conversion element PD that constitutes a pixel is formed in the semiconductor substrate 31, at least part of transistors 15, 16, and 19 that constitute the pixel is formed in the semiconductor film 33, and a rear surface electrode 51 to which a voltage is applied is formed on the rear surface side of the semiconductor substrate 31.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: June 12, 2012
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Publication number: 20120137601
    Abstract: A photovoltaic module assembly includes a photovoltaic module and a base layer. The photovoltaic module has a bottom side, a top side, a main body, and a peripheral edge strip. The peripheral edge strip includes a plurality of apertures formed therethrough. The base layer is disposed adjacent the bottom side of the photovoltaic module. The base layer has an underlying portion and a flap portion. The flap portion is folded over the peripheral edge strip of the photovoltaic module, and is disposed adjacent the top side of the photovoltaic module. The flap portion is attached to the underlying portion of the base layer through the plurality of apertures in the peripheral edge strip. The photovoltaic module is thereby secured to the base layer.
    Type: Application
    Filed: December 5, 2011
    Publication date: June 7, 2012
    Inventors: Jeffery Peelman, Nazoor Baig, Brian Tell
  • Publication number: 20120139072
    Abstract: A method for manufacturing a wafer level packaged focal plane array, in accordance with certain embodiments, includes forming a detector wafer, which may include forming detector arrays and read-out circuits. The method may also include forming a lid wafer. Forming the lid wafer may include polishing a surface of a magnetically confined Czochralski (MCZ) wafer, bonding a Czochralski wafer to the MCZ wafer, and forming pockets in the Czochralski wafer. Each pocked may expose a portion of the polished surface of the MCZ wafer. The method may further include bonding the lid wafer and the detector wafer together such that the each detector array and read-out circuit are sealed within a different pocket, thereby forming a plurality of wafer level packaged focal plane arrays. The method may additionally include separating at least one wafer level packaged focal plan array from the plurality of wafer level packaged focal plane arrays.
    Type: Application
    Filed: November 17, 2011
    Publication date: June 7, 2012
    Applicant: Raytheon Company
    Inventors: Stephen H. Black, Thomas A. Kocian
  • Publication number: 20120142139
    Abstract: According to an embodiment, a method of manufacturing a solar cell includes depositing a sequence of layers of semiconductor material forming at least one solar cell on a first substrate; temporarily bonding a flexible film to a support second substrate; permanently bonding the sequence of layers of semiconductor material to the flexible film so that the flexible film is interposed between the first and second substrates; thinning the first substrate while bonded to the support substrate to expose the sequence of layers of semiconductor material; and subsequently removing the support substrate from the flexible film.
    Type: Application
    Filed: February 13, 2012
    Publication date: June 7, 2012
    Applicant: Emcore Solar Power, Inc.
    Inventor: Tansen Varghese
  • Publication number: 20120139003
    Abstract: An optoelectronic component including a connection carrier including an electrically insulating film at a top side of the connection carrier, an optoelectronic semiconductor chip at the top side of the connection carrier, a cutout in the electrically insulating film which encloses the optoelectronic semiconductor chip, and a potting body surrounding the optoelectronic semiconductor chip, wherein a bottom area of the cutout is formed at least regionally by the electrically insulating film, the potting body extends at least regionally as far as an outer edge of the cutout facing the optoelectronic semiconductor chip, and the cutout is at least regionally free of the potting body.
    Type: Application
    Filed: May 28, 2010
    Publication date: June 7, 2012
    Applicants: HERAEUS MATERIALS TECHNOLOGY GMBH & CO. KG, OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Michael Zitzlsperger, Eckhard Ditzel, Jörg Erich Sorg