Plural Patents (Class 361/784)
  • Publication number: 20130148314
    Abstract: A drive circuit is laminated via a high exothermic element disposed on a power circuit, and it is configured so that the average thermal expansion coefficient of the side of the power circuit of the drive circuit board may be larger than the average thermal expansion coefficient of the side opposite to the power circuit. Thereby, the drive circuit board will be curved in the same direction as the power circuit board when the power circuit board is curved due to heat generation from the high exothermic element accompanying the operation of the module. Thereby, in a high-capacity module, while attaining reduction in size and weight, reduction in serge, and reduction in a loss, poor junction between the high exothermic element of the power circuit and the drive circuit board can be suppressed and heat generating from the high exothermic element can be more effectively released.
    Type: Application
    Filed: February 19, 2013
    Publication date: June 13, 2013
    Applicant: NGK Insulators,Ltd.
    Inventor: NGK Insulators, Ltd.
  • Publication number: 20130140369
    Abstract: A wireless IC device that improves radiation gain without increasing substrate size and easily adjusts impedance, includes a multilayer substrate including laminated base layers. On a side of an upper or first main surface of the multilayer substrate, a wireless IC element is arranged to process a high-frequency signal. On a side of a lower or second main surface of the multilayer substrate, a first radiator is provided and is coupled to the wireless IC element via a feeding circuit including first interlayer conductors. On the side of the first main surface, a second radiator is provided and is coupled to the first radiator via second interlayer conductors.
    Type: Application
    Filed: January 10, 2013
    Publication date: June 6, 2013
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: Murata Manufacturing Co., Ltd.
  • Patent number: 8456000
    Abstract: A three-dimensional semiconductor module and an electronic system including the same are provided. The semiconductor module includes a module substrate, a logic device formed on a part of the module substrate, and a plurality of memory devices formed on another part of the module substrate, wherein the plurality of memory devices are disposed perpendicular to the logic device, and the module substrate on which the plurality of memory devices are formed is supported by a supporter. The electronic system includes the semiconductor module.
    Type: Grant
    Filed: September 4, 2009
    Date of Patent: June 4, 2013
    Assignee: Stanzione & Kim, LLP
    Inventor: Joong-Hyun Baek
  • Patent number: 8456857
    Abstract: A backplane arrangement is provided for an electronic mounting rack with a base backplane with several contact strips, wherein a free space, into which at least one additional backplane can be inserted, is provided on the base backplane.
    Type: Grant
    Filed: March 21, 2007
    Date of Patent: June 4, 2013
    Assignee: ADVA Optical Networking SE
    Inventors: Uwe Gröschner, Falk Steiner, Stefan Asch
  • Patent number: 8456863
    Abstract: A hybrid service device, which can be embedded in a wall, includes a control module disposed on a first circuit board, a transmission functional module disposed on a second circuit board, and a service module disposed on a third circuit board. The control module includes a first circuit board connector and a socket, wherein the second circuit board is pluggable disposed on the socket, such that the first circuit board and the second circuit board are substantially parallel and the control module is electrically connected with the transmission functional module. The service module includes a second circuit board connector, wherein the third circuit board is pluggable connected with the first circuit board connector.
    Type: Grant
    Filed: November 15, 2010
    Date of Patent: June 4, 2013
    Assignee: Equaline Corp.
    Inventor: Hsi-Mien Wu
  • Patent number: 8451620
    Abstract: Embodiments include but are not limited to apparatuses and systems including semiconductor packages, e.g. memory packages, having a substrate or a first package, and a second package coupled to the substrate or the first package, wherein the second package includes at least one die and an underfill material disposed in a portion, but not an entirety, of an area between the package and the substrate or the first package. Other embodiments may be described and claimed.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: May 28, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Myung Jin Yim, Nanette Quevedo, Richard Strode
  • Patent number: 8452989
    Abstract: A technique provides security to an electronic device. The technique involves disposing a microprocessor between a printed circuit board and a circuit element to restrict physical access to the microprocessor, the microprocessor having (i) a bottom which faces the printed circuit board in a first direction and (ii) a top which faces the circuit element in a second direction which is opposite the first direction. The technique further involves delivering power to the microprocessor from a power source while the microprocessor is disposed between the printed circuit board and the circuit element, the microprocessor performing electronic operations in response to the power delivered from the power source. The technique further involves electronically altering or preventing the microprocessor from further performing the electronic operations in response to tampering activity on the circuit element. Such detection of the tampering activity may involve monitoring a covert signal for tamper evidence detection.
    Type: Grant
    Filed: December 9, 2009
    Date of Patent: May 28, 2013
    Assignee: EMC Corporation
    Inventors: Todd Morneau, William Duane
  • Publication number: 20130128486
    Abstract: A method of forming a bump structure includes providing a first work piece including a dielectric layer having a top surface; placing a second work piece facing the first work piece; placing a heating tool contacting the second work piece; and heating the second work piece using the heating tool to perform a reflow process. A first solder bump between the first and the second work pieces is melted to form a second solder bump. Before the second solder bump solidifies, pulling the second work piece away from the first work piece, until an angle formed between a tangent line of the second solder bump and the top surface of the dielectric layer is greater than about 50 degrees, wherein the tangent line is drawn at a point where the second solder bump joins the dielectric layer.
    Type: Application
    Filed: December 28, 2012
    Publication date: May 23, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Taiwan Semiconductor Manufacturing Company, Ltd.
  • Patent number: 8446738
    Abstract: A system, method, and motherboard assembly are described for interconnecting and distributing signals and power between co-planar boards that function as a single motherboard. The motherboard assembly includes a multilayered first printed circuit board having opposed parallel first and second surfaces, each having at least one land grid array (LGA) disposed thereon. The assembly further includes at least one wiring layer (Y) designed to only electrically interconnect components on or within the first PCB, and at least one wiring layer (X) designed to only electrically connect the components on the first PCB to a multilayered second PCB. The multilayered second PCB has opposed parallel first and second surfaces, the first surface having at least one LGA disposed thereon.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: May 21, 2013
    Assignee: International Business Machines Corporation
    Inventors: John L. Colbert, Arvind K. Sinha, Roger D. Weekly
  • Publication number: 20130119908
    Abstract: One embodiment of the present invention provides an electronic control unit for electric power steering, including: a first board which is mounted with first surface-mount components; and only one second board which is mounted with second surface-mount components having larger allowable current capacities than the first surface-mount components, which have approximately the same components mounting area as the first board, and which is layered with the first board.
    Type: Application
    Filed: November 9, 2012
    Publication date: May 16, 2013
    Applicant: HONDA ELESYS CO., LTD.
    Inventor: Honda Elesys Co., Ltd.
  • Patent number: 8437143
    Abstract: A method for controlling an electronic device is provided. The electronic device includes a housing, a keypad, a first conductive surface, and a second conductive surface. The keypad is rotatable and includes buttons. The first conductive surface is attached to the bottom of the keypad, rotatable with the keypad, and includes first contact portions. The second conductive surface is fixed in the housing, arranged below the first conductive surface, spaced apart from the first conductive surface, and includes second contact portions. The method includes determining which of the buttons is pressed. Determining whether an activation signal is received, wherein when the first contact portion contacts one of the second contact portions which shape is the same as the first contact portion, the activation signal is generated. Determining the pressed button is activated if the activation signal is received, and executing a function corresponding to the activated button.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: May 7, 2013
    Assignees: Fu Tai Hua Industry (Shenzhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventor: Zhong Xu
  • Publication number: 20130107487
    Abstract: In one embodiment, a transducer apparatus comprises an elastomeric substrate and another elastomeric substrate. A plurality of transducer modules are mounted on the elastomeric substrate. A plurality of additional transducer modules are mounted on the other elastomeric substrate. Each transducer module of the plurality of transducer modules and the plurality of additional transducer modules comprises a transducer array having multiple transducer elements and an electronic circuitry coupled to the transducer array. The plurality of transducer modules and the plurality of additional transducer modules are mounted relative to each other whereby the plurality of additional transducer modules substantially cover any dead zones of the plurality of transducer modules.
    Type: Application
    Filed: October 27, 2011
    Publication date: May 2, 2013
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Robert Gideon Wodnicki, Kaustubh Ravindra Nagarkar, William Hullinger Huber
  • Patent number: 8432705
    Abstract: An expansion apparatus includes a serial advanced technology attachment dual-in-line memory module (SATA DIMM) with a first circuit board, an expansion card with a second circuit board, and a cable member. A first edge connector is set on a bottom edge of the first circuit board and includes a number of first power pins connected to a control chip, a number of first storage chips, and a first connector, and a number of first ground pins. A second edge connector is set on a bottom edge of the second circuit board and includes a number of second power pins connected to a number of second storage chips and a second connector, and a number of second ground pins. The cable member includes a cable, a third connector connected to the first connector, and a fourth connector connected to the second connector.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: April 30, 2013
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Ting Ge, Wen-Sen Hu
  • Patent number: 8432661
    Abstract: A microstructural body includes a substrate such as an electrode substrate, a support portion, one post that fixes the support portion to the substrate, a frame-shaped movable portion provided around outer periphery of the support portion, and an elastic support portion that elastically connects the movable portion and the support portion. The elastic support portion supports the frame-shaped movable portion such that the movable portion is movable relative to the support portion. The elastic support portion includes torsion springs and an elastically deformable connecting portion.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: April 30, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takahisa Kato, Shinichiro Watanabe
  • Patent number: 8432707
    Abstract: An AMB component and a connection interface for a memory installation with fully buffered Dimm memory modules connected in series. The AMB component is disposed on a connecting line from memory modules to a memory controller of the memory installation to re-amplify the connecting line between two consecutive FBD memory modules. The connection interface includes an AMB amplifier component for the connection of a main memory card that includes at least one processor, to an auxiliary memory card of the type having a series of memory modules. Two series of FBD memory modules are connected to respective FBD channels in the auxiliary memory card using FBD connectors in a daisy-chain arrangement.
    Type: Grant
    Filed: June 22, 2011
    Date of Patent: April 30, 2013
    Assignee: Bull S.A.S.
    Inventor: Jean-Jacques Pairault
  • Patent number: 8431829
    Abstract: A printed wiring board including a rigid multilayer board, a first substrate having multiple conductors, and a second substrate having multiple conductors electrically connected to the conductors of the first substrate. The conductors of the second substrate have an existing density which is set higher than an existing density of the conductors of the first substrate, and the first substrate and/or the second substrate is embedded in the rigid multilayer board.
    Type: Grant
    Filed: May 18, 2009
    Date of Patent: April 30, 2013
    Assignee: Ibiden Co., Ltd.
    Inventor: Michimasa Takahashi
  • Patent number: 8427840
    Abstract: A multi-chip module is disclosed to include a pin frame, an electric power switch chip, and a battery protection chip. The pin frame has a chip placement region and six pins. The second pin and the fifth pin are electrically connected at the chip placement region, and the other pins are set electrically isolated from each other. A bottom surface of the electric power switch chip is electrically connected at the chip placement region, and a top surface thereof is electrically connected to the first pin and the third pin. A bottom surface of the battery protection chip is disposed at the top surface of the electric power switch chip in an electrically isolated fashion. A top surface of the battery protection chip is electrically connected to the top surface of the electric power switch chip, the first pin, the fourth pin, and the sixth pin.
    Type: Grant
    Filed: November 22, 2010
    Date of Patent: April 23, 2013
    Assignee: Fortune Semiconductor Corporation
    Inventors: Kuo-Chiang Chen, Arthur Shaoyan Rong, Chen Hsing Liu, Yen-Yi Chen
  • Patent number: 8427841
    Abstract: Provided is an electronic device which may include a first structure having a first surface, a first land region on the first surface, a second structure having a second surface facing the first surface, a second land region on the second surface, and a connection structure between the first and second structures electrically connecting the first land region to the second land region. As provided, the first land region may have a major axis and a minor axis on the first surface and the second land region may have a major axis and a minor axis on the second surface. Furthermore, the major axes of the first and second land regions may have different orientations with respect to one another.
    Type: Grant
    Filed: April 6, 2010
    Date of Patent: April 23, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Kil Shin, Shle-Ge Lee
  • Publication number: 20130094165
    Abstract: [Summary] [Subject] Problems, such as increase in the electrical resistance in the junction(s) of the terminal(s) of a power semiconductor element and the electrode(s) of a peripheral circuit which are disposed on a power circuit and decrease in the dielectric strength voltage between adjacent junctions, resulting from the insufficient alignment of the terminal(s) of the power semiconductor element and the electrode(s) of the peripheral circuit, in the high-capacity module which is intended to attain reduction in size and weight, reduction in serge, and reduction in a loss by lamination of the peripheral circuit, such as a drive circuit, onto the power circuit, should be reduced.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 18, 2013
    Applicant: NGK Insulators, Ltd.
    Inventor: NGK Insulators, Ltd.
  • Publication number: 20130094164
    Abstract: A cable holder includes: a pair of arm portions to form a holding space for holding a cable; and a guide portion, provided at an end portion of each of the pair of guide portions to block the holding space, to guide the cable into the holding space while elastically deforming the pair of arm portions in directions in which the pair of arm portions move away from each other when contacting with the cable.
    Type: Application
    Filed: August 14, 2012
    Publication date: April 18, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Kenji TSUTSUMI
  • Publication number: 20130094166
    Abstract: A plurality of display panels (10A and 10B) are provided on a single substrate (2). Data signal lines (11A), scanning signal lines (12A), a data signal line drive circuit (20A) for driving the data signal lines (11A), and a scanning signal line drive circuit (30A) for driving the scanning signal lines (12A) are provided for the display panel (10A). Data signal lines (11B), scanning signal lines (12B), a data signal line drive circuit (20B) for driving the data signal lines (11B), and a scanning signal line drive circuit (30B) for driving the scanning signal lines (12B) are provided for the display panel (10B). Input signal lines (17A and 17B) are provided so as not intersect each other in a plan view. This allows a reduction in power consumption and an increase in flexibility in design in a display panel which includes a plurality of display panels on a single substrate.
    Type: Application
    Filed: May 11, 2011
    Publication date: April 18, 2013
    Inventors: Makoto Yokoyama, Eiji Matsuda, Takahiro Yamaguchi, Shuji Nishi, Takuya Hachida, Seijirou Gyouten
  • Patent number: 8422245
    Abstract: A motherboard includes a main circuit board, a CPU socket, and an interface. The main circuit board includes a holding surface and a side wall connected to the holding surface. The CPU socket is positioned on the holding surface. The interface is positioned on the side wall. The interface is electrically connected to the CPU socket. The interface provides a connection between the main circuit board and a sub-circuit board.
    Type: Grant
    Filed: October 31, 2010
    Date of Patent: April 16, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Zeu-Chia Tan
  • Publication number: 20130083495
    Abstract: There is provided a tuner module used for a television (TV) or a set top box, and more particularly, to a tuner module having a significantly reduce size. The tuner module includes: a tuner including a circuit board having at least one electronic component mounted thereon, and a cover coupled to the circuit board and having an opened bottom portion so as to allow the circuit board to be received therein; and a main board having the tuner mounted on one surface thereof, wherein the main board includes a ground pad formed thereon to correspond to a position in which the tuner is mounted.
    Type: Application
    Filed: April 27, 2012
    Publication date: April 4, 2013
    Inventors: Dong Teck MOON, Chang Ik Kim, Ju Ho Lee, Chang Min Seo, Eun Young Shin, Si Young Kwon
  • Patent number: 8411450
    Abstract: The present invention is directed to provide a semiconductor package and the like realizing reduced manufacturing cost and improved reliability by enhancing a ground line and/or a power supply line. A semiconductor package 50 includes: a semiconductor device 1 including a circuit face on which an external electrode is formed; an insertion substrate 2 forming a housing part in which the semiconductor device 1 is disposed; and an interposer substrate 5 including a wiring pattern 7 and whose both ends are bent along the insertion substrate 2. The insertion substrate 2 is made of a conductive material and is electrically connected to a ground line or a power supply line in the wiring pattern 7 in the interposer substrate 5.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: April 2, 2013
    Assignee: NEC Corporation
    Inventors: Takao Yamazaki, Yoshimichi Sogawa, Tomohiro Nishiyama
  • Patent number: 8411457
    Abstract: A semiconductor package substrate suitable for supporting a damage-sensitive device, including a substrate core having a first and opposite surface; at least one pair of metal layers covering the first and opposite surfaces of the package substrate core, which define first and opposite metal layer groups, at least one of said layer groups including at least one metal support zone; one pair of solder mask layers covering the outermost metal layers of the at least one pair of metal layers; and a plurality of routing lines; wherein the at least one metal support zone is formed so that it lies beneath at least one side of the base of the damage-sensitive device and so as to occupy a substantial portion of the area beneath the damage-sensitive device which is free of said routing lines; a method for the production of such substrate is also described.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: April 2, 2013
    Assignee: STMIcroelectronics S.r.l.
    Inventors: Federico Ziglioli, Giovanni Graziosi, Mario Cortese
  • Publication number: 20130077276
    Abstract: An isolated switching power converter includes a power isolation transformer having at least one primary winding, at least one secondary winding and a plurality of sides, a first power board mechanically coupled to a first side of the transformer, and a second power board mechanically coupled to a second side of the transformer. The first power board includes a primary side circuit electrically coupled to the at least one primary winding, and the second power board includes a secondary side circuit electrically coupled to the at least one secondary winding.
    Type: Application
    Filed: September 23, 2011
    Publication date: March 28, 2013
    Applicant: Astec International Limited
    Inventors: Robert H. Kippley, Bradley J. Schumacher, Gary P. Magnuson, Kwong Kei Chin
  • Publication number: 20130077265
    Abstract: A printed circuit board assembly capable of having an electronic component mounted at a wafer level by using a wafer itself as a printed circuit board, the printed circuit board assembly including a plurality of electronic components, a printed circuit board having the plurality of electronic components mounted thereon, a protection body configured to entirely cover the printed circuit board, and a connection unit having one end that is exposed to an outside of the protection body for the printed circuit board to be electrically connected to a sub board, wherein the printed circuit board comprises a wafer printed circuit board formed with a wafer.
    Type: Application
    Filed: September 11, 2012
    Publication date: March 28, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yong Won Lee, Tae Sang Park, Hvo Young Shin, Ji Young Jang, Young Jun Moon, Soon Min Hong
  • Patent number: 8402647
    Abstract: Methods of manufacturing light panels having at least one re-entrant turning feature. In one embodiment, a method of manufacturing a light panel includes providing a base layer, providing a cover layer, and coupling the cover layer to the base layer to form at least one re-entrant turning feature between the base layer and the cover layer. In another embodiment, a method of manufacturing a light panel includes providing a base layer, forming at least one receiving space in the base layer, providing at least one prismatic block, and coupling at least a portion of the prismatic block into the receiving space such that re-entrant turning features are formed between the prismatic block and the base layer.
    Type: Grant
    Filed: August 25, 2010
    Date of Patent: March 26, 2013
    Assignee: Qualcomm Mems Technologies Inc.
    Inventors: Clarence Chui, Gaurav Sethi, Jonathan Charles Griffiths, Manish Kothari
  • Patent number: 8406007
    Abstract: A magnetic component includes a bobbin structure adapted for attachment to a circuit board. The magnetic component may include a magnetically permeable core and a conductive winding. The bobbin structure may include a gap for inserting the edge of a circuit board. Potential applications of the magnetic component include mechanically and electrically interconnecting two or more circuit boards in a substantially side-by-side configuration while providing increased heat dissipation from the magnetic component, improving power density of the electronic device, reducing electronic device profile, allowing magnetic isolation between high-voltage and low-voltage circuits and allowing single-sided and double-sided circuit boards to be used in a single circuit. Also, a circuit board assembly may have two or more circuit boards electrically and mechanically connected by at least one magnetic component.
    Type: Grant
    Filed: December 9, 2009
    Date of Patent: March 26, 2013
    Assignee: Universal Lighting Technologies, Inc.
    Inventors: Donald Folker, Mike LeBlanc, Mark Bauer
  • Patent number: 8400780
    Abstract: Stacked microfeature devices and associated methods of manufacture are disclosed. A package in accordance with one embodiment includes first and second microfeature devices having corresponding first and second bond pad surfaces that face toward each other. First bond pads can be positioned at least proximate to the first bond pad surface and second bond pads can be positioned at least proximate to the second bond pad surface. A package connection site can provide electrical communication between the first microfeature device and components external to the package. A wirebond can be coupled between at least one of the first bond pads and the package connection site, and an electrically conductive link can be coupled between the first microfeature device and at least one of the second bond pads of the second microfeature device. Accordingly, the first microfeature device can form a portion of an electrical link to the second microfeature device.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: March 19, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Mung Suan Heng, Kok Chua Tan, Vince Chan Seng Leong, Mark S. Johnson
  • Patent number: 8399777
    Abstract: Disclosed herein are an electromagnetic bandgap structure and a printed circuit board having the same. The bandgap structure includes a conductive layer including a plurality of conductive plates, a first metal layer disposed under the conductive layer and including a first stitching pattern electrically connected to a first conductive plate of the plurality of conductive plates, and a second metal layer disposed under the first metal layer and including a second stitching pattern electrically connected to both the first stitching pattern and a second conductive plate of the plurality of conductive plates. The bandgap to structure includes stitching patterns formed in two layers different from the conductive layer, thus offering a stop-band having a desired bandwidth in a compact structure.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: March 19, 2013
    Assignees: Samsung Electro-Mechanics Co., Ltd., Postech Academy-Industry Foundation
    Inventors: Won Woo Cho, Young Soo Kim, Yoon Jung Kim, Dek Gin Yang, Myung Gun Chong, Hyung Ho Kim
  • Publication number: 20130033841
    Abstract: The present disclosure relates to sensors including pressure sensors, humidity sensors, flow sensors, etc. In some cases, a cover for use with a sensor assembly may include an electrically insulating body having perimeter features extending a majority of the way around perimeters of upper and lower printed circuit boards that the cover may vertically separate. In one example, the body of the cover may include support features that extend from a lower side of the cover and those support features may contact the lower printed circuit board in at least two locations. The support features of the cover may be separated by a gap and a sensor connected to the lower printed circuit board may be situated within the gap.
    Type: Application
    Filed: August 1, 2011
    Publication date: February 7, 2013
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventors: Todd Eckhardt, Jim Machir, Palani Thanigachalam, Sunil Job
  • Patent number: 8369100
    Abstract: A power converter is disclosed in which the structure of a connecting portion is highly resistant against vibration and has a low inductance. The power converter includes a plurality of capacitors and a laminate made up of a first wide conductor and a second wide conductor joined in a layered form with an insulation sheet interposed between the first and second wide conductors. The laminate comprises a first flat portion including the plurality of capacitors, which are supported thereon and electrically connected thereto, a second flat portion continuously extending from the first flat portion while being bent, and connecting portions formed at ends of the first flat portion and the second flat portion and electrically connected to the exterior.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: February 5, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Katsunori Azuma, Masamitsu Inaba, Mutsuhiro Mori, Kenichiro Nakajima
  • Patent number: 8362366
    Abstract: A circuit board includes a foil circuit provided on a synthetic resin plate formed by injection molding, made of a copper foil, and having a pattern different for the circuit board. Anchor pins projecting upward are provided on the resin plate and passed through pinholes made in the foil circuit. The foil circuit is positioned and secured to the resin plate. In a required portion of the resin plate, a terminal insertion hole is provided, and a receiving terminal is secured to the required portion of the terminal insertion hole and connected to the foil circuit.
    Type: Grant
    Filed: January 13, 2011
    Date of Patent: January 29, 2013
    Assignee: Mitsubishi Cable Industries, Ltd.
    Inventors: Tsugio Ambo, Satoru Fujiwara, Yoshikatsu Hasegawa, Chihiro Nakagawa, Takeshi Ono, Atsushi Urushidani, Tooru Kashioka, Katsuji Shimazawa
  • Patent number: 8358510
    Abstract: A power distribution apparatus includes an outlet board, a fuse board, and at least one connector. The outlet board is connected to the fuse board through the at least one connector.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: January 22, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Yang-Yuan Chen, Heng-Chen Kuo
  • Publication number: 20120327350
    Abstract: A display device includes a first substrate, at least a first protrusion, a first electrode, a second substrate, at least a second protrusion, a second electrode and a display medium. The first protrusion is disposed on the first substrate. The first electrode is disposed on the first protrusion. The second substrate is disposed opposite to the first substrate. The second protrusion is disposed on the second substrate. The second electrode is disposed on the second protrusion, wherein the first electrode and the second electrode are displaced in a horizontal direction so as to form a lateral electric field therebetween. The display medium is sandwiched between the first and the second substrates.
    Type: Application
    Filed: January 12, 2012
    Publication date: December 27, 2012
    Applicants: UNIVERSITY OF CENTRAL FLORIDA, INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Pei Chang, Ming-Huan Yang, Chen-Chu Tsai, Yan Li, Meizi Jiao, Shin-Tson Wu
  • Patent number: 8339804
    Abstract: A programmable routing module is disclosed for interconnecting field wiring with a control system. The routing module includes a field connection to connect field signals from a controlled process to the routing module, an I/O connection to connect I/O signals from the control system to the routing module, and a configurable interconnection system that selectively couples particular field and I/O signals with one another.
    Type: Grant
    Filed: July 27, 2010
    Date of Patent: December 25, 2012
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: John D. Crabtree, Jerry Li Penick, Gregg M. Sichner, David S. Wehrle
  • Patent number: 8330048
    Abstract: Disclosed herein are an electromagnetic bandgap structure and a printed circuit board having the same. The bandgap structure includes a conductive layer including a plurality of conductive plates; and a metal layer disposed over or under the conductive layer and including a stitching pattern to electrically connect a first conductive plate to a second conductive plate of the plurality of conductive plates. The bandgap structure includes a spiral stitching pattern formed in a metal layer different from the conductive layer, thus offering a stop-band having a desired bandwidth in a compact structure.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: December 11, 2012
    Assignees: Samsung Electro-Mechanics Co., Ltd., Postech Academy-Industry Foundation
    Inventors: Won Woo Cho, Young Soo Kim, Yoon Jung Kim, Dek Gin Yang, Myung Gun Chong, Hyung Ho Kim
  • Publication number: 20120307444
    Abstract: An enhanced 3D integration structure comprises a logic microprocessor chip bonded to a collection of vertically stacked memory slices and an optional set of outer vertical slices comprising optoelectronic devices. Such a device enables both high memory content in close proximity to the logic circuits and a high bandwidth for logic to memory communication. Additionally, the provision of optoelectronic devices in the outer slices of the vertical slice stack enables high bandwidth direct communication between logic processor chips on adjacent enhanced 3D modules mounted next to each other or on adjacent packaging substrates. A method to fabricate such structures comprises using a template assembly which enables wafer format processing of vertical slice stacks.
    Type: Application
    Filed: August 15, 2012
    Publication date: December 6, 2012
    Applicant: International Business Machines Corporation
    Inventors: Evan G. Colgan, Sampath Purushothaman, Roy R. Yu
  • Publication number: 20120293974
    Abstract: An electronic device module includes a first substrate having a first wiring layer and a first alignment mark, the first alignment mark being transparent in a visible region of the electromagnetic spectrum, and a second substrate facing a part of the first substrate and having a second wiring layer and a second alignment mark facing the first alignment mark.
    Type: Application
    Filed: April 30, 2012
    Publication date: November 22, 2012
    Applicant: Sony Corporation
    Inventors: Takuya Asano, Masaki Kondoh
  • Patent number: 8314338
    Abstract: A wired circuit board includes a first wired circuit board and a second wired circuit board disposed to be opposed to the first wired circuit board in the same plane. A first opposed surface of the first wired circuit board facing the second wired circuit board and a second opposed surface of the second wired circuit board facing the first wired circuit board include at least two types of interfitting surfaces extending in different directions so as to mutually interfit the first opposed surface with the second opposed surface.
    Type: Grant
    Filed: July 21, 2008
    Date of Patent: November 20, 2012
    Assignee: Nitto Denko Corporation
    Inventors: Jun Ishii, Yasunari Ooyabu, Takeshi Tanaka, Toshiki Naito
  • Patent number: 8315068
    Abstract: Integrated circuit die stacks having a first die mounted upon a substrate, the first die manufactured to be initially identical to a second die with a plurality of through silicon vias (‘TSVs’), the first die personalized by blowing fuses on the first die, converting the TSVs previously connected through the blown fuses into pass-through vias (‘PTVs’), each PTV implementing a conductive pathway through the first die with no connection to any circuitry on the first die; and the second die, manufactured to be initially identical to the first die and later personalized by blowing fuses on the second die, the second die mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: November 20, 2012
    Assignee: International Business Machines Corporation
    Inventors: Jimmy G. Foster, Sr., Kyu-Hyoun Kim
  • Publication number: 20120286884
    Abstract: A microscale apparatus includes a microscale rigidized Parylene strap having a reinforcement structure extending from a first side of the strap, a first silicon substrate suspended by the microscale rigidized Parylene strap, the microscale rigidized Parylene strap conformally coupled to the first substrate, and a second substrate conformally coupled to the microscale rigidized Parylene strap to suspend the first silicon substrate through the microscale rigidized Parylene strap.
    Type: Application
    Filed: May 11, 2011
    Publication date: November 15, 2012
    Inventors: Jeffrey F. DeNatale, Philip A. Stupar, Yu-Hua Lin, Robert L. Borwick, Alexandros P. Papavasiliou
  • Publication number: 20120287590
    Abstract: A mounting apparatus for fixing an expansion card includes a motherboard, an expansion slot installed on the motherboard, an expansion card inserted into the expansion slot, and two latching members respectively fixed to two ends of the expansion card. Each latching member includes a base plate fixed to the end of the expansion card, and a resilient hook extending from the base plate to latch an end of the expansion slot.
    Type: Application
    Filed: September 2, 2011
    Publication date: November 15, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD
    Inventors: GUANG-YI ZHANG, XIAO-ZHENG LI
  • Patent number: 8310836
    Abstract: A method and mass storage device that combine multiple solid state drives (SSDs) to a single volume. The device includes a carrier board and at least two solid state drives having power and data connections to the carrier board. The carrier board includes a circuit board functionally connected to a control logic and at least two secondary connectors that are disposed at different edges of the circuit board and functionally connected to the control logic. The solid state drives are connected to the carrier board through the secondary connectors, and each solid state drive has a power and data connector directly connected to one of the secondary connectors of the carrier board. The solid state drives are oriented substantially parallel to the carrier board and to each other.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: November 13, 2012
    Assignee: OCZ Technology Group, Inc.
    Inventor: Franz Michael Schuette
  • Patent number: 8310841
    Abstract: Integrated circuit die stacks having a first die mounted upon a substrate, the first die manufactured to be initially identical to a second die with a plurality of through silicon vias (‘TSVs’), the first die personalized by opening switches on the first die, converting the TSVs previously connected through the open switches into pass-through vias (‘PTVs’), each PTV implementing a conductive pathway through the first die with no connection to any circuitry on the first die; and the second die, manufactured to be initially identical to the first die and later personalized by opening switches on the second die, the second die mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: November 13, 2012
    Assignee: International Business Machines Corporation
    Inventors: Jimmy G. Foster, Sr., Kyu-Hyoun Kim
  • Patent number: 8305768
    Abstract: In a lead mounting method of mounting, onto a principal surface of a printed board, a lead to be connected to a terminal, a flat lead is prepared which lead has a mounted part to be disposed on the principal surface of the printed board and a connected part to be connected to the terminal. The flat lead is bent into an L shape so that the mounted part and the connected part are perpendicular to each other to obtain an L-shaped lead. The mounted part of the L-shaped lead is connected and fixed onto the principal surface of the printed board by soldering.
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: November 6, 2012
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Itaru Takeda, Tomoyuki Kato, Yasuo Shoji
  • Publication number: 20120262896
    Abstract: A mounting apparatus for mounting an expansion card includes a bracket, and a mounting member mounted to the bracket. The mounting member includes a base mounted to the bracket, and a clamping member extending from a first side of a top of the base to clamp a rear end of the expansion card.
    Type: Application
    Filed: April 28, 2011
    Publication date: October 18, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD.
    Inventor: LEI LIU
  • Patent number: 8289724
    Abstract: The present invention provides devices for controlling a desired output of an output device. These devices include a first conductor, a second conductor having a varying, predetermined spacing from the first conductor, and a third conductor positioned on the actuator mechanism and having a plurality of interconnecting positions between the first conductor and the second conductor. A predetermined one of a plurality of output signals may be produced when the third conductor connects the first conductor and the second conductor to control the desired output of the output device.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: October 16, 2012
    Assignee: QUALCOMM Incorporated
    Inventors: Michael G. Matthews, Kevin Cousineau, Scott C. Asbill
  • Publication number: 20120257362
    Abstract: Disclosed herein is a display device including a main board part configured to have a display area including drive wiring and have a display panel disposed in the display area; and an auxiliary board part configured to be monolithic with the main board part and have extraction wiring from the drive wiring.
    Type: Application
    Filed: March 16, 2012
    Publication date: October 11, 2012
    Applicant: SONY CORPORATION
    Inventors: Masato Suzuki, Shota Nishi