Forming From Vapor Or Gaseous State (e.g., Vpe, Sublimation) Patents (Class 117/84)
  • Publication number: 20130068156
    Abstract: A method for growing II-VI semiconductor crystals and II-VI semiconductor layers as well as crystals and layers of their ternary or quaternary compounds from the liquid or gas phase is proposed. To this end, the solid starting materials are introduced into a growing chamber for the growing of crystals. Inside the growing chamber, carbon monoxide is supplied by way of reducing agent. At least certain zones of the growing chamber are heated to a temperature at which a first-order phase transition of the starting materials takes place and the starting materials pass into the liquid or gas phase. The starting materials are then cooled down accompanied by the formation of a semiconductor crystal or semiconductor layer, again with a first-order phase transition taking place. The oxygen present in the growing chamber is bound by the carbon monoxide and the formation of an oxide layer at the phase boundary of the growing semiconductor crystal or semiconductor layer is prevented.
    Type: Application
    Filed: May 30, 2011
    Publication date: March 21, 2013
    Applicant: Albert-Ludwigs-Universitaet Freiburg
    Inventor: Alex Fauler
  • Publication number: 20130068157
    Abstract: A method of manufacturing silicon carbide crystal includes the steps of forming silicon carbide crystal on a main surface of a base composed of carbon and removing the base from silicon carbide crystal by oxidizing carbon. According to the manufacturing method, by gasifying the base integrated with the silicon carbide crystal by oxidizing carbon forming the base, the base is removed from the silicon carbide crystal. Therefore, since it is not necessary to apply physical force to the silicon carbide crystal or the base for separating them from each other, occurrence of a defect involved with removal of the base can be suppressed. Therefore, high-quality silicon carbide crystal having fewer defects can be manufactured.
    Type: Application
    Filed: September 7, 2012
    Publication date: March 21, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Makoto Sasaki, Tsutomu Hori
  • Publication number: 20130061800
    Abstract: A high heat-resistant member includes a graphite substrate including isotropic graphite and a carbide coating film including a carbide, such as tantalum carbide, and covering a surface of the graphite substrate, the carbide coating film having a randomly oriented isotropic grain structure in which crystallites having a size indexed by a full width at half maximum of a diffraction peak of an X-ray diffraction spectrum of not more than 0.2° from (111) planes are accumulated at substantially random. The orientation of the carbide coating film is determined by whether degree of orientation (F) in any Miller plane calculated based on an XRD spectrum using the Lotgering method is within a range from ?0.2 to 0.2.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 14, 2013
    Applicant: KABUSHIKI KAISHA TOYOTA CHUO KENKYUSHO
    Inventors: Daisuke NAKAMURA, Akitoshi SUZUMURA, Keisuke SHIGETOH
  • Patent number: 8394197
    Abstract: Enhanced corrosion resistance is achieved in a coating by using a germanium-containing precursor and hollow cathode techniques to form a first layer directly on the surface of a workpiece, prior to forming an outer layer, such as a layer of diamond-like carbon (DLC). The use of a germanium or germanium-carbide precursor reduces film stress and enables an increase in the thickness of the subsequently formed DLC. Germanium incorporation also reduces the porosity of the layer. In one embodiment, a cap layer containing germanium is added after the DLC in order to further reduce the susceptibility of the coating to chemical penetration from the top.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: March 12, 2013
    Assignee: Sub-One Technology, Inc.
    Inventors: Andrew W. Tudhope, Thomas B. Casserly, Karthik Boinapally, Deepak Upadhyaya, William J. Boardman
  • Patent number: 8384090
    Abstract: A high quality single crystal wafer of SiC is disclosed having a diameter of at least about 3 inches and a 1c screw dislocation density of less than about 2000 cm?2.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: February 26, 2013
    Assignee: Cree, Inc.
    Inventors: Adrian Powell, Mark Brady, Stephan G. Mueller, Valeri F. Tsvetkov, Robert T. Leonard
  • Patent number: 8383494
    Abstract: Disclosed is a method for forming a buffer layer for growing gallium nitride single crystals on a sapphire substrate using hydride vapor phase epitaxy (HVPE), wherein the buffer layer is formed in the form of a doped vertical gallium nitride (GaN) single crystal film with a nanoporosity of 0.10 to 0.15 ?m on the sapphire substrate by reacting HCl and NH3 as a Group III/V mix gas. The nanoporous buffer layer interposed on the interface between the sapphire substrate and gallium nitride reduces tensile stress generated by the difference in thermal expansion coefficient between gallium nitride and the sapphire substrate, enables growth of the gallium nitride layer to a thickness of 1 micrometer (?m) to several millimeters (mm) without causing cracks, and reduces the lattice constant difference to improve crystallinity.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: February 26, 2013
    Assignee: Grand Tech Co., Ltd
    Inventors: Kyung Seob Han, Jeong Heo, Hyeong Jun Kim, Seung Kil Lee
  • Patent number: 8382897
    Abstract: Methods for gas delivery to a process chamber are provided herein. In some embodiments, a method may include flowing a process gas through one or more gas conduits, each gas conduit having an inlet and an outlet for facilitating the flow of gas through the gas conduits and into a gas inlet funnel having a second volume, wherein each gas conduit has a first volume less than the second volume, and wherein each gas conduit has a cross-section that increases from a first cross-section proximate the inlet to a second cross-section proximate the outlet but excluding any intersection points between the gas inlet funnel and the gas conduit, and wherein the second cross-section is non-circular; and delivering the process gas to the substrate via the gas inlet funnel.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: February 26, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Kedarnath Sangam, Anh N. Nguyen
  • Patent number: 8377204
    Abstract: Affords methods of growing III nitride single crystals of favorable crystallinity with excellent reproducibility, and the III nitride crystals obtained by the growth methods. One method grows a III nitride single crystal (3) inside a crystal-growth vessel (11), the method being characterized in that a porous body formed from a metal carbide, whose porosity is between 0.1% and 70% is employed in at least a portion of the crystal-growth vessel (11). Employing the crystal-growth vessel (11) makes it possible to discharge from 1% to 50% of a source gas (4) inside the crystal-growth vessel (11) via the pores in the porous body to the outside of the crystal-growth vessel (11).
    Type: Grant
    Filed: June 16, 2006
    Date of Patent: February 19, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Michimasa Miyanaga, Naho Mizuhara, Shinsuke Fujiwara, Seiji Nakahata, Hideaki Nakahata
  • Patent number: 8377806
    Abstract: A method for controlled growth of silicon carbide and structures produced by the method are disclosed. A crystal of silicon carbide (SiC) can be grown by placing a sacrificial substrate in a growth zone with a source material. The source material may include a low-solubility impurity. SiC is then grown on the sacrificial substrate to condition the source material. The sacrificial substrate is then replaced with the final substrate, and SiC is grown on the final substrate. A single crystal of silicon carbide is produced, wherein the crystal of silicon carbide has substantially few micropipe defects. Such a crystal may also include a substantially uniform concentration of the low-solubility impurity, and may be used to make wafers and/or SiC die.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: February 19, 2013
    Assignee: Cree, Inc.
    Inventors: Robert Tyler Leonard, Hudson M. Hobgood, William A. Thore
  • Patent number: 8372197
    Abstract: A control system and method for controlling temperatures while performing a MBE deposition process, wherein the control system comprises a MBE growth structure; a heater adapted to provide heat for the MBE deposition process on the MBE growth structure; and a control computer adapted to receive a plurality of dynamic feedback control signals derived from the MBE growth structure; switch among a plurality of control modes corresponding with the plurality of dynamic feedback control signals; and send an output power signal to the heater to control the heating for the MBE deposition process based on a combination of the plurality of control modes. In one embodiment, the plurality of dynamic feedback control signals comprises thermocouple signals and pyrometer signals.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: February 12, 2013
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventor: Stefan P. Svensson
  • Patent number: 8366892
    Abstract: The present invention relates to an electrode composed of carbon having at least two different zones, wherein an outer zone (A) forms the base of the electrode and carries one or more inner zones, wherein the innermost zone (B) projects from the zone (A) at the top and has a lower specific thermal conductivity than zone (A).
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: February 5, 2013
    Assignee: Wacker Chemie AG
    Inventors: Heinz Kraus, Mikhail Sofin
  • Patent number: 8368179
    Abstract: A method for improved growth of a semipolar (Al,In,Ga,B)N semiconductor thin film using an intentionally miscut substrate. Specifically, the method comprises intentionally miscutting a substrate, loading a substrate into a reactor, heating the substrate under a flow of nitrogen and/or hydrogen and/or ammonia, depositing an InxGa1-xN nucleation layer on the heated substrate, depositing a semipolar nitride semiconductor thin film on the InxGa1-xN nucleation layer, and cooling the substrate under a nitrogen overpressure.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: February 5, 2013
    Assignees: The Regents of the University of California, Japan Science and Technology Agency
    Inventors: John F. Kaeding, Dong-Seon Lee, Michael Iza, Troy J. Baker, Hitoshi Sato, Benjamin A. Haskell, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 8361226
    Abstract: This III-nitride single-crystal growth method, being a method of growing a AlxGa1-xN single crystal (4) by sublimation, is furnished with a step of placing source material (1) in a crucible (12), and a step of sublimating the source material (1) to grow AlxGa1-xN (0<x?1) single crystal (4) in the crucible (12), with the AlyGa1-yN (0<y?1) source (2) and an impurity element (3), which is at least one selected from the group consisting of IVb elements and IIa elements, being included in the source material (1). This growth method makes it possible to stably grow bulk III-nitride single crystals of low dislocation density and of favorable crystallinity.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: January 29, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Michimasa Miyanaga, Naho Mizuhara, Shinsuke Fujiwara, Hideaki Nakahata, Tomohiro Kawase
  • Patent number: 8361550
    Abstract: A substrate is arranged in a processing chamber, the substrate is heated, a Ti material is introduced into the processing chamber in the form of gas, the Ti material is oxidized by introducing an oxidizing agent in the form of gas, a Sr material is introduced into the processing chamber in the form of gas, the Sr material is oxidized by introducing the oxidizing agent in the form of gas, and a SrTiO3 film is formed on the substrate. As the Sr material, a Sr amine compound or a Sr imine compound is used.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: January 29, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Akinobu Kakimoto, Yumiko Kawano
  • Patent number: 8357241
    Abstract: There is provided a method of vacuum evaporation comprising causing evaporated material (5) from vacuum evaporation source (20) furnished with container (1) with its one side open accommodating organic material (2) to form a film on opposed substrate (7), wherein the vacuum evaporation source has heating element (3) not fixed to the container, and being in contact with the surface of organic material held in the container, and wherein the organic material is evaporated by heating of the heating element only, the evaporated material released through at least one hole (6) or at least one slit made in the heating element.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: January 22, 2013
    Assignee: Canon Tokki Corporation
    Inventors: Eiichi Matsumoto, Yoshiko Abe, Yuji Yanagi
  • Patent number: 8357242
    Abstract: Methods of depositing thin film materials having crystalline content are provided. The methods use plasma enhanced chemical vapor deposition. According to one embodiment of the present invention, microcrystalline silicon films are obtained. According to a second embodiment of the present invention, crystalline films of zinc oxide are obtained. According to a third embodiment of the present invention, crystalline films of iron oxide are obtained.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: January 22, 2013
    Inventors: Russell F. Jewett, Steven F. Pugh, Paul Wickboldt
  • Patent number: 8357243
    Abstract: The present invention discloses a new testing method of group III-nitride wafers. By utilizing the ammonothermal method, GaN or other Group III-nitride wafers can be obtained by slicing the bulk GaN ingots. Since these wafers originate from the same ingot, these wafers have similar properties/qualities. Therefore, properties of wafers sliced from an ingot can be estimated from measurement data obtained from selected number of wafers sliced from the same ingot or an ingot before slicing. These estimated properties can be used for product certificate of untested wafers. This scheme can reduce a significant amount of time, labor and cost related to quality control.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: January 22, 2013
    Assignee: Sixpoint Materials, Inc.
    Inventors: Tadao Hashimoto, Masanori Ikari, Edward Letts
  • Patent number: 8349077
    Abstract: Reducing the microvoid (MV) density in AlN ameliorates numerous problems related to cracking during crystal growth, etch pit generation during the polishing, reduction of the optical transparency in an AlN wafer, and, possibly, growth pit formation during epitaxial growth of AlN and/or AlGaN. This facilitates practical crystal production strategies and the formation of large, bulk AlN crystals with low defect densities—e.g., a dislocation density below 104 cm?2 and an inclusion density below 104 cm?3 and/or a MV density below 104 cm?3.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: January 8, 2013
    Assignee: Crystal IS, Inc.
    Inventors: Robert T. Bondokov, Kenneth Morgan, Glen A. Slack, Leo J. Schowalter
  • Patent number: 8349076
    Abstract: A method of fabricating a freestanding gallium nitride (GaN) substrate includes: preparing a GaN substrate within a reactor; supplying HCl and NH3 gases into the reactor to treat the surface of the GaN substrate and forming a porous GaN layer; forming a GaN crystal growth layer on the porous GaN layer; and cooling the GaN substrate on which the GaN crystal growth layer has been formed and separating the GaN crystal growth layer from the substrate. According to the fabrication method, the entire process including forming a porous GaN layer and a thick GaN layer is performed in-situ within a single reactor. The method is significantly simplified compared to a conventional fabrication method. The fabrication method enables the entire process to be performed in one chamber while allowing GaN surface treatment and growth to be performed using HVPE process gases, thus resulting in a significant reduction in manufacturing costs.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: January 8, 2013
    Assignee: Samsung Corning Precision Materials Co., Ltd.
    Inventors: In-Jae Song, Jai-yong Han
  • Patent number: 8343276
    Abstract: The present invention provides a high-temperature ionic state fluidized bed compound crystallization technology and an internal reactor structure thereof. The principle of the present invention is that reaction gas is effected by a group of high-frequency external magnetic fields and forms the high-temperature gaseous ion in the first quartz vacuum tube, then forms ion deposition diffusion in the second quartz vacuum tube preheated at constant temperature. As a result, other high-temperature gaseous ions except the silicon hydride are decomposed, rapidly deposited and crystallized in the ion diffusion chamber. And the un-decomposed silicon hydride gas is directly poured into the surface of the silicon heating body of the compound fluidized bed by the static negative high-voltage quartz spray hole to decompose and crystallize, or crystallize by a way of fluid state in the arched heating quartz tube communicating with the top of two quartz reaction furnaces.
    Type: Grant
    Filed: June 18, 2009
    Date of Patent: January 1, 2013
    Inventors: Haibiao Wang, Tetsunori Kunimune, Cecilia Wang
  • Patent number: 8334016
    Abstract: Metal silicates or phosphates are deposited on a heated substrate by the reaction of vapors of alkoxysilanols or alkylphosphates along with reactive metal amides, alkyls or alkoxides. For example, vapors of tris(tert-butoxy)silanol react with vapors of tetrakis(ethylmethylamido)hafnium to deposit hafnium silicate on surfaces heated to 300° C. The product film has a very uniform stoichiometry throughout the reactor. Similarly, vapors of diisopropylphosphate react with vapors of lithium bis(ethyldimethylsilyl)amide to deposit lithium phosphate films on substrates heated to 250° C. Supplying the vapors in alternating pulses produces these same compositions with a very uniform distribution of thickness and excellent step coverage.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: December 18, 2012
    Assignee: President and Fellows of Harvard College
    Inventors: Roy G. Gordon, Jill S. Becker, Dennis Hausmann, Seigi Suh
  • Patent number: 8328937
    Abstract: A seed crystal axis used in a solution growth of single crystal production system is provided to prevent formation of polycrystals and grow a single crystal with a high growth rate. The seed crystal axis includes a seed crystal bonded to a seed crystal support member between which is interposed a laminated carbon sheet having a high thermal conductivity in a direction perpendicular to a solution surface of a solvent. The laminated carbon sheet includes a plurality of carbon thin films laminated with an adhesive or a plurality of pieces with differing lamination directions arranged in a lattice. Alternatively, a wound carbon sheet including a carbon strip wound concentrically from the center or a wound carbon sheet including a plurality of carbon strips with differing thicknesses which are wound and laminated from the center may be provided.
    Type: Grant
    Filed: July 21, 2009
    Date of Patent: December 11, 2012
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Hidemitsu Sakamoto, Yasuyuki Fujiwara
  • Patent number: 8328936
    Abstract: A process of producing a diamond thin-film includes implanting dopant into a diamond by an ion implantation technique, forming a protective layer on at least part of the surface of the ion-implanted diamond, and firing the protected ion-implanted diamond at a firing pressure of no less than 3.5 GPa and a firing temperature of no less than 600° C. A process of producing a diamond semiconductor includes implanting dopant into each of two diamonds by an ion implantation technique and superimposing the two ion-implanted diamonds on each other such that at least part of the surfaces of each of the ion-implanted diamonds makes contact with each other, and firing the ion implanted diamonds at a firing pressure of no less than 3.5 GPa and a firing temperature of no less than 600° C.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: December 11, 2012
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Patent number: 8328935
    Abstract: The present invention is a method of manufacturing polycrystalline silicon rods, wherein silicon is deposited onto a silicon core wire by a chemical vapor deposition (CVD) method such that a silicon member, which is cut out from a single-crystalline silicon ingot at an off-angle range of 5 to 40 degrees relative to a crystal habit line of the ingot, is used as the silicon core wire. The single-crystalline silicon ingot is preferably grown by a Czochralski (CZ) method or floating zone (FZ) method, such that the ingot preferably has an interstitial oxygen concentration of 7 ppma to 20 ppma. Silicon rods produced by this method are less likely to suffer a breakage caused by cleavage during the growth process of polycrystalline silicon during CVD, and exhibit improved FZ method success rates. The polycrystalline silicon rods produced by this method also have low impurity contamination and high single-crystallization efficiency.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: December 11, 2012
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Michihiro Mizuno, Shinichi Kurotani, Shigeyoshi Netsu, Kyoji Oguro
  • Publication number: 20120308758
    Abstract: A silicon carbide crystal ingot having a surface greater than or equal to 4 inches, having an n-type dopant concentration greater than or equal to 1×1015 atoms/cm3 and less than or equal to 1×1020 atoms/cm3, a metal atom concentration greater than or equal to 1×1014 atoms/cm3 and less than or equal to 1×1018 atoms/cm3, and not exceeding the n-type dopant concentration, and a metal atom concentration gradient less than or equal to 1×1017 atoms/(cm3·mm), a silicon carbide single crystal wafer produced using the ingot, and a method for fabricating the silicon carbide crystal ingot.
    Type: Application
    Filed: May 18, 2012
    Publication date: December 6, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Tsutomu HORI, Makoto SASAKI, Taro NISHIGUCHI, Shinsuke FUJIWARA
  • Patent number: 8323402
    Abstract: Methods of growing and manufacturing aluminum nitride crystal, and aluminum nitride crystal produced by the methods. Preventing sublimation of the starting substrate allows aluminum nitride crystal of excellent crystallinity to be grown at improved growth rates. The aluminum nitride crystal growth method includes the following steps. Initially, a laminar baseplate is prepared, furnished with a starting substrate having a major surface and a back side, a first layer formed on the back side, and a second layer formed on the first layer. Aluminum nitride crystal is then grown onto the major surface of the starting substrate by vapor deposition. The first layer is made of a substance that at the temperatures at which the aluminum nitride crystal is grown is less liable to sublimate than the starting substrate. The second layer is made of a substance whose thermal conductivity is higher than that of the first layer.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: December 4, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keisuke Tanizaki, Naho Mizuhara, Michimasa Miyanaga, Hideaki Nakahata, Yoshiyuki Yamamoto
  • Publication number: 20120285370
    Abstract: In SiC sublimation crystal growth, a crucible is charged with SiC source material and SiC seed crystal in spaced relation and a baffle is disposed in the growth crucible around the seed crystal. A first side of the baffle in the growth crucible defines a growth zone where a SiC single crystal grows on the SiC seed crystal. A second side of the baffle in the growth crucible defines a vapor-capture trap around the SiC seed crystal. The growth crucible is heated to a SiC growth temperature whereupon the SiC source material sublimates and forms a vapor which is transported to the growth zone where the SiC crystal grows by precipitation of the vapor on the SiC seed crystal. A fraction of this vapor enters the vapor-capture trap where it is removed from the growth zone during growth of the SiC crystal.
    Type: Application
    Filed: September 14, 2010
    Publication date: November 15, 2012
    Applicant: II-VI INCORPORATED
    Inventors: Avinash K. Gupta, Ilya Zwieback, Edward Semenas, Varatharajan Rengarajan, Marcus L. Getkin
  • Patent number: 8303924
    Abstract: A bulk AlN single crystal is grown on a monocrystalline AlN seed crystal having a central longitudinal mid-axis and disposed in a crystal growth region of a growing crucible. The bulk AlN single crystal grows in a growth direction oriented parallel to the longitudinal mid-axis by deposition on the AlN seed crystal. The crucible has a lateral crucible inner wall extending in the growth direction, a free space being provided between the AlN seed crystal and the growing bulk AlN single crystal on the one hand, and the lateral crucible inner wall on the other hand. Bulk AlN single crystals and monocrystalline AlN substrates produced therefrom are therefore obtained with only few dislocations, which furthermore are substantially distributed homogeneously. The growing crucible, inside which the crystal growth region is located, is an inner growing crucible which is arranged in an outer growing crucible.
    Type: Grant
    Filed: April 5, 2010
    Date of Patent: November 6, 2012
    Assignee: SiCrystal AG
    Inventors: Ralph-Uwe Barz, Thomas Straubinger
  • Patent number: 8293011
    Abstract: A method for growing a Group III nitride semiconductor crystal is provided with the following steps: First, a chamber including a heat-shielding portion for shielding heat radiation from a material 13 therein is prepared. Then, material 13 is arranged on one side of heat-shielding portion in chamber. Then, by heating material to be sublimated, a material gas is deposited on the other side of heat-shielding portion in chamber so that a Group III nitride semiconductor crystal is grown.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: October 23, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Michimasa Miyanaga, Naho Mizuhara, Keisuke Tanizaki, Issei Satoh, Hisao Takeuchi, Hideaki Nakahata
  • Patent number: 8282733
    Abstract: The manufacturing method of a semiconductor apparatus has a step for carrying in the substrate into the processing chamber; a step for heating the processing chamber and the substrate to the predetermined temperature; and a gas supply and exhaust step for supplying and exhausting desired gas into and from the processing chamber, wherein the gas supply and exhaust step repeats by the predetermined times a first supply step for supplying silicon-type gas and hydrogen gas into the processing chamber; a first exhaust step for exhausting at least said silicon-type gas from the processing chamber; a second supply step for supplying chlorine gas and hydrogen gas into the processing chamber; and a second exhaust step for exhausting at least the chlorine gas from the processing chamber.
    Type: Grant
    Filed: April 1, 2008
    Date of Patent: October 9, 2012
    Assignee: Hitachi Kokusai Electric Inc.
    Inventor: Katsuhiko Yamamoto
  • Patent number: 8268075
    Abstract: A method of producing a zinc oxide-based semiconductor crystal, including: introducing at least zinc and oxygen on a surface of a substrate; and growing a zinc oxide-based semiconductor crystal on the substrate, wherein a total or partial portion of the zinc is ionized in a vacuum atmosphere of 1×10?4 Torr or less and is introduced to the surface of the substrate to grow the ZnO based semiconductor crystal. As a result, it is possible to provide a method of producing a zinc oxide based semiconductor crystal capable of growing a zinc oxide semiconductor crystal having excellent surface flatness and crystallinity and including an extremely small amount of impurities at a high growth rate.
    Type: Grant
    Filed: June 22, 2007
    Date of Patent: September 18, 2012
    Assignees: Fujikura Ltd., Chiba University
    Inventors: Koji Omichi, Yoshikazu Kaifuchi, Munehisa Fujimaki, Akihiko Yoshikawa
  • Patent number: 8262796
    Abstract: A thin-film single crystal growing method includes preparing a substrate, irradiating an excitation beam on a metallic target made of a pure metal or an alloy in a predetermined atmosphere, and combining chemical species including any of atoms, molecules, and ions released from the metallic target by irradiation of the excitation beam with atoms contained in the predetermined atmosphere to form a thin film on the substrate.
    Type: Grant
    Filed: March 15, 2010
    Date of Patent: September 11, 2012
    Assignee: Waseda University
    Inventors: Noboru Ichinose, Kiyoshi Shimamura, Kazuo Aoki, Encarnacion Antonia Garcia Villora
  • Patent number: 8257491
    Abstract: Growth conditions are developed, based on a temperature-dependent alignment model, to enable formation of cubic group IV, group II-V and group II-VI crystals in the [111] orientation on the basal (0001) plane of trigonal crystal substrates, controlled such that the volume percentage of primary twin crystal is reduced from about 40% to about 0.3%, compared to the majority single crystal. The control of stacking faults in this and other embodiments can yield single crystalline semiconductors based on these materials that are substantially without defects, or improved thermoelectric materials with twinned crystals for phonon scattering while maintaining electrical integrity. These methods can selectively yield a cubic-on-trigonal epitaxial semiconductor material in which the cubic layer is substantially either directly aligned, or 60 degrees-rotated from, the underlying trigonal material.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: September 4, 2012
    Assignee: The United States of America, as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Yeonjoon Park, Sang Hyouk Choi, Glen C. King, James R. Elliott
  • Patent number: 8252112
    Abstract: A method and apparatus for the unusually high rate deposition of thin film materials on a stationary or continuous substrate. The method includes delivery of a pre-selected precursor intermediate to a deposition chamber and formation of a thin film material from the intermediate. The intermediate is formed outside of the deposition chamber and includes a metastable species such as a free radical. The intermediate is pre-selected to include a metastable species conducive to the formation of a thin film material having a low defect concentration. By forming a low defect concentration material, deposition rate is decoupled from material quality and heretofore unprecedented deposition rates are achieved. In one embodiment, the pre-selected precursor intermediate is SiH3.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: August 28, 2012
    Assignee: Ovshinsky Innovation, LLC
    Inventor: Stanford R. Ovshinsky
  • Patent number: 8241422
    Abstract: It is provided a method of growing gallium nitride single crystal of good quality with a high productivity, in the growth of gallium nitride single crystal by Na-flux method. Gallium nitride single crystal is grown using flux 8 containing at least sodium metal. Gallium nitride single crystal is grown in atmosphere composed of gases mixture “B” containing nitrogen gas at a pressure of 300 atms or higher and 2000 atms or lower. Preferably, the nitrogen partial pressure in the atmosphere is 100 atms or higher and 2000 atms or lower. Preferably, the growth temperature is 1000° C. or higher and 1500° C. or lower.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: August 14, 2012
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Iwai, Katsuhiro Imai, Minoru Imaeda
  • Patent number: 8236103
    Abstract: A method for producing a Group III nitride semiconductor crystal includes a first step of supplying a Group III raw material and a Group V raw material at a V/III ratio of 0 to 1,000 to form and grow a Group III nitride semiconductor on a heated substrate and a second step of vapor-phase-growing a Group III nitride semiconductor crystal on the substrate using a Group III raw material and a nitrogen raw material.
    Type: Grant
    Filed: February 14, 2003
    Date of Patent: August 7, 2012
    Assignee: Showa Denko K.K.
    Inventors: Hisayuki Miki, Tetsuo Sakurai, Mineo Okuyama
  • Patent number: 8231728
    Abstract: An epitaxial growth method forming a semiconductor thin film including a heterojunction of a group III-V compound semiconductor by means of molecular beam epitaxy. The method is configured to include: a first step of irradiating a molecular beam of at least one of group III elements and a molecular beam of a first group V element to form a first compound semiconductor layer; a second step of stopping the irradiation of the molecular beam of the group III element and the molecular beam of the first group V element to halt growth until an amount of the first group V element supplied is reduced to 1/10 or less of a supply of the first group V element in the first step; and a third step of irradiating a molecular beam of at least one of the group III elements and a molecular beam of a second group V element to form a second compound semiconductor layer, which is different from the first compound semiconductor, on the first compound semiconductor layer.
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: July 31, 2012
    Assignee: Nippon Mining & Metals Co., Ltd.
    Inventors: Misao Takakusaki, Susumu Kanai
  • Patent number: 8231724
    Abstract: The reactor for polycrystalline silicon is a reactor for polycrystalline silicon in which a silicon seed rod installed inside the reactor is heated by supplying electricity, a raw material gas supplied inside the reactor is allowed to react, thereby producing polycrystalline silicon on the surface of the silicon seed rod, and specifically, the reactor for polycrystalline silicon is provided with a raw material gas supply port installed on the bottom of the reactor and a raw material gas supply nozzle attached to the raw material gas supply port so as to be communicatively connected and extending upward, in which the upper end of the raw material gas supply nozzle is set to a height in a range from ?10 cm to +5 cm on the basis of the upper end of the electrode which retains the silicon seed rod.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: July 31, 2012
    Assignee: Mitsubishi Materials Corporation
    Inventors: Toshihide Endoh, Toshiyuki Ishii, Masaaki Sakaguchi, Naoki Hatakeyama
  • Patent number: 8226767
    Abstract: “Super-hetero-epitaxial” combinations comprise epitaxial growth of one material on a different material with different crystal structure. Compatible crystal structures may be identified using a “Tri-Unity” system. New bandgap engineering diagrams are provided for each class of combination, based on determination of hybrid lattice constants for the constituent materials in accordance with lattice-matching equations. Using known bandgap figures for previously tested materials, new materials with lattice constants that match desired substrates and have the desired bandgap properties may be formulated by reference to the diagrams and lattice matching equations. In one embodiment, this analysis makes it possible to formulate new super-hetero-epitaxial semiconductor systems, such as systems based on group IV alloys on c-plane LaF3; group IV alloys on c-plane langasite; Group III-V alloys on c-plane langasite; and group II-VI alloys on c-plane sapphire.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: July 24, 2012
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Yeonjoon Park, Sang H. Choi, Glen C. King, James R. Elliott
  • Publication number: 20120183466
    Abstract: An SiC crystal has Fe concentration not higher than 0.1 ppm and Al concentration not higher than 100 ppm. A method of manufacturing an SiC crystal includes the following steps. SiC powders for polishing are prepared as a first source material. A first SiC crystal is grown by sublimating the first source material through heating and precipitating an SiC crystal. A second source material is formed by crushing the first SiC crystal. A second SiC crystal is grown by sublimating the second source material through heating and precipitating an SiC crystal. Thus, an SiC crystal and a method of manufacturing an SiC crystal capable of achieving suppressed lowering in quality can be obtained.
    Type: Application
    Filed: February 25, 2011
    Publication date: July 19, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventor: Makoto Sasaki
  • Patent number: 8221548
    Abstract: A process for producing a diamond thin-film includes forming a diamond crystal thin-film on a substrate and firing the diamond crystal thin-film at a sufficient temperature under high pressure under which a diamond is stable. A diamond single-crystal substrate having a diamond single-crystal thin-film formed thereon is placed in an ultra-high-pressure and high-temperature firing furnace to anneal the diamond single-crystal thin-film under the conditions of 1200° C. and 6 GPa.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: July 17, 2012
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Kasu, Toshiki Makimoto, Kenji Ueda, Yoshiharu Yamauchi
  • Patent number: 8221546
    Abstract: A method of epitaxially growing a SiC layer on a single crystal SiC substrate is described. The method includes heating a single-crystal SiC substrate to a first temperature of at least 1400° C. in a chamber, introducing a carrier gas, a silicon containing gas and carbon containing gas into the chamber; and epitaxially growing a layer of SiC on a surface of the SiC substrate. The SiC substrate is heated to the first temperature at a rate of at least 30° C./minute. The surface of the SiC substrate is inclined at an angle of from 1° to 3° with respect to a basal plane of the substrate material.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: July 17, 2012
    Assignee: SS SC IP, LLC
    Inventor: Jie Zhang
  • Publication number: 20120174858
    Abstract: A base for making an epitaxial structure is provided. The base includes a substrate and a carbon nanotube layer. The substrate has an epitaxial growth surface. The carbon nanotube layer is located on the epitaxial growth surface. The carbon nanotube layer defines a plurality of apertures to expose part of the epitaxial growth surface so that an epitaxial layer can grow from an exposed epitaxial growth surface and through the apertures. A method for making an epitaxial structure using the base is also provided.
    Type: Application
    Filed: October 18, 2011
    Publication date: July 12, 2012
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITY
    Inventors: YANG WEI, CHEN FENG, SHOU-SHAN FAN
  • Publication number: 20120177902
    Abstract: Multiferroic articles including highly resistive, strongly ferromagnetic strained thin films of BiFe0.5Mn0.5O3 (“BFMO”) on (001) strontium titanate and Nb-doped strontium titanate substrates were prepared. The films were tetragonal with high epitaxial quality and phase purity. The magnetic moment and coercivity values at room temperature were 90 emu/cc (H=3 kOe) and 274 Oe, respectively. The magnetic transition temperature was strongly enhanced up to approximately 600 K, which is approximately 500 K higher than for pure bulk BiMnO3.
    Type: Application
    Filed: September 1, 2011
    Publication date: July 12, 2012
    Inventors: Judith L. Driscoll, Quanxi Jia
  • Patent number: 8216364
    Abstract: Direct resistive heating is used to grow nanotubes out of carbon and other materials. A growth-initiated array of nanotubes is provided using a CVD or ion implantation process. These processes use indirect heating to heat the catalysts to initiate growth. Once growth is initiated, an electrical source is connected between the substrate and a plate above the nanotubes to source electrical current through and resistively heat the nanotubes and their catalysts. A material source supplies the heated catalysts with carbon or another material to continue growth of the array of nanotubes. Once direct heating has commenced, the source of indirect heating can be removed or at least reduced. Because direct resistive heating is more efficient than indirect heating the total power consumption is reduced significantly.
    Type: Grant
    Filed: April 14, 2008
    Date of Patent: July 10, 2012
    Assignee: Raytheon Company
    Inventors: Delmar L. Barker, Mead M. Jordan, William R. Owens
  • Patent number: 8216367
    Abstract: A method for producing a silicon carbide layer on a surface of a silicon substrate includes the step of irradiating the surface of the silicon substrate heated in a high vacuum at a temperature in a range of from 500° C. to 1050° C. with a hydrocarbon-based gas as well as an electron beam to form a cubic silicon carbide layer on the silicon substrate surface.
    Type: Grant
    Filed: May 23, 2006
    Date of Patent: July 10, 2012
    Assignee: Showa Denko K.K.
    Inventor: Takashi Udagawa
  • Publication number: 20120160157
    Abstract: There is provided a method of manufacturing a light emitting diode, the method including: growing a first conductivity type nitride semiconductor layer and an active layer on a substrate in a first reaction chamber; transferring the substrate having the first conductivity type nitride semiconductor layer and the active layer grown thereon to a second reaction chamber; and growing a second conductivity type nitride semiconductor layer on the active layer in the second reaction chamber, wherein an atmosphere including a nitride source gas and a dopant source gas supplying a dopant to be included in the second conductivity type nitride semiconductor layer is created in an interior of the second reaction chamber prior to the transferring of the substrate to the second reaction chamber. This method improves a system's operational capability and productivity. In addition, the crystallinity and doping uniformity of semiconductor layers obtained by this method may be improved.
    Type: Application
    Filed: August 12, 2011
    Publication date: June 28, 2012
    Inventors: Sang Heon HAN, Do Young Rhee, Jin Young Lim, Ki Sung Kim, Young Sun Kim
  • Publication number: 20120156122
    Abstract: In a method of producing a SiC crystal by sublimation, the atmosphere gas for growing a SiC crystal contains He. The atmosphere gas may further contain N. The atmosphere gas may further contain at least one type of gas selected from the group consisting of Ne, Ar, Kr, Xe, and Rn. In the atmosphere gas, the partial pressure of He is preferably greater than or equal to 40%.
    Type: Application
    Filed: October 27, 2010
    Publication date: June 21, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Taro Nishiguchi
  • Publication number: 20120153265
    Abstract: The present invention relates to solid solution inducing layer for the preparation of weak epitaxial films of non-planar phthalocyanine and the thin film of non-planar phthalocyanine generated from the weak epitaxial growth on the solid solution inducing layer and organic thin film transistor based on the weak rpitaxy growth thin film of non-planar phthalocyanine. The solid solution inducing layer is prepared at certain substrate temperature by vapor co-deposition of any two inducing layer molecules presented by Formula I and Formula II. The solid solution inducing layer has uniformed structure, of which the lattice parameter and electronic structure can be controlled by adjusting the component proportion, the solid solution inducing layer can epitaxially grow a high quality thin film of non-planar phthalocyanine and fabricate high performance transistor device based on such epitaxial thin film.
    Type: Application
    Filed: July 20, 2011
    Publication date: June 21, 2012
    Inventors: Donghang YAN, Yanhou Geng, Hongkun Tian, Lizhen Huang, Jianfeng Shen, Xiaodong Guo
  • Patent number: 8197598
    Abstract: A method for making iron silicide nano-wires comprises the following steps. Firstly, providing a growing substrate and a growing device, the growing device comprising a heating apparatus and a reacting room. Secondly, placing the growing substrate and a quantity of iron powder into the reacting room. Thirdly, introducing a silicon-containing gas into the reacting room. Finally, heating the reacting room to a temperature of 600˜1200° C.
    Type: Grant
    Filed: November 6, 2008
    Date of Patent: June 12, 2012
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Hai-Lin Sun, Kai-Li Jiang, Qun-Qing Li, Shou-Shan Fan