Forming From Vapor Or Gaseous State (e.g., Vpe, Sublimation) Patents (Class 117/84)
  • Patent number: 8192543
    Abstract: A nitride crystal is characterized in that, in connection with plane spacing of arbitrary specific parallel crystal lattice planes of the nitride crystal obtained from X-ray diffraction measurement performed with variation of X-ray penetration depth from a surface of the crystal while X-ray diffraction conditions of the specific parallel crystal lattice planes are satisfied, a uniform distortion at a surface layer of the crystal represented by a value of |d1?d2|/d2 obtained from the plane spacing d1 at the X-ray penetration depth of 0.3 ?m and the plane spacing d2 at the X-ray penetration depth of 5 ?m is equal to or lower than 2.1×10?3.
    Type: Grant
    Filed: July 1, 2008
    Date of Patent: June 5, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Ishibashi, Tokiko Kaji, Seiji Nakahata, Takayuki Nishiura
  • Patent number: 8187382
    Abstract: A polycrystalline silicon manufacturing apparatus is provided which supplies raw gas to the inside of a reaction furnace and supplies a current from an electrode to a silicon seed rod in a state where the vertically extending silicon seed rod is uprightly stood on each of the plural electrodes disposed in a bottom plate portion of the reaction furnace so as to heat the silicon seed rod and thus to deposit polycrystalline silicon on a surface of the silicon seed rod by means of the reaction of the raw gas.
    Type: Grant
    Filed: March 20, 2009
    Date of Patent: May 29, 2012
    Assignee: Mitsubishi Materials Corporation
    Inventors: Toshihide Endoh, Masayuki Tebakari, Toshiyuki Ishii, Masaaki Sakaguchi
  • Publication number: 20120112320
    Abstract: A production process for a nitride semiconductor crystal, comprising growing a semiconductor layer on a seed substrate to obtain a nitride semiconductor crystal, wherein the seed substrate comprises a plurality of seed substrates made of the same material, at least one of the plurality of seed substrates differs in the off-angle from the other seed substrates, and a single semiconductor layer is grown by disposing the plurality of seed substrates in a semiconductor crystal production apparatus, such that when the single semiconductor layer is grown on the plurality of seed substrates, the off-angle distribution in the single semiconductor layer becomes smaller than the off-angle distribution in the plurality of seed substrates.
    Type: Application
    Filed: December 1, 2011
    Publication date: May 10, 2012
    Applicant: MITSUBISHI CHEMICAL CORPORATION
    Inventors: Shuichi KUBO, Kenji Shimoyama, Kazumasa Kiyomi, Kenji Fujito, Yutaka Mikawa
  • Publication number: 20120107218
    Abstract: A production method of a SiC crystal includes the following steps. That is, there is prepared a production device including a crucible and a heat insulator covering an outer circumference of the crucible. A source material is placed in the crucible. A seed crystal is placed opposite to the source material in the crucible. The silicon carbide crystal is grown by heating the source material in the crucible for sublimation thereof and depositing resultant source material gas on the seed crystal. The step of preparing the production device includes the step of providing a heat dissipation portion, which is constituted by a space, between the heat insulator and an outer surface of the crucible at a side of the seed crystal.
    Type: Application
    Filed: February 16, 2011
    Publication date: May 3, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Taro Nishiguchi
  • Patent number: 8163403
    Abstract: This invention disclosure describes methods for the fabrication of metal oxide films on surfaces by topotactic anion exchange, and laminate structures enabled by the method. A precursor metal-nonmetal film is deposited on the surface, and is subsequently oxidized via topotactic anion exchange to yield a topotactic metal-oxide product film. The structures include a metal-oxide layer(s) and/or a metal-nonmetal layer(s).
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: April 24, 2012
    Inventor: Mark A. Zurbuchen
  • Patent number: 8163085
    Abstract: An apparatus for forming a protective layer of magnesium oxide on a front glass substrate (11) in an evaporation chamber (201) includes the following: oxygen outlet openings (222) for introducing oxygen into the evaporation chamber (201); water vapor outlet openings (210) for introducing water vapor into the evaporation chamber (201) from the downstream side in the transfer direction of the front glass substrate (11); a mass analyzer (224) for measuring the ionic strength of hydrogen and the ionic strength of oxygen in the evaporation chamber (201); and mass flow controllers (215) and (221) for controlling the introduction amount of the water vapor and the introduction amount of the oxygen, respectively, by the ionic strengths measured by the mass analyzer (224).
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: April 24, 2012
    Assignee: Panasonic Corporation
    Inventors: Kazuo Uetani, Kaname Mizokami, Yoshinao Ooe, Akira Shiokawa, Hiroyuki Kado
  • Publication number: 20120091436
    Abstract: An ordered multilayer crystalline organic thin film structure is formed by depositing at least two layers of thin film crystalline organic materials successively wherein the at least two thin film layers are selected to have their surface energies within ±50% of each other, and preferably within ±15% of each other, whereby every thin film layer within the multilayer crystalline organic thin film structure exhibit a quasi-epitaxial relationship with the adjacent crystalline organic thin film.
    Type: Application
    Filed: April 11, 2011
    Publication date: April 19, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Stephen R. Forrest, Richard R. Lunt
  • Publication number: 20120085278
    Abstract: High productivity thin film deposition methods and tools are provided wherein a thin film semiconductor material layer with a thickness in the range of less than 1 micron to 100 microns is deposited on a plurality of wafers in a reactor. The wafers are loaded on a batch susceptor and the batch susceptor is positioned in the reactor such that a tapered gas flow space is created between the susceptor and an interior wall of the reactor. Reactant gas is then directed into the tapered gas space and over each wafer thereby improving deposition uniformity across each wafer and from wafer to wafer.
    Type: Application
    Filed: June 9, 2011
    Publication date: April 12, 2012
    Applicant: SOLEXEL INC.
    Inventors: Mehrdad M. Moslehi, Karl-Josef Kramer, Jay Ashjaee, George D. Kamian, David Mordo, Takao Yonehara
  • Publication number: 20120086001
    Abstract: The disclosed subject matter includes a method of producing zinc oxide (ZnO) single crystals in an enclosure. The ZnO single crystals have a low concentration of lithium and hydrogen impurities.
    Type: Application
    Filed: October 4, 2011
    Publication date: April 12, 2012
    Applicant: FAIRFIELD CRYSTAL TECHNOLOGY, LLC
    Inventor: Shaoping WANG
  • Publication number: 20120068192
    Abstract: A method of reducing threading dislocation densities in non-polar such as a-{11-20} plane and m-{1-100} plane or semi-polar such as {10-1n} plane III-Nitrides by employing lateral epitaxial overgrowth from sidewalls of etched template material through a patterned mask. The method includes depositing a patterned mask on a template material such as a non-polar or semi polar GaN template, etching the template material down to various depths through openings in the mask, and growing non-polar or semi-polar III-Nitride by coalescing laterally from the tops of the sidewalls before the vertically growing material from the trench bottoms reaches the tops of the sidewalls. The coalesced features grow through the openings of the mask, and grow laterally over the dielectric mask until a fully coalesced continuous film is achieved.
    Type: Application
    Filed: November 30, 2011
    Publication date: March 22, 2012
    Applicant: The Regents of the University of California
    Inventors: Kwang C. Kim, Mathew C. Schmidt, Feng Wu, Asako Hirai, Melvin B. McLaurin, Steven P. DenBaars, Shuji Nakamura, James S. Speck
  • Publication number: 20120070605
    Abstract: An SiC ingot includes a bottom face having 4 sides; four side faces extending from the bottom face in a direction intersecting the direction of the bottom face; and a growth face connected with the side faces located at a side opposite to the bottom face. At least one of the bottom face, the side faces, and the growth face is the {0001} plane, {1-100} plane, {11-20} plane, or a plane having an inclination within 10° relative to these planes.
    Type: Application
    Filed: September 17, 2010
    Publication date: March 22, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Makoto Sasaki, Shin Harada, Taro Nishiguchi, Kyoko Okita, Hiroki Inoue, Yasuo Namikawa, Shinsuke Fujiwara
  • Patent number: 8137461
    Abstract: A piezoelectric substrate of a perovskite-type oxide is expressed by a general formula of ABO3 having a laminate structure of a single crystal structure or a uniaxial crystal structure expressed by (Pb1-xMx)xm(ZryTi1-y)O3 (where M represents an element selected from La, Ca, Ba, Sr, Bi, Sb and W). The laminate structure has a first crystal phase layer having a crystal structure selected from a tetragonal structure, a rhombohedral structure, a pseudocubic structure and a monoclinic structure, a second crystal phase layer having a crystal structure different from the crystal structure of said first crystal phase layer and a boundary layer arranged between the first crystal phase layer and the second crystal phase layer with a crystal structure gradually changing in a thickness direction of the layer. The thicknesses of the first and second crystal phase layer differ.
    Type: Grant
    Filed: September 4, 2009
    Date of Patent: March 20, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takanori Matsuda, Toshihiro Ifuku
  • Publication number: 20120060749
    Abstract: Disclosed is an apparatus (1) for manufacturing a silicon carbide single crystal, which comprises: a crucible main body (11) that is opened at the top and holds a sublimation material (50) in the bottom portion (11a); a cover member (12) which covers the upper opening (11b) of the crucible main body (11); and a cylindrical guide member (70) which is provided in the crucible main body (11) for guiding the growth of the silicon carbide single crystal when the silicon carbide single crystal is grown from a seed crystal (60). The guide member (70) is separably configured of a first divided body and a second divided body.
    Type: Application
    Filed: March 19, 2010
    Publication date: March 15, 2012
    Applicant: BRIDGESTONE CORPORATION
    Inventor: Kenichiro Okuno
  • Publication number: 20120060751
    Abstract: A manufacturing method of a SiC single crystal includes growing a SiC single crystal on a surface of a SiC seed crystal, which satisfies following conditions: (i) the SiC seed crystal includes a main growth surface composed of a plurality of sub-growth surfaces; (ii) among directions from an uppermost portion of a {0001} plane on the main growth surface to portions on a periphery of the main growth surface, the SiC seed crystal has a main direction in which a plurality of sub-growth surfaces is arranged; and (iii) an offset angle ?k of a k-th sub-growth surface and an offset angle ?k+1 of a (k+1)-th sub-growth surface satisfy a relationship of ?k<?k+1.
    Type: Application
    Filed: August 16, 2011
    Publication date: March 15, 2012
    Applicant: DENSO CORPORATION
    Inventors: Yasushi URAKAMI, Itaru GUNJISHIMA, Ayumu ADACHI
  • Publication number: 20120060750
    Abstract: An oxide semiconductor film with excellent crystallinity is formed. At the time when an oxide semiconductor film is formed, as a substrate is heated to a temperature of higher than or equal to a first temperature and lower than a second temperature, a part of the substrate having a typical length of 1 nm to 1 ?m is heated to a temperature higher than or equal to the second temperature. Here, the first temperature means a temperature at which crystallization occurs with some stimulation, and the second temperature means a temperature at which crystallization occurs spontaneously without any stimulation. Further, the typical length is defined as the square root of a value obtained in such a manner that the area of the part is divided by the circular constant.
    Type: Application
    Filed: August 30, 2011
    Publication date: March 15, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei YAMAZAKI
  • Patent number: 8133321
    Abstract: A process for producing a silicon carbide single crystal in which a silicon carbide single crystal layer is homo-epitaxially or hetero-epitaxially grown on a surface of a single crystal substrate, wherein a plurality of substantially parallel undulation ridges that extend in a first direction on the single crystal substrate surface is formed on said single crystal substrate surface; each of the undulation ridges on said single crystal substrate surface has a height that undulates as each of the undulation ridges extends in the first direction; and the undulation ridges are disposed so that planar defects composed of anti-phase boundaries and/or twin bands that propagate together with the epitaxial growth of the silicon carbide single crystal merge with each other.
    Type: Grant
    Filed: May 23, 2006
    Date of Patent: March 13, 2012
    Assignee: Hoya Corporation
    Inventors: Takamitsu Kawahara, Kuniaki Yagi, Naoki Hatta, Hiroyuki Nagasawa
  • Patent number: 8128749
    Abstract: An SOI substrate has a gettering layer of silicon-germanium (SiGe) with 5-10% Ge, and a thickness of approximately 50-1000 nm. Carbon (C) may be added to SiGe to stabilize the dislocation network. The SOI substrate may be a SIMOX SOI substrate, or a bonded SOI substrate, or a seeded SOI substrate. The gettering layer may disposed under a buried oxide (BOX) layer. The gettering layer may be disposed on a backside of the substrate.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: March 6, 2012
    Assignee: International Business Machines Corporation
    Inventors: Junedong Lee, Devendra K. Sadana, Dominic J. Schepis
  • Patent number: 8118934
    Abstract: A method for growing flat, low defect density, and strain-free thick non-polar III-V nitride materials and devices on any suitable foreign substrates using a fabricated nano-pores and nano-network compliant layer with an HVPE, MOCVD, and integrated HVPE/MOCVD growth process in a manner that minimum growth will occur in the nano-pores is provided. The method produces nano-networks made of the non-polar III-V nitride material and the substrate used to grow it where the network is continuous along the surface of the template, and where the nano-pores can be of any shape.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: February 21, 2012
    Inventor: Wang Nang Wang
  • Publication number: 20120039344
    Abstract: A graphene-based saturable absorber device suitable for use in a ring-cavity fiber laser or a linear-cavity fiber laser is disclosed. The saturable absorber device includes an optical element and a graphene-based saturable absorber material supported by the optical element and comprising at least one of graphene, a graphene derivative and functionalized graphene. An examplary optical element is an optical fiber having an end facet that supports the saturable absorber material. Various forms of the graphene-based saturable absorber materials and methods of forming same are also disclosed.
    Type: Application
    Filed: April 13, 2010
    Publication date: February 16, 2012
    Inventors: Loh Ping Kian, Oiaoliang Bao, Ding Yuan Tang, Han Zhang
  • Publication number: 20120039789
    Abstract: Provided is a manufacturing device of an aluminum nitride single crystal including a crucible. An aluminum nitride raw material and a seed crystal are stored in an inner portion of the crucible. The seed crystal is placed so as to face the aluminum nitride raw material. The crucible includes an inner crucible and an outer crucible. The inner crucible stores the aluminum nitride raw material and the seed crystal inside the inner crucible. The inner crucible is also corrosion resistant to a sublimation gas of the aluminum nitride raw material. The inner crucible includes either, a single body of a metal having an ion radius larger than an ion radius of an aluminum, or includes a nitride of the metal. The outer crucible includes a boron nitride. The outer crucible covers the inner crucible.
    Type: Application
    Filed: October 21, 2011
    Publication date: February 16, 2012
    Applicants: FUJIKURA LTD., NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Tomohisa KATOU, Ichirou NAGAI, Tomonori MIURA, Hiroyuki KAMATA
  • Patent number: 8110171
    Abstract: A method for changing the color of a diamond. The method comprises placing the diamond in a substrate holder in a chemical vapor deposition (CVD) equipment. The CVD equipment is maintained at pressures near or below atmospheric pressure. A mixture of gases including hydrogen is introduced inside the CVD equipment. The introduced mixture of gases is energized by using microwave radiation to heat the diamond to temperatures above 1400° C. Then, the diamond is maintained at temperatures above 1400° C. for few seconds to few hours.
    Type: Grant
    Filed: November 15, 2006
    Date of Patent: February 7, 2012
    Inventors: Rustum Roy, Rajneesh Bhandari
  • Patent number: 8110848
    Abstract: The substrate is used for opto-electric or electrical devices and comprises a layer of nitride grown by means of vapor phase epitaxy growth wherein both main surfaces of the nitride substrate are substantially consisting of non N-polar face and N-polar face respectively and the dislocation density of the substrate is 5×105/cm2 or less. Therefore, the template type substrate has a good dislocation density and a good value of FWHM of the X-ray rocking curve from (0002) plane less than 80, so that the resulting template type substrate is very useful for the epitaxy substrate from gaseous phase such as MOCVD, MBE and HVPE, resulting in possibility of making good opto-electric devices such as Laser Diode and large-output LED and good electric devices such as MOSFET.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: February 7, 2012
    Assignees: Ammono Sp. z o.o., Nichia Corporation
    Inventors: Robert Dwilinski, Roman Doradzinski, Jerzy Garczynski, Leszek Sierzputowski, Yasuo Kanbara
  • Publication number: 20120025153
    Abstract: A silicon carbide single crystal includes nitrogen as a dopant and aluminum as a dopant. A nitrogen concentration is 2×1019 cm?3 or higher and a ratio of an aluminum concentration to the nitrogen concentration is within a range of 5% to 40%.
    Type: Application
    Filed: July 29, 2011
    Publication date: February 2, 2012
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Fusao Hirose, Jun Kojima, Kazutoshi Kojima, Tomohisa Kato, Ayumu Adachi, Koichi Nishikawa
  • Patent number: 8101020
    Abstract: A crystal growth apparatus comprises a reaction vessel holding a melt mixture containing an alkali metal and a group III metal, a gas supplying apparatus supplying a nitrogen source gas to a vessel space exposed to the melt mixture inside the reaction vessel, a heating unit heating the melt mixture to a crystal growth temperature, and a support unit supporting a seed crystal of a group III nitride crystal inside the melt mixture.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: January 24, 2012
    Assignee: Ricoh Company, Ltd.
    Inventors: Seiji Sarayama, Hirokazu Iwata, Akihiro Fuse
  • Patent number: 8092597
    Abstract: Method for producing a III-N (AlN, GaN, AlxGa(1-x)N) crystal by Vapor Phase Epitaxy (VPE), the method comprising: providing a reactor having: a growth zone for growing a III-N crystal; a substrate holder located in the growth zone that supports at least one substrate on which to grow the III-N crystal; a gas supply system that delivers growth material for growing the III-N crystal to the growth zone from an outlet of the gas supply system; and a heating element that controls temperature in the reactor; determining three growth sub-zones in the growth zone for which a crystal grown in the growth sub-zones has respectively a concave, flat or convex curvature; growing the III-N crystal on a substrate in a growth region for which the crystal has a by desired curvature.
    Type: Grant
    Filed: January 22, 2011
    Date of Patent: January 10, 2012
    Assignee: Freiberger Compound Materials GmbH
    Inventors: Vladimir A. Dmitriev, Yuri V. Melnik
  • Patent number: 8092596
    Abstract: Bulk GaN and AlGaN single crystal boules, preferably fabricated using a modified HVPE process, are provided. The single crystal boules typically have a volume in excess of 4 cubic centimeters with a minimum dimension of approximately 1 centimeter. If desired, the bulk material can be doped during growth, for example to achieve n-, i-, or p-type conductivity.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: January 10, 2012
    Assignee: Freiberger Compound Materials GmbH
    Inventors: Yuri V. Melnik, Vitali Soukhoveev, Vladimir Ivantsov, Katie Tsvetkov, Vladimir A Dmitriev
  • Publication number: 20120000414
    Abstract: In various embodiments, non-zero thermal gradients are formed within a growth chamber both substantially parallel and substantially perpendicular to the growth direction during formation of semiconductor crystals, where the ratio of the two thermal gradients (parallel to perpendicular) is less than 10, by, e.g., arrangement of thermal shields outside of the growth chamber.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 5, 2012
    Inventors: Robert T. Bondokov, Shailaja P. Rao, Shawn Robert Gibb, Leo J. Schowalter
  • Publication number: 20110308449
    Abstract: The present invention, which provides a crucible for producing single-crystal silicon carbide, and a production apparatus and a production method for single-crystal silicon carbide, which are capable of stably growing a single-crystal silicon carbide ingot good in crystallinity at high yield, is a crucible for producing single-crystal silicon carbide having a crucible vessel for holding silicon carbide raw material and a crucible cover for attaching a seed crystal and is adapted to sublimate a silicon carbide raw material in the crucible vessel to supply silicon carbide sublimation gas onto a seed crystal attached to the crucible cover and grow single-crystal silicon carbide on the seed crystal, which crucible for producing single-crystal silicon carbide is provided in the crucible vessel and the crucible cover with threaded portions to be screwed together and is provided with a sublimation gas discharge groove or grooves capable of regulating flow rate by relative rotation of the threaded portions; and is a
    Type: Application
    Filed: February 25, 2010
    Publication date: December 22, 2011
    Inventors: Masakazu Katsuno, Tatsuo Fujimoto, Hiroshi Tsuge, Masashi Nakabayashi
  • Patent number: 8080106
    Abstract: Provided are an epitaxial silicon wafer in which the warping is reduced by rendering a cross-sectional form of a silicon wafer for epitaxial growth into an adequate form as compared with the conventional one, and a production method thereof. An epitaxial silicon wafer comprising a silicon wafer for epitaxial growth and an epitaxial layer is characterized in that the epitaxial layer is formed on a silicon wafer for epitaxial growth having a cross-sectional form satisfying a relation of a given expression.
    Type: Grant
    Filed: July 20, 2009
    Date of Patent: December 20, 2011
    Assignee: Sumco Corporation
    Inventors: Takayuki Kihara, Kazushige Takaishi, Yasuyuki Hashimoto
  • Publication number: 20110290174
    Abstract: A method is disclosed for producing a high quality bulk single crystal of silicon carbide in a seeded growth system by reducing the separation between a silicon carbide seed crystal and a seed holder until the conductive heat transfer between the seed crystal and the seed holder dominates the radiative heat transfer between the seed crystal and the seed holder over substantially the entire seed crystal surface that is adjacent the seed holder.
    Type: Application
    Filed: July 12, 2011
    Publication date: December 1, 2011
    Applicant: NAVY, SECRETARY OF THE, UNITED STATES OF AMERICA
    Inventors: Robert Tyler Leonard, Adrian Powell, Valeri F. Tsvetkov
  • Patent number: 8052794
    Abstract: A method for locally controlling the stoichiometry of an epitaxially deposited layer on a semiconductor substrate is provided. The method includes directing a first reactant gas and a doping gas across a top surface of a semiconductor substrate and directing a drive gas and a second reactant gas against the substrate separately from the first reactant gas in a manner that rotates the substrate while introducing the second reactant gas at an edge of the substrate to control each reactant separately, thereby compensating and controlling depletion effects and improving doping uniformity in resulting epitaxial layers on the substrate.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: November 8, 2011
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Joseph John Sumakeris, Michael James Paisley, Michael John O'Loughlin
  • Publication number: 20110265709
    Abstract: Nitride semiconductor crystal manufacturing method according to which the following steps are carried out. To begin with, a crucible (101) for interiorly carrying source material (17) is prepared. Within the crucible (101), heating of the source material (17) sublimes the source material, and by the condensing of source-material gases caused, nitride semiconductor crystal is grown. In the preparation step, a crucible (101) made from a metal whose melting point is higher than that of the source material (17) is prepared.
    Type: Application
    Filed: January 13, 2010
    Publication date: November 3, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Issei Satoh, Michimasa Miyanaga, Yoshiyuki Yamamoto
  • Publication number: 20110266556
    Abstract: A method for controlled growth of silicon carbide and structures produced by the method are disclosed. A crystal of silicon carbide (SiC) can be grown by placing a sacrificial substrate in a growth zone with a source material. The source material may include a low-solubility impurity. SiC is then grown on the sacrificial substrate to condition the source material. The sacrificial substrate is then replaced with the final substrate, and SiC is grown on the final substrate. A single crystal of silicon carbide is produced, wherein the crystal of silicon carbide has substantially few micropipe defects. Such a crystal may also include a substantially uniform concentration of the low-solubility impurity, and may be used to make wafers and/or SiC die.
    Type: Application
    Filed: April 28, 2010
    Publication date: November 3, 2011
    Applicant: Cree, Inc.
    Inventors: Robert Tyler Leonard, Hudson M. Hobgood, William A. Thore
  • Patent number: 8043687
    Abstract: A method for forming a graphene layer is disclosed herein. The method includes establishing an insulating layer on a substrate such that at least one seed region, which exposes a surface of the substrate, is formed. A seed material in the seed region is exposed to a carbon-containing precursor gas, thereby initiating nucleation of the graphene layer on the seed material and enabling lateral growth of the graphene layer along at least a portion of a surface of the insulating layer.
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: October 25, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Theodore I. Kamins, R. Stanley Williams, Nathaniel Quitoriano
  • Publication number: 20110253034
    Abstract: In a crystal preparing device, a crucible holds a mixed molten metal containing alkali metal and group III metal. A container has a container space contacting the mixed molten metal and holds a molten alkali metal between the container space and an outside of the container, the molten alkali metal contacting the container space. A gas supply device supplies nitrogen gas to the container space. A heating device heats the crucible to a crystal growth temperature. The crystal preparing device is provided so that a vapor pressure of the alkali metal which evaporates from the molten alkali metal is substantially equal to a vapor pressure of the alkali metal which evaporates from the mixed molten metal.
    Type: Application
    Filed: June 28, 2011
    Publication date: October 20, 2011
    Inventors: Hirokazu Iwata, Seiji Sarayama, Akihiro Fuse
  • Patent number: 8038793
    Abstract: The invention provides an epitaxial growth method which is a single wafer processing epitaxial growth method by which at least a single crystal substrate is placed in a reaction chamber with an upper wall having a downward convexity and an epitaxial layer is deposited on the single crystal substrate by introducing raw material gas and carrier gas into the reaction chamber through a gas feed port, in which, after any one of the radius of curvature of the upper wall of the reaction chamber and a difference between an upper end of the gas feed port and a lower end of the upper wall of the reaction chamber in the height direction or both are adjusted in accordance with the flow rate of the carrier gas which is introduced into the reaction chamber through the gas feed port, an epitaxial layer is deposited on the single crystal substrate.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: October 18, 2011
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventor: Masato Ohnishi
  • Publication number: 20110239930
    Abstract: At a stage where the growth height of the silicon carbide single crystal 15 reaches 0.5 to several mm, the guide member 14 used at the initial growth stage is replaced with another guide member 14. This guide member 14 has a length and an angle ? to the growth axis L of the silicon carbide single crystal, which are selected in consideration of the desired diameter and a possible growth height. Then, under the same conditions as those at the initial growth stage, the silicon carbide single crystal 15 having the desired diameter is grown on the seed crystal 13.
    Type: Application
    Filed: October 14, 2009
    Publication date: October 6, 2011
    Applicant: BRIDGESTONE CORPORATION
    Inventors: Kenichiro Okuno, Takayuki Maruyama
  • Patent number: 8025728
    Abstract: A seed crystal is immersed in a melt containing a flux and a single crystal material in a growth vessel to produce a nitride single crystal on the seed crystal. A difference (TS-TB) of temperatures at a gas-liquid interface of the melt (TS) and at the lowermost part of the melt (TB) is set to 1° C. or larger and 8° C. or lower. Preferably, the substrate of seed crystal is vertically placed.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: September 27, 2011
    Assignees: NGK Insulators, Ltd., Osaka University
    Inventors: Mikiya Ichimura, Katsuhiro Imai, Chikashi Ihara, Takatomo Sasaki, Yusuke Mori, Fumio Kawamura
  • Patent number: 8025729
    Abstract: A device for heat treating (annealing) a III-V semiconductor wafer comprises at least one wafer support unit which is dimensioned such that a cover provided above the wafer surface is either spaced without any distance or with a distance of maximally about 2 mm to the wafer surface. A process for heat treating III-V semiconductor wafers having diameters larger than 100 mm and a dislocation density below 1×104 cm?2 is carried out in the device of the invention. SI GaAs wafers produced have an at least 25% increased characteristic fracture strength (Weibull distribution), an improved radial macroscopic and mesoscopic homogeneity and an improved quality of the mechano-chemically polished surface. The characteristic fracture strength is higher than 1900 MPa.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: September 27, 2011
    Assignee: Freiberger Compound Materials GmbH
    Inventors: Manfred Jurisch, Stefan Eichler, Thomas Bünger, Berndt Weinert, Frank Börner
  • Patent number: 8021968
    Abstract: Provided is a susceptor 13 for manufacturing an epitaxial wafer, comprising a mesh-like groove 13b on a mount face on which a silicon substrate W is to be mounted, wherein a coating H of silicon carbide is formed on the mount face, and the coating has a surface roughness of 1 ?m or more in centerline average roughness Ra and a maximum height of a protrusion 13p generated in forming the coating H of 5 ?m or less. Thus, defects such as warping and slip as well as adhesion of the silicon substrate to the susceptor are prevented.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: September 20, 2011
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Tsuyoshi Nishizawa, Yoshio Hagiwara, Hideki Hariya
  • Patent number: 8016943
    Abstract: A method for preparing film oxides deposited on a substrate with a resulting grain boundary junction that is atomistically straight. A bicrystal substrate having a straight grain boundary is prepared as a template. The Miller indices h1, k1, h2, k2 of the two grains of the substrate are chosen such that the misorientation angle of the film is equal to arctan k1/h1+arctan k2/h2. The film is grown on the substrate using a layer-by-layer growth mode.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: September 13, 2011
    Assignee: The Trustees of Columbia University in the City of New York
    Inventor: Siu-Wai Chan
  • Publication number: 20110217505
    Abstract: This invention describes Extreme low-defect Nitride Boules and associated methods of manufacture using low-defect seed templates or composite templates arranged in precise hexagonal or partial hexagonal crystal facets, and nearly exact lattice and thermal expansion coefficient matching of a low-defect nitride template or composite template with a thick nitride boule grown upon said template or composite template through alloying and doping. Reduction of the critical thickness of said template or composite template and said boule by thinning of template or composite template is also described.
    Type: Application
    Filed: February 5, 2011
    Publication date: September 8, 2011
    Applicant: TELEOLUX INC.
    Inventor: Michael Joseph Callahan
  • Publication number: 20110217224
    Abstract: A method of manufacturing SiC crystal includes the following steps. A manufacturing apparatus including a crucible having a main body portion and a heat insulating material covering the main body portion is prepared. In the main body portion, seed crystal is arranged opposed to a source material. The source material is heated to sublime and a source gas is precipitated on the seed crystal, to thereby grow SiC crystal. The step of preparing the manufacturing apparatus includes the step of arranging a heat radiation portion higher in thermal conductivity than the heat insulating material on a side of an outer surface of the main body portion on a side of seed crystal and covering the entire outer surface of the main body portion on the side of the seed crystal with the heat radiation portion or with the heat radiation portion and the heat insulating material.
    Type: Application
    Filed: March 1, 2011
    Publication date: September 8, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Taro NISHIGUCHI
  • Publication number: 20110214606
    Abstract: A crucible includes: a crucible body configured to hold the sublimation raw material; a lid configured to close an opening of the crucible body and provided with a mounting portion configured to support the seed crystal; and a guide member extending toward a sublimation raw material side from an outer peripheral portion of the mounting portion. The guide member has a cover portion configured to cover an outer peripheral portion of the seed crystal from the sublimation raw material side, the cover being protruded from a mounting unit side end portion provided on a mounting portion side.
    Type: Application
    Filed: March 1, 2011
    Publication date: September 8, 2011
    Applicant: BRIDGESTONE CORPORATION
    Inventor: Daisuke KONDO
  • Patent number: 8012257
    Abstract: Fabrication of doped and undoped stoichiometric polycrystalline AlN ceramics with high purity is accomplished by, for example, reacting Al pellets with nitrogen gas. Such polycrystalline AlN ceramics may be utilized in the fabrication of high purity AlN single crystals, which may be annealed to enhance a conductivity thereof.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: September 6, 2011
    Assignee: Crystal IS, Inc.
    Inventors: Kenneth E. Morgan, Leo J. Schowalter, Glen A. Slack
  • Patent number: 8012536
    Abstract: Methods of forming metal-containing layers are provided where heteroleptic organometallic compounds containing at least one formamidinate ligand are conveyed in a gaseous form to a reactor; and films comprising a metal are deposited on a substrate. These heteroleptic organometallic compounds have improved properties over conventional vapor deposition precursors. Such compounds are suitable for use as vapor deposition precursors including direct liquid injection. Also provided are methods of depositing thin films, such as by ALD and CVD, using such compounds or their solutions in organic solvents.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: September 6, 2011
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Deodatta Vinayak Shenai-Khatkhate, Huazhi Li, Qing Min Wang
  • Patent number: 8003192
    Abstract: A nanodevice including a nanorod and a method for manufacturing the same is provided. The nanodevice according to an embodiment of the present invention includes i) a substrate; ii) at least one crystal that is located on the substrate and includes a plurality of side surfaces forming an angle with each other; and iii) at least one nanorod that is located on the crystal and extends along a direction that is substantially perpendicular to a surface of the substrate.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: August 23, 2011
    Assignee: LG Display Co., Ltd.
    Inventors: Young-Joon Hong, Gyu-Chul Yi
  • Patent number: 8002892
    Abstract: Affords a Group-III nitride crystal substrate that is of low dislocation density and is inexpensive to manufacture, a method of manufacturing such a substrate, and Group-III nitride semiconductor devices that incorporate the Group-III nitride crystal substrate. The Group-III nitride crystal substrate manufacturing method includes: a step of growing, by liquid-phase epitaxy, a first Group-III nitride crystal (2) onto a base substrate (1); and a step of growing, by vapor-phase epitaxy, a second Group-III nitride crystal (3) onto the first Group-III nitride crystal (2). The Group-III nitride crystal substrate, produced by such a manufacturing method, has a dislocation density of 1×107 dislocations/cm2.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: August 23, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Ryu Hirota, Seiji Nakahata, Masaki Ueno
  • Patent number: 7998272
    Abstract: A method of fabricating a plurality of freestanding GaN wafers includes mounting a GaN substrate in a reactor, forming a GaN crystal growth layer on the GaN substrate through crystal growth, performing surface processing of the GaN crystal growth layer to form a GaN porous layer having a predetermined thickness on the GaN crystal growth layer, repeating the forming of the GaN crystal growth layer and the forming of the GaN porous layer a plurality of times to form a stack of alternating GaN crystal growth layers and GaN porous layers on the GaN substrate, and cooling the stack such that the GaN layers self-separate to form the freestanding GaN wafers. The entire process of forming a GaN porous layer and a thick GaN layer is performed in-situ in a single reactor. The method is very simplified compared to the prior art. In this way, the entire process is performed in one chamber, and in particular, GaN surface processing and growth proceed using an HVPE process gas such that costs are greatly reduced.
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: August 16, 2011
    Assignee: Samsung Corning Precision Materials, Co., Ltd.
    Inventor: In-Jae Song
  • Patent number: 7994027
    Abstract: The present invention grows nanostructures using a microwave heating-based sublimation-sandwich SiC polytype growth method comprising: creating a sandwich cell by placing a source wafer parallel to a substrate wafer, leaving a small gap between the source wafer and the substrate wafer; placing a microwave heating head around the sandwich cell to selectively heat the source wafer to a source wafer temperature and the substrate wafer to a substrate wafer temperature; creating a temperature gradient between the source wafer temperature and the substrate wafer temperature; sublimating Si- and C-containing species from the source wafer, producing Si- and C-containing vapor species; converting the Si- and C-containing vapor species into liquid metallic alloy nanodroplets by allowing the metalized substrate wafer to absorb the Si- and C-containing vapor species; and growing nanostructures on the substrate wafer once the alloy droplets reach a saturation point for SiC.
    Type: Grant
    Filed: May 11, 2009
    Date of Patent: August 9, 2011
    Assignees: George Mason Intellectual Properties, Inc., NIST
    Inventors: Yonglai Tian, Rao V. Mulpuri, Siddharth G. Sundaresan, Albert V. Davydov