Forming From Vapor Or Gaseous State (e.g., Vpe, Sublimation) Patents (Class 117/84)
  • Publication number: 20140230721
    Abstract: An apparatus for fabricating an ingot according to the embodiment comprises a crucible for receiving a raw material, wherein the raw material comprises first powder and second powders having grain sizes different from each other. A method for providing a raw material according to the embodiment comprises preparing a crucible including a central area and an edge area which surrounds the central area; filling a first powder in the central area; and filling a second powder in the edge area, the second powder having a grain size different from a grain size of the first powder.
    Type: Application
    Filed: August 16, 2012
    Publication date: August 21, 2014
    Applicant: LG INNOTEK CO., LTD.
    Inventors: Ji Hye Kim, Kyoung Seok Min, Dong Geun Shin
  • Publication number: 20140220298
    Abstract: A method of forming an SiC crystal, the method including: placing a SiC seed in a growth vessel, heating the growth vessel, and evacuating the growth vessel, wherein the seed is levitated as a result of a temperature and pressure gradient, and gas flows from a growth face of the seed, around the edge of the seed, and into a volume behind the seed, which is pumped by a vacuum system.
    Type: Application
    Filed: August 9, 2013
    Publication date: August 7, 2014
    Applicant: Dow Corning Corporation
    Inventor: Mark Loboda
  • Publication number: 20140216330
    Abstract: An apparatus for fabricating an ingot according to the embodiment comprises a crucible for receiving a raw material; and a filter part for selectively filtering a specific component in the crucible, wherein the filter part comprises a polymer.
    Type: Application
    Filed: June 20, 2012
    Publication date: August 7, 2014
    Applicant: LG INNOTEK CO., LTD.
    Inventors: Dong Geun Shin, Chang Hyun Son
  • Patent number: 8795431
    Abstract: A gallium nitride layer is produced using a seed crystal substrate by flux method. The seed crystal substrate 8A includes a supporting body 1, a plurality of seed crystal layers 4A each comprising gallium nitride single crystal and separated from one another, a low temperature buffer layer 2 provided between the seed crystal layers 4A and the supporting body and made of a nitride of a group III metal element, and an exposed layer 3 exposed to spaces between the adjacent seed crystal layers 4A and made of aluminum nitride single crystal or aluminum gallium nitride single crystal. The gallium nitride layer is grown on the seed crystal layers by flux method.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: August 5, 2014
    Assignee: NGK Insulators, Ltd.
    Inventors: Katsuhiro Imai, Makota Iwai, Takanao Shimodaira, Masahiro Sakai, Shuhei Higashihara, Takayuki Hirao
  • Patent number: 8795430
    Abstract: A method for improving the growth morphology of (Ga,Al,In,B)N thin films on nonpolar or semipolar (Ga,Al,In,B)N substrates, wherein a (Ga,Al,In,B)N thin film is grown directly on a nonpolar or semipolar (Ga,Al,In,B)N substrate or template and a portion of the carrier gas used during growth is comprised of an inert gas. Nonpolar or semipolar nitride LEDs and diode lasers may be grown on the smooth (Ga,Al,In,B)N thin films grown by the present invention.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: August 5, 2014
    Assignee: The Regents of the University of California
    Inventors: Robert M. Farrell, Michael Iza, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 8790462
    Abstract: A nanoengineered structure comprising an array of more than about 1000 nanowhiskers on a substrate in a predetermined spatial configuration, for use for example as a photonic band gap array, wherein each nanowhisker is sited within a distance from a predetermined site not greater than about 20% of its distance from its nearest neighbour. To produce the array, an array of masses of a catalytic material are positioned on the surface, heat is applied and materials in gaseous form are introduced such as to create a catalytic seed particle from each mass, and to grow, from the catalytic seed particle, epitaxially, a nanowhisker of a predetermined material, and wherein each mass upon melting, retains approximately the same interface with the substrate surface such that forces causing the mass to migrate across said surface are less than a holding force across a wetted interface on the substrate surface.
    Type: Grant
    Filed: October 6, 2009
    Date of Patent: July 29, 2014
    Assignee: Qunano AB
    Inventors: Lars Ivar Samuelson, Bjorn Jonas Ohlsson, Thomas M. I. Martensson
  • Patent number: 8790461
    Abstract: The invention provides a method for manufacturing the silicon carbide single crystal wafer capable of improving the utilization ratio of the bulk silicon carbide single crystal, capable of improving characteristics of the element and capable of improving cleavability, and the silicon carbide single crystal wafer obtained by the manufacturing method. An ?(hexagonal)-silicon carbide single crystal wafer which has a flat homoepitaxial growth surface with a surface roughness of 2 nm or less and which has an off-angle from the (0001)c plane of 0.4° or less.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: July 29, 2014
    Assignee: Showa Denko K.K.
    Inventors: Takayuki Maruyama, Toshimi Chiba
  • Patent number: 8785946
    Abstract: A high quality single crystal wafer of SiC is disclosed having a diameter of at least about 3 inches and a 1 c screw dislocation density from about 500 cm?2 to about 2000 cm?2.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: July 22, 2014
    Assignee: Cree, Inc.
    Inventors: Adrian Powell, Mark Brady, Stephan G. Mueller, Valeri F. Tsvetkov, Robert T. Leonard
  • Patent number: 8778078
    Abstract: A process for producing a doped III-N bulk crystal, wherein III denotes at least one element of the main group III of the periodic system, selected from Al, Ga and In, wherein the doped crystalline III-N layer or the doped III-N bulk crystal is deposited on a substrate or template in a reactor, and wherein the feeding of at least one dopant into the reactor is carried out in admixture with at least one group III material. In this manner, III-N bulk crystals and III-N single crystal substrates separated therefrom can be obtained with a very homogeneous distribution of dopants in the growth direction as well as in the growth plane perpendicular thereto, a very homogeneous distribution of charge carriers and/or of the specific electric resistivity in the growth direction as well as in the growth plane perpendicular thereto, and a very good crystal quality.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: July 15, 2014
    Assignee: Freiberger Compound Materials GmbH
    Inventors: Ferdinand Scholz, Peter Brückner, Frank Habel, Gunnar Leibiger
  • Patent number: 8771416
    Abstract: A substrate processing apparatus comprises: a reaction chamber to process a substrate; a heating target object disposed in the reaction chamber to surround at least a region where the substrate is disposed, the heating target object having a cylindrical shape with a closed end; an insulator disposed between the reaction chamber and the heating target object to surround the heating target object, the insulator having a cylindrical shape with a closed end facing the closed end of the heating target object; an induction heating unit disposed outside the reaction chamber to surround at least the region where the substrate is disposed; a first gas supply system to supply at least a source gas into the reaction chamber; and a controller to control the first gas supply system so that the first gas supply system supplies at least the source gas into the reaction chamber for processing the substrate.
    Type: Grant
    Filed: June 24, 2010
    Date of Patent: July 8, 2014
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Shuhei Saido, Takatomo Yamaguchi, Kenji Shirako
  • Patent number: 8771552
    Abstract: A group III nitride crystal substrate is provided in which a uniform distortion at a surface layer of the crystal substrate represented by a value of |d1 ?d2 |/d2 obtained from a plane spacing d1 at the X-ray penetration depth of 0.3 ?m and a plane spacing d2 at the X-ray penetration depth of 5 ?m is equal to or lower than 1.9 ×10?3, and the main surface has a plane orientation inclined in the <10-10> direction at an angle equal to or greater than 10° and equal to or smaller than 80° with respect to one of (0001) and (000-1) planes of the crystal substrate. A group III nitride crystal substrate suitable for manufacturing a light emitting device with a blue shift of an emission suppressed, an epilayer-containing group III nitride crystal substrate, a semiconductor device and a method of manufacturing the same can thereby be provided.
    Type: Grant
    Filed: July 16, 2010
    Date of Patent: July 8, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Ishibashi, Yusuke Yoshizumi
  • Publication number: 20140165905
    Abstract: Disclosed are an apparatus for fabricating an ingot and a method for fabricating the ingot. The apparatus comprises a crucible to receive a source material, and a guide member over the source material. The guide member comprises a source material feeding part.
    Type: Application
    Filed: July 26, 2012
    Publication date: June 19, 2014
    Applicant: LG INNOTEK CO., LTD.
    Inventors: Bum Sup Kim, Chang Hyun Son
  • Patent number: 8753716
    Abstract: A method includes depositing material on a heated substrate in a deposition reactor by sequential self-saturating surface reactions, controlling feeding of precursor vapor from a precursor source to a reaction chamber including the reactor containing the substrate with a first pulsing valve embedded into the precursor source, and conveying inactive gas to a precursor cartridge attached to the precursor source to raise pressure of the precursor cartridge and to ease subsequent flow of a mixture of precursor vapor and inactive gas towards the reaction chamber.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: June 17, 2014
    Assignee: Picosun Oy
    Inventors: Pekka J. Soininen, Sven Lindfors
  • Publication number: 20140158042
    Abstract: An apparatus for fabricating an ingot according to the embodiment comprises a crucible for receiving a raw material; and a seed holder for fixing a seed disposed over the raw material, wherein a buffer layer is placed between the seed holder and the seed.
    Type: Application
    Filed: July 26, 2012
    Publication date: June 12, 2014
    Applicant: LG INNOTEK CO., LTD.
    Inventors: Seon Heo, Ji Hye Kim
  • Patent number: 8747553
    Abstract: A method of growing a p-type thin film of ?-Ga2O3 includes preparing a substrate including a ?-Ga2O3 single crystal, and growing a p-type thin film of ?-Ga2O3 on the substrate. The p-type thin film is grown in a manner that Ga in the thin film is replaced by a p-type dopant selected from H, Li, Na, K, Rb, Cs, Fr, Be, Mg, Ca, Sr, Ba, Ra, Mn, Fe, Co, Ni, Pd, Cu, Ag, Au, Zn, Cd, Hg, Tl, and Pb.
    Type: Grant
    Filed: August 13, 2012
    Date of Patent: June 10, 2014
    Assignee: Waseda University
    Inventors: Noboru Ichinose, Kiyoshi Shimamura, Kazuo Aoki, Encarnacion Antonia Garcia Villora
  • Patent number: 8747982
    Abstract: A method is used for producing an SiC volume monocrystal by sublimation growth. Before the beginning of growth, an SiC seed crystal is arranged in a crystal growth region of a growth crucible and powdery SiC source material is introduced into an SiC storage region of the growth crucible. During the growth, by sublimation of the powdery SiC source material and by transport of the sublimated gaseous components into the crystal growth region, an SiC growth gas phase is produced there. The SiC volume monocrystal having a central center longitudinal axis grows by deposition from the SiC growth gas phase on the SiC seed crystal. The SiC seed crystal is heated substantially without bending during a heating phase before the beginning of growth, so that an SiC crystal structure with a substantially homogeneous course of lattice planes is provided in the SiC seed crystal.
    Type: Grant
    Filed: December 28, 2011
    Date of Patent: June 10, 2014
    Assignee: SiCrystal Aktiengesellschaft
    Inventors: Thomas Straubinger, Michael Vogel, Andreas Wohlfart
  • Patent number: 8741413
    Abstract: A method and system of forming large-diameter SiC single crystals suitable for fabricating high crystal quality SiC substrates of 100, 125, 150 and 200 mm in diameter are described. The SiC single crystals are grown by a seeded sublimation technique in the presence of a shallow radial temperature gradient. During SiC sublimation growth, a flux of SiC bearing vapors filtered from carbon particulates is substantially restricted to a central area of the surface of the seed crystal by a separation plate disposed between the seed crystal and a source of the SiC bearing vapors. The separation plate includes a first, substantially vapor-permeable part surrounded by a second, substantially non vapor-permeable part. The grown crystals have a flat or slightly convex growth interface. Large-diameter SiC wafers fabricated from the grown crystals exhibit low lattice curvature and low densities of crystal defects, such as stacking faults, inclusions, micropipes and dislocations.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: June 3, 2014
    Assignee: II-VI Incorporated
    Inventors: Ilya Zwieback, Thomas E. Anderson, Andrew E. Souzis, Gary E. Ruland, Avinash K. Gupta, Varatharajan Rengarajan, Ping Wu, Xueping Xu
  • Patent number: 8728235
    Abstract: A manufacturing method for three-dimensional GaN epitaxial structure comprises a disposing step, in which a substrate of LiAlO2 and a source metal of Ga are disposed inside an vacuum chamber. An exposing step is importing N ions in plasma state and generated by a nitrogen source into the chamber. A heating step is heating up the source metal to generate Ga vapor. A growing step is forming a three-dimensional GaN epitaxial structure with hexagonal micropyramid or hexagonal rod having a broadened disk-like surface on the substrate by reaction between the Ga vapor and the plasma state of N ions.
    Type: Grant
    Filed: September 28, 2009
    Date of Patent: May 20, 2014
    Assignee: National Sun Yat-Sen University
    Inventors: I-Kai Lo, Chia-Ho Hsieh, Yu-Chi Hsu, Wen-Yuan Pang, Ming-Chi Chou
  • Patent number: 8728237
    Abstract: A method for growing nitride semiconductor crystals contains: growing a first semiconductor layer containing InxGa1-xN (0<x?1) on a substrate at a first growth temperature, using a first carrier gas containing an inert gas; growing a second semiconductor layer containing InyGa1-yN (0?y<1, y<x) on the first semiconductor layer at a second growth temperature higher than the first growth temperature, using a second carrier gas containing the inert gas and H2 gas, an amount of the H2 gas being smaller than an amount of the inert gas; and growing a third semiconductor layer containing InzGa1-zN (0?z<1, z<x) on the second semiconductor layer at the second growth temperature, using a third carrier gas containing the inert gas and H2 gas, an amount of the H2 gas in the third carrier gas being a smaller than the amount of H2 gas in the second carrier gas.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: May 20, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Toshiki Hikosaka, Yoshiyuki Harada, Koichi Tachibana, Shinya Nunoue
  • Patent number: 8728236
    Abstract: Large area single crystal III-V nitride material having an area of at least 2 cm2, having a uniformly low dislocation density not exceeding 3×106 dislocations per cm2 of growth surface area, and including a plurality of distinct regions having elevated impurity concentration, wherein each distinct region has at least one dimension greater than 50 microns, is disclosed. Such material can be formed on a substrate by a process including (i) a first phase of growing the III-V nitride material on the substrate under pitted growth conditions, e.g., forming pits over at least 50% of the growth surface of the III-V nitride material, wherein the pit density on the growth surface is at least 102 pits/cm2 of the growth surface, and (ii) a second phase of growing the III-V nitride material under pit-filling conditions.
    Type: Grant
    Filed: January 17, 2011
    Date of Patent: May 20, 2014
    Assignee: Cree, Inc.
    Inventors: Xueping Xu, Robert P. Vaudo
  • Patent number: 8722456
    Abstract: The embodiments disclosed a method for preparing a p-type ZnO-based material, the method conducted in a metal organic chemical vapor deposition (MOCVD) system, including cleaning a surface of a substrate and placing the substrate in a growth chamber of the metal organic chemical vapor deposition system, vacuumizing the growth chamber to 10?3-10?4 Pa, heating the substrate to 200-700° C., introducing an organic Zn source, an organic Na source and oxygen, and depositing the p-type ZnO-based material on the substrate. Na-doping is capable of greatly improving hole concentration and p-type stability in the ZnO-based material, and use of Na-doping technology in combination with MOCVD equipment provides a p-type ZnO-based material having excellent crystal quality and electrical and optical qualities.
    Type: Grant
    Filed: September 25, 2010
    Date of Patent: May 13, 2014
    Assignee: Hangzhou Bluelight Opto-Electronic Material Co., Ltd.
    Inventors: Zhizhen Ye, Yangfan Lu, Kewei Wu, Jingyun Huang, Qikuo Ye
  • Publication number: 20140119981
    Abstract: A Bi1-xSbx thin film is provided that includes a Dirac-cone with different degrees of anisotropy in their electronic band structure by controlling the stoichiometry, film thickness, and growth orientation of the thin film, so as to result in a consistent inverse-effective mass tensor including non-parabolic or linear dispersion relations.
    Type: Application
    Filed: October 25, 2012
    Publication date: May 1, 2014
    Applicant: Massachusetts Institute of Technology
    Inventors: Shuang Tang, Mildred S. Dresselhaus
  • Patent number: 8709371
    Abstract: A method of growing high-quality, group-III nitride, bulk single crystals. The group III-nitride bulk crystal is grown in an autoclave in supercritical ammonia using a source material or nutrient that is a group III-nitride polycrystals or group-III metal having a grain size of at least 10 microns or more and a seed crystal that is a group-III nitride single crystal. The group III-nitride polycrystals may be recycled from previous ammonothermal process after annealing in reducing gas at more then 600° C. The autoclave may include an internal chamber that is filled with ammonia, wherein the ammonia is released from the internal chamber into the autoclave when the ammonia attains a supercritical state after the heating of the autoclave, such that convection of the supercritical ammonia transfers source materials and deposits the transferred source materials onto seed crystals, but undissolved particles of the source materials are prevented from being transferred and deposited on the seed crystals.
    Type: Grant
    Filed: July 8, 2005
    Date of Patent: April 29, 2014
    Assignees: The Regents of the University of California, Japan Science and Technology Agency
    Inventors: Kenji Fujito, Tadao Hashimoto, Shuji Nakamura
  • Patent number: 8709156
    Abstract: Epitaxially coated silicon wafers are produced by placing a wafer polished on its front side on a susceptor in an epitaxy reactor, first pretreating under a hydrogen atmosphere and in a second and a third step with addition of an etching medium to the hydrogen atmosphere, and subsequently providing an epitaxial layer, wherein during the first and second steps the hydrogen flow rate is 20-100 slm, during the second and third steps the flow rate of the etching medium is 0.5-1.5 slm, during the second step the average temperature in the reactor chamber is 950-1050° C., and the power of heating elements above and below the susceptor is regulated such that there is a temperature difference of 5-30° C. between a radially symmetrical region encompassing the central axis of and a part lying outside this region; and during the third step the hydrogen flow rate is reduced to 0.5-10 slm. In a second method, during the third pretreatment step the flow rate of the etching medium is increased to 1.
    Type: Grant
    Filed: April 23, 2010
    Date of Patent: April 29, 2014
    Assignee: Siltronic AG
    Inventor: Joerg Haberecht
  • Patent number: 8704239
    Abstract: Disclosed is a novel method for group III polarity growth on a sapphire substrate. Specifically disclosed is a method for producing a laminate wherein a group III nitride single crystal layer is laminated on a sapphire substrate by an MOCVD method.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: April 22, 2014
    Assignee: Tokuyama Corporation
    Inventors: Toru Kinoshita, Kazuya Takada
  • Patent number: 8691012
    Abstract: A method of manufacturing zinc oxide nanowires. A metal seed layer is formed on a substrate. The metal seed layer is thermally oxidized to form metal oxide crystals. Zinc oxide nanowires are grown on the metal oxide crystals serving as seeds for growth. The zinc oxide nanowires are aligned in one direction with respect to the surface of the substrate.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: April 8, 2014
    Assignee: Samsung Electronics Co. Ltd.
    Inventors: Seung Nam Cha, Jae Eun Jang, Byong Gwon Song
  • Publication number: 20140091325
    Abstract: When an SiC single crystal having a large diameter of a {0001} plane is produced by repeating a-plane growth, the a-plane growth of the SiC single crystal is carried out so that a ratio Sfacet (=S1×100/S2) of an area (S1) of a Si-plane side facet region to a total area (S2) of the growth plane is maintained at 20% or less.
    Type: Application
    Filed: June 4, 2012
    Publication date: April 3, 2014
    Applicants: KABUSHIKI KAISHA TOYOTA CHUO KENKYUSHO, SHOWA DENKO K.K., DENSO CORPORATION
    Inventors: Itaru Gunjishima, Keisuke Shigetoh, Yasushi Urakami, Masanori Yamada, Ayumu Adachi, Masakazu Kobayashi
  • Patent number: 8685165
    Abstract: Atomic layer deposition (ALD) type processes for producing titanium containing oxide thin films comprise feeding into a reaction space vapor phase pulses of titanium alkoxide as a titanium source material and at least one oxygen source material, such as ozone, capable of forming an oxide with the titanium source material. In preferred embodiments the titanium alkoxide is titanium methoxide.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: April 1, 2014
    Assignee: ASM International N.V.
    Inventors: Antti Rahtu, Raija Matero, Markku Leskela, Mikko Ritala, Timo Hatanpaa, Timo Hanninen, Marko Vehkamaki
  • Patent number: 8673254
    Abstract: Provided is a monocrystalline silicon carbide ingot containing a dopant element, wherein a maximum concentration of the dopant element is less than 5×1017 atoms/cm3 and the maximum concentration is 50 times or less than that of a minimum concentration of the dopant element. Also provided is a monocrystalline silicon carbide wafer made by cutting and polishing the monocrystalline silicon carbide ingot, wherein a electric resistivity at room temperature of the wafer is 5×103 ?cm or more. Further provided is a method for manufacturing the monocrystalline silicon carbide including growing the monocrystalline silicon carbide on a seed crystal from a sublimation material by a sublimation method. The sublimation material includes a solid material containing a dopant element, and the specific surface of the solid material containing the dopant element is 0.5 m2/g or less.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: March 18, 2014
    Assignee: Nippon Steel & Sumitomo Metal Corporation
    Inventors: Masashi Nakabayashi, Tatsuo Fujimoto, Mitsuru Sawamura, Noboru Ohtani
  • Patent number: 8673074
    Abstract: A method of growing planar non-polar m-plane or semi-polar III-Nitride material, such as an m-plane gallium nitride (GaN) epitaxial layer, wherein the III-Nitride material is grown on a suitable substrate, such as an m-plane sapphire substrate, using hydride vapor phase epitaxy (HVPE). The method includes in-situ pretreatment of the substrate at elevated temperatures in an atmosphere of ammonia and argon, growing an intermediate layer such as an aluminum nitride (AlN) or aluminum-gallium nitride (AlGaN) on the annealed substrate, and growing the non-polar m-plane III-Nitride epitaxial layer on the intermediate layer using HVPE.
    Type: Grant
    Filed: July 15, 2009
    Date of Patent: March 18, 2014
    Assignee: Ostendo Technologies, Inc.
    Inventors: Alexander Usikov, Alexander Syrkin, Robert G. W. Brown, Hussein S. El-Ghoroury, Philippe Spiberg, Vladimir Ivantsov, Oleg Kovalenkov, Lisa Shapovalova
  • Patent number: 8663389
    Abstract: A method and apparatus for depositing III-V material is provided. The apparatus includes a reactor partially enclosed by a selectively permeable membrane 12. A means is provided for generating source vapors, such as a vapor-phase halide of a group III element (IUPAC group 13) within the reactor volume 10, and an additional means is also provided for introducing a vapor-phase hydride of a group V element (IUPAC group 15) into the volume 10. The reaction of the group III halide and the group V hydride on a temperature-controlled substrate 18 within the reactor volume 10 produces crystalline III-V material and hydrogen gas. The hydrogen is preferentially removed from the reactor through the selectively permeable membrane 12, thus avoiding pressure buildup and reaction imbalance. Other gases within the reactor are unable to pass through the selectively permeable membrane.
    Type: Grant
    Filed: May 21, 2011
    Date of Patent: March 4, 2014
    Inventor: Andrew Peter Clarke
  • Publication number: 20140048014
    Abstract: An apparatus for crystal growth including a source chamber configured to contain a source material, a growth chamber, a passage for transport of vapour from the source chamber to the growth chamber, and a support provided within the growth chamber that is configured to support a seed crystal. The coefficient of thermal expansion of the support is greater than the coefficient of thermal expansion of the growth chamber.
    Type: Application
    Filed: March 29, 2012
    Publication date: February 20, 2014
    Applicant: Kromek Limited
    Inventors: Max Robinson, John Tomlinson Mullins
  • Patent number: 8652256
    Abstract: A manufacturing apparatus of polycrystalline silicon products polycrystalline silicon by depositing on a surface of a silicon seed rod by supplying raw-material gas to the heated silicon seed rod provided vertically in a reactor, includes: an electrode which holds the silicon seed rod and is made of carbon; an electrode holder which holds the electrode, and cooled by coolant medium flowing therein, wherein the electrode includes: a seed rod holding member which holds the silicon seed rod; a heat cap which is provided between the seed rod holding member and the electrode holder; and a cap protector having a ring-like plate shape, which covers an upper surface of the heat cap, and in which a through hole penetrating the lower-end portion of the seed rod holding member is formed.
    Type: Grant
    Filed: September 8, 2009
    Date of Patent: February 18, 2014
    Assignee: Mitsubishi Materials Corporation
    Inventors: Toshihide Endoh, Masayuki Tebakari, Toshiyuki Ishii, Masaaki Sakaguchi
  • Patent number: 8652255
    Abstract: A method of: flowing a silicon source gas, a carbon source gas, and a carrier gas into a growth chamber under growth conditions to epitaxial grow silicon carbide on a wafer in the growth chamber; stopping or reducing the flow of the silicon source gas to interrupt the silicon carbide growth and maintaining the flow of the carrier gas while maintaining an elevated temperature in the growth chamber for a period of time; and resuming the flow of the silicon source gas to reinitiate silicon carbide growth. The wafer remains in the growth chamber throughout the method.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: February 18, 2014
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Robert E Stahlbush, Brenda L VanMil, Kok-Keong Lew, Rachael L Myers-Ward, David Kurt Gaskill, Charles R. Eddy, Jr.
  • Patent number: 8647915
    Abstract: A hetero-junction device and fabrication method in which phase-separated n-type and p-type semiconductor pillars define vertically-oriented p-n junctions extending above a substrate. Semiconductor materials are selected for the p-type and n-type pillars that are thermodynamically stable and substantially insoluble in one another. An epitaxial deposition process is employed to form the pillars on a nucleation layer and the mutual insolubility drives phase separation of the materials. During the epitaxial deposition process, the orientation is such that the nucleation layer initiates propagation of vertical columns resulting in a substantially ordered, three-dimensional structure throughout the deposited material.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: February 11, 2014
    Assignees: UT-Battelle, LLC, University of Tennessee Research Foundation
    Inventors: Tolga Aytug, David K. Christen, Mariappan Parans Paranthaman, Özgur Polat
  • Patent number: 8641821
    Abstract: Provided is a manufacturing device of an aluminum nitride single crystal including a crucible. An aluminum nitride raw material and a seed crystal are stored in an inner portion of the crucible. The seed crystal is placed so as to face the aluminum nitride raw material. The crucible includes an inner crucible and an outer crucible. The inner crucible stores the aluminum nitride raw material and the seed crystal inside the inner crucible. The inner crucible is also corrosion resistant to a sublimation gas of the aluminum nitride raw material. The inner crucible includes either, a single body of a metal having an ion radius larger than an ion radius of an aluminum, or includes a nitride of the metal. The outer crucible includes a boron nitride. The outer crucible covers the inner crucible.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: February 4, 2014
    Assignees: National Institute of Advanced Industrial Science and Technology, Fujikura Ltd.
    Inventors: Tomohisa Katou, Ichirou Nagai, Tomonori Miura, Hiroyuki Kamata
  • Patent number: 8642449
    Abstract: A silicon wafer which has DZ layers formed on both sides thereof by heat treatment in an atmosphere of reducing gas (such as hydrogen) or rare gas (such as argon) with a specific temperature profile for heating, holding, and cooling, and which also has a gettering site of BMD in the bulk inside the DZ layer. A silicon wafer which has a silicon epitaxial layer formed on one side thereof. The DZ layer and the silicon epitaxial layer contain dissolved oxygen introduced into their surface parts, with the concentration and distribution of dissolved oxygen properly controlled. Introduction of oxygen into the surface part is accomplished by heat treatment and ensuing rapid cooling in an atmosphere of oxygen-containing gas.
    Type: Grant
    Filed: November 5, 2010
    Date of Patent: February 4, 2014
    Assignee: Globalwafers Japan Co., Ltd.
    Inventors: Takashi Watanabe, Ryuji Takeda
  • Patent number: 8636845
    Abstract: Methods and compositions for depositing a metal containing film on a substrate are disclosed. A reactor and at least one substrate disposed in the reactor are provided. A metal containing precursor is provided and introduced into the reactor, which is maintained at a temperature of at least 100° C. A metal is deposited on to the substrate through a deposition process to form a thin film on the substrate.
    Type: Grant
    Filed: June 25, 2009
    Date of Patent: January 28, 2014
    Assignee: L'Air Liquide, Société Anonyme pour l'Etude et l'Exploitation des Procédés Georges Claude
    Inventors: Julien Gatineau, Kazutaka Yanagita, Shingo Okubo
  • Patent number: 8636843
    Abstract: Heterogeneous nanowires having a core-shell structure consisting of single-crystal apatite as the core and graphitic layers as the shell and a synthesis method thereof are provided. More specifically, provided is a method capable of producing large amounts of heterogeneous nanowires, composed of graphitic shells and apatite cores, in a reproducible manner, by preparing a substrate including an element corresponding to X of X6(YO4)3Z which is a chemical formula for apatite, adding to the substrate a gaseous source containing an element corresponding to Y of the chemical formula, adding thereto a gaseous carbon source, and allowing these reactants to react under optimized synthesis conditions using chemical vapor deposition (CVD), and to a method capable of freely controlling the structure and size of the heterogeneous nanowires and also to heterogeneous nanowires synthesized thereby.
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: January 28, 2014
    Assignee: Korea Institute of Energy Research
    Inventors: Nam Jo Jeong, Jung Hoon Lee
  • Patent number: 8636844
    Abstract: A method of forming a template on a silicon substrate includes epitaxially growing a template of single crystal ternary rare earth oxide on a silicon substrate and epitaxially growing a single crystal semiconductor active layer on the template. The active layer has either a cubic or a hexagonal crystal structure. During the epitaxial growth of the template, a partial pressure of oxygen is selected and a ratio of metals included in the ternary rare earth oxide is selected to match crystal spacing and structure of the template at a lower interface to the substrate and to match crystal spacing and structure of the template at an upper interface to crystal spacing and structure of the semiconductor active layer. A high oxygen partial pressure during growth of the template produces a stabilized cubic crystal structure and a low oxygen partial pressure produces a predominant peak with a hexagonal crystal structure.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: January 28, 2014
    Assignee: Translucent, Inc.
    Inventors: Rytis Dargis, Andrew Clark, Michael Lebby
  • Patent number: 8632853
    Abstract: Methods for deposition of elemental metal films on surfaces using metal coordination complexes comprising nitrogen-containing ligands are provided. Also provided are nitrogen-containing ligands useful in the methods of the invention and metal coordination complexes comprising these ligands.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: January 21, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Jeffrey W. Anthis, David Thompson
  • Patent number: 8624266
    Abstract: A main surface of a silicon carbide substrate is inclined by an off angle in an off direction from {0001} plane of a hexagonal crystal. The main surface has such a characteristic that, among emitting regions emitting photoluminescent light having a wavelength exceeding 650 nm of the main surface caused by excitation light having higher energy than band-gap of the hexagonal silicon carbide, the number of those having a dimension of at most 15 ?m in a direction perpendicular to the off direction and a dimension in a direction parallel to the off direction not larger than a value obtained by dividing penetration length of the excitation light in the hexagonal silicon carbide by a tangent of the off angle is at most 1×104 per 1 cm2. Accordingly, reverse leakage current can be reduced.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: January 7, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shin Harada, Tsubasa Honke
  • Patent number: 8624267
    Abstract: A high quality single crystal wafer of SiC is disclosed having a diameter of at least about 3 inches and a 1 c screw dislocation density from about 500 cm?2 to about 2000 cm?2.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: January 7, 2014
    Assignee: Cree, Inc.
    Inventors: Adrian Powell, Mark Brady, Stephan G. Mueller, Valeri F. Tsvetkov, Robert T. Leonard
  • Patent number: 8623139
    Abstract: An apparatus for producing polycrystalline silicon which heats a silicon seed rod in a reactor to which a raw material gas is supplied, and deposits polycrystalline silicon on the surface of the silicon seed rod, includes an electrode extending in a vertical direction to hold the silicon seed rod, an electrode holder having a cooling flow passage circulating a cooling medium formed therein, and inserted into a through-hole formed in a bottom plate of the reactor to hold the electrode, and an annular insulating material arranged between an inner peripheral surface of the through-hole and an outer peripheral surface of the electrode holder to electrically insulate the bottom plate and the electrode holder from each other.
    Type: Grant
    Filed: June 18, 2009
    Date of Patent: January 7, 2014
    Assignee: Mitsubishi Materials Corporation
    Inventors: Toshihide Endoh, Masayuki Tebakari, Toshiyuki Ishii, Masaaki Sakaguchi
  • Publication number: 20140004303
    Abstract: An SiC crystal has Fe concentration not higher than 0.1 ppm and Al concentration not higher than 100 ppm. A method of manufacturing an SiC crystal includes the following steps. SiC powders for polishing are prepared as a first source material. A first crystal is grown by sublimating the first source material through heating and precipitating an SiC crystal. A second source material is formed by crushing the first SiC crystal. A second SiC crystal is grown by sublimating the second source material through heating and precipitating an SiC crystal. Thus, SiC crystal and a method of manufacturing an SiC crystal capable of achieving suppressed lowering in quality can be obtained.
    Type: Application
    Filed: September 6, 2013
    Publication date: January 2, 2014
    Applicant: Sumitomo Electric Industries, Ltd
    Inventor: Makoto SASAKI
  • Patent number: 8618552
    Abstract: A high quality single crystal wafer of SiC is disclosed having a diameter of at least about 100 mm and a micropipe density of less than about 25 cm?2.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: December 31, 2013
    Assignee: Cree, Inc.
    Inventors: Adrian Powell, Mark Brady, Robert Tyler Leonard
  • Patent number: 8617312
    Abstract: A method of forming (and system for forming) layers, such as calcium, barium, strontium, and/or magnesium, tantalates and/or niobates, and optionally titanates, on a substrate by employing a vapor deposition method, particularly a multi-cycle atomic layer deposition process.
    Type: Grant
    Filed: September 14, 2006
    Date of Patent: December 31, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Brian A. Vaartstra, Stefan Uhlenbrock
  • Patent number: 8613802
    Abstract: Affords nitride semiconductor crystal manufacturing apparatuses that are durable and that are for manufacturing nitride semiconductor crystal in which the immixing of impurities from outside the crucible is kept under control, and makes methods for manufacturing such nitride semiconductor crystal, and the nitride semiconductor crystal itself, available. A nitride semiconductor crystal manufacturing apparatus (100) is furnished with a crucible (101), a heating unit (125), and a covering component (110). The crucible (101) is where, interiorly, source material (17) is disposed. The heating unit (125) is disposed about the outer periphery of the crucible (101), where it heats the crucible (101) interior. The covering component (110) is arranged in between the crucible (101) and the heating unit (125).
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: December 24, 2013
    Assignee: Sumitomo Electric Industies, Ltd.
    Inventors: Issei Satoh, Michimasa Miyanaga, Yoshiyuki Yamamoto, Hideaki Nakahata
  • Publication number: 20130333611
    Abstract: A lattice matching layer for use in a multilayer substrate structure comprises a lattice matching layer. The lattice matching layer includes a first chemical element and a second chemical element. Each of the first and second chemical elements has a hexagonal close-packed structure at room temperature that transforms to a body-centered cubic structure at an ?-? phase transition temperature higher than the room temperature. The hexagonal close-packed structure of the first chemical element has a first lattice parameter. The hexagonal close-packed structure of the second chemical element has a second lattice parameter. The second chemical element is miscible with the first chemical element to form an alloy with a hexagonal close-packed structure at the room temperature. A lattice constant of the alloy is approximately equal to a lattice constant of a member of group III-V compound semiconductors.
    Type: Application
    Filed: March 11, 2013
    Publication date: December 19, 2013
    Applicant: Tivra Corporation
    Inventors: Indranil De, Francisco Machuca
  • Patent number: 8608849
    Abstract: A method for making zinc oxide nano-structure, the method includes the following steps. Firstly, providing a growing device, the growing device comprising a heating apparatus and a reacting room. Secondly, providing a growing substrate and forming a metal layer thereon. Thirdly, depositing a catalyst layer on the metal layer. Fourthly, placing the growing substrate into the reacting room together with a quantity of zinc source material. Fifthly, introducing a oxygen-containing gas into the reacting room. Lastly, heating the reacting room to a temperature range of 500˜1100° C.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: December 17, 2013
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Hai-Lin Sun, Kai-Li Jiang, Qun-Qing Li, Shou-Shan Fan