Treatment Of Semiconductor Body Using Process Other Than Electromagnetic Radiation (epo) Patents (Class 257/E21.482)
  • Publication number: 20100326355
    Abstract: Holes in semiconductor processing reactor parts are sized to facilitate deposition of protective coatings, such as by chemical vapor deposition at atmospheric pressure. In some embodiments, the holes each have a flow constriction that narrows the holes in one part and that also divides the holes into one or more other portions. In some embodiments, the aspect ratios of the one or more other portions are about 15:1 or less, or about 7:1 or less, and have a cylindrical or conical cross-sectional shape. The holes are coated with a protective coating, such as a silicon carbide coating, by chemical vapor deposition, including chemical vapor deposition at atmospheric pressure.
    Type: Application
    Filed: September 14, 2010
    Publication date: December 30, 2010
    Applicant: ASM International N.V.
    Inventor: Vladimir Kuznetsov
  • Publication number: 20100323528
    Abstract: Provided are a semiconductor manufacturing apparatus and method, capable of reliably and rapidly transporting a heated semiconductor wafer. the apparatus is provided for transporting a semiconductor wafer, which has been processed by desired treatment (for example, film formation) and is held by a susceptor equipped with a heater, to the outside by a transport arm which holds the semiconductor wafer by suction, by moving the susceptor to a certain position above a top of a wafer waiting stage and introducing the semiconductor wafer held by the susceptor onto the top of the wafer waiting stage. Then, the susceptor present on the top of the wafer waiting stage is moved in a horizontal direction. After a certain cooling time, the transport arm holds the semiconductor wafer placed on the wafer waiting stage by suction and transports the semiconductor wafer to outside.
    Type: Application
    Filed: June 8, 2010
    Publication date: December 23, 2010
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventors: Hiroyuki Baba, Tomoyasu Kai
  • Publication number: 20100317199
    Abstract: To reduce a residual amount of chlorine atoms and oxygen atoms in a metal nitride film, and improve oxidation resistance of the metal nitride, film, in a temperature range of not deteriorating the characteristics of other film adjacent to the metal nitride film. A substrate processing apparatus is provided, comprising: a processing chamber into which a substrate is loaded, having thereon a substrate containing oxygen atoms, chlorine atoms, and metal atoms; a substrate support part for supporting and heating the substrate in the processing chamber; a gas supply part for supplying nitrogen atoms-containing gas and hydrogen atoms-containing gas into the processing chamber; a gas exhaust part for exhausting inside of the processing chamber; a plasma generation part for exciting the nitrogen atoms-containing gas and the hydrogen atoms-containing gas supplied into the processing chamber; and a control part for controlling the substrate support part, the gas supply part, and the plasma generation part.
    Type: Application
    Filed: June 9, 2010
    Publication date: December 16, 2010
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Tadashi Horie, Akito Hirano, Tadashi Terasaki
  • Publication number: 20100307415
    Abstract: A reactor having a housing that encloses a gas delivery system operatively connected to a reaction chamber and an exhaust assembly. The gas delivery system includes a plurality of gas lines for providing at least one process gas to the reaction chamber. The gas delivery system further includes a mixer for receiving the at least one process gas. The mixer is operatively connected to a diffuser that is configured to diffuse process gases. The diffuser is attached directly to an upper surface of the reaction chamber, thereby forming a diffuser volume therebetween. The diffuser includes at least one distribution surface that is configured to provide a flow restriction to the process gases as they pass through the diffuser volume before being introduced into the reaction chamber. The reaction chamber defines a reaction space in which a semiconductor substrate is disposed for processing.
    Type: Application
    Filed: April 5, 2010
    Publication date: December 9, 2010
    Inventors: Eric Shero, Mohith E. Verghese, Carl L. White, Herbert Terhorst, Dan Maurice
  • Publication number: 20100311249
    Abstract: Embodiments of the disclosure generally provide a method and apparatus for processing a substrate in a vacuum process chamber. In one embodiment a vacuum process chamber is provided that includes a chamber body and lid disposed on the chamber body. A blocker plate is coupled to the lid and bounds a staging plenum therewith. A gas distribution plate is coupled to the lid. The gas distribution plate separates a main plenum defined between the gas distribution plate and the blocker plate from a process volume defined within the chamber body. The gas distribution plate and the blocker plate define a spacing gradient therebetween which influences mixing of gases within the main plenum.
    Type: Application
    Filed: June 6, 2010
    Publication date: December 9, 2010
    Applicant: APPLIED MATERIALS, INC.
    Inventors: JOHN M. WHITE, Carl Sorensen, Robin Tiner, Beom Soo Park, Soo Young Choi
  • Publication number: 20100307552
    Abstract: Coated substrates and methods for coating substrates, for example, a self-assembly method, disclosed herein are useful for, for example, photovoltaic cells.
    Type: Application
    Filed: March 25, 2009
    Publication date: December 9, 2010
    Inventors: Glenn Eric Kohnke, Jia Liu
  • Publication number: 20100300357
    Abstract: Provided is a substrate processing apparatus, which comprises a process chamber configured to process a substrate, a first plasma generation chamber in the process chamber, a first reactive gas supply unit configured to supply first reactive gas into the first plasma generation chamber, a pair of first discharge electrodes configured to generate plasma and to excite the first reactive gas, a first gas ejection port installed in a side wall of the first plasma generation chamber to eject an active species toward the substrate, a second plasma generation chamber in the process chamber, a second reactive gas supply unit configured to supply second reactive gas into the second plasma generation chamber, a pair of second discharge electrodes configured to generate plasma and to excite the second reactive gas, and a second gas ejection port installed in a side wall of the second plasma generation chamber to eject an active species.
    Type: Application
    Filed: May 19, 2010
    Publication date: December 2, 2010
    Applicant: HITACHI-KOKUSAI ELECTRIC INC.
    Inventors: Tetsuo Yamamoto, Naoki Matsumoto, Koichi Honda
  • Publication number: 20100297827
    Abstract: An adhesion layer and a supporting substrate are provided on the entire surface of the first surface side of a substrate with a metal seed film provided on the first surface side of the substrate. After the removal of the adhesion layer and the supporting substrate provided on the first surface of the substrate, an exposed part of the metal seed film is removed. After this, a plurality of semiconductor chips is stacked and first reflow is performed to the semiconductor chips.
    Type: Application
    Filed: May 5, 2010
    Publication date: November 25, 2010
    Applicant: ELPIDA MEMORY, INC.
    Inventor: Toru MIYAZAKI
  • Publication number: 20100288439
    Abstract: A disclosed top plate that is configured as a solid part and provided in an opening in a ceiling portion of a plasma process chamber whose inside is evacuatable to vacuum includes plural gas conduits formed in a horizontal direction of the top plate; and gas ejection holes that are open in a first surface of the top plate, the first surface facing the inside of the plasma process chamber and in gaseous communication with the plural gas conduits.
    Type: Application
    Filed: August 21, 2008
    Publication date: November 18, 2010
    Applicants: TOKYO ELECTRON LIMITED, NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITY
    Inventors: Kiyotaka Ishibashi, Tadahiro Ohmi, Tetsuya Goto, Masahiro Okesaku
  • Publication number: 20100279512
    Abstract: A plasma processing apparatus includes an antenna unit for generating plasma by using microwaves as a plasma source in such a way that a first region having a relatively high electron temperature of plasma, and a second region having a lower electron temperature of plasma than the first region are formed in a chamber, a first arranging means for arranging a semiconductor substrate W in the first region, a second arranging means for arranging the semiconductor substrate in the second region, and a plasma generation stopping means for stopping the generation of plasma of a plasma generating means, while the semiconductor substrate is arranged in the second region.
    Type: Application
    Filed: October 30, 2008
    Publication date: November 4, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hirokazu Udea, Tetsuya Nishizuka, Toshihisa Nozawa, Takaaki Matsuoka
  • Publication number: 20100279513
    Abstract: The present invention is directed to compositions of matter, systems, and methods to manufacture nanowires. In an embodiment, a buffer layer is placed on a nanowire growth substrate and catalytic nanoparticles are added to form a catalytic-coated nanowire growth substrate. Methods to develop and use this catalytic-coated nanowire growth substrate are disclosed. In a further aspect of the invention, in an embodiment a nanowire growth system using a foil roller to manufacture nanowires is provided.
    Type: Application
    Filed: September 23, 2008
    Publication date: November 4, 2010
    Applicant: NANOSYS, INC.
    Inventors: Chunming Niu, Jay L. Goldman, Xiangfeng Duan, Vijendra Sahi
  • Publication number: 20100261353
    Abstract: A method for controlling the flatness of a wafer between lithography pattern levels. A first lithography step is performed on a topside semiconductor surface of the wafer. Reference curvature information is obtained for the wafer. The reference curvature is other than planar. At least one process step is performed that results in a changed curvature relative to the reference curvature. The changed curvature information is obtained for the wafer. Stress on a bottomside surface of the wafer is modified that reduces a difference between the changed curvature and the reference curvature. A second lithography step is performed on the topside semiconductor surface while the modified stress distribution is present.
    Type: Application
    Filed: April 9, 2010
    Publication date: October 14, 2010
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Steven L. Prins, Brian K. Kirkpatrick, Amitabh Jain
  • Publication number: 20100247773
    Abstract: Provided is a method for processing a wafer that includes providing an alloy susceptor including an exterior surface and a wafer contact surface. The exterior surface of the alloy susceptor is treated to produce a roughness of the exterior surface. The roughened exterior surface of is coated with a ceramic material. The alloy susceptor including the ceramic-coated roughened exterior surface is positioned in a wafer process chamber. A plurality of layers of a film are deposited on the ceramic-coated roughened exterior surface of the alloy susceptor, wherein a first adhesion exists between the plurality of layers of the film and the ceramic material coated on the roughened exterior surface of the alloy susceptor that is greater than a second adhesion that would exist between the plurality of layers of the film and a non-roughened exterior surface of the alloy susceptor without the ceramic material.
    Type: Application
    Filed: March 26, 2009
    Publication date: September 30, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shuo-Jieh Wu, Hsu Chun Yuan, Tung-Li Lee, Steven Lin, Hs Chiu, Yen-Yu Chen, Alan Chen, Ming Jie He, Yu-Wei Hsueh
  • Publication number: 20100248396
    Abstract: A heat treatment apparatus includes a processing chamber having a gate valve at a sidewall and a cover at a ceiling via a sealing member; a gate valve heating unit provided at the gate valve; a processing chamber heating unit provided at a sidewall of the processing chamber; and a temperature controller that controls a set temperature for the sidewall of the processing chamber adjacent to the gate valve to be lower than a set temperature for an opposite sidewall of the processing chamber from the gate valve by controlling the processing chamber heating unit. The two set temperatures are set to be higher than a sublimation temperature of a reaction by-product, or higher than a condensation temperature of the gas, and the two set temperatures are also set to be lower than a temperature at which an amount of a gas permeating the sealing member increases.
    Type: Application
    Filed: June 14, 2010
    Publication date: September 30, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Kei Ogose
  • Publication number: 20100233866
    Abstract: A nitride-based semiconductor crystal and a second substrate are bonded together. In this state, impact is applied externally to separate the low-dislocation density region of the nitride-based semiconductor crystal along the hydrogen ion-implanted layer, thereby transferring (peeling off) the surface layer part of the low-dislocation density region onto the second substrate. At this time, the lower layer part of the low-dislocation density region stays on the first substrate without being transferred onto the second substrate. The second substrate onto which the surface layer part of the low-dislocation density region has been transferred is defined as a semiconductor substrate available by the manufacturing method of the present invention, and the first substrate on which the lower layer part of the low-dislocation density region stays is reused as a substrate for epitaxial growth.
    Type: Application
    Filed: February 8, 2007
    Publication date: September 16, 2010
    Applicant: Shin-Etsu Chemical Co., Ltd.
    Inventors: Shoji Akiyama, Yoshihiro Kubota, Atsuo Ito, Makoto Kawai, Yuuji Tobisaka, Koichi Tanaka
  • Publication number: 20100224130
    Abstract: A method and apparatus for processing a substrate utilizing a rotating substrate support are disclosed herein. In one embodiment, an apparatus for processing a substrate includes a chamber having a substrate support assembly disposed within the chamber. The substrate support assembly includes a substrate support having a support surface and a heater disposed beneath the support surface. A shaft is coupled to the substrate support and a motor is coupled to the shaft through a rotor to provide rotary movement to the substrate support. A seal block is disposed around the rotor and forms a seal therewith. The seal block has at least one seal and at least one channel disposed along the interface between the seal block and the shaft. A port is coupled to each channel for connecting to a pump. A lift mechanism is coupled to the shaft for raising and lowering the substrate support.
    Type: Application
    Filed: May 13, 2010
    Publication date: September 9, 2010
    Inventors: Jacob Smith, Alexander Tam, R. Suryanarayanan Iyer, Sean Seutter, Binh Tran, Nir Merry, Adam Brailove, Robert Shydo, JR., Robert Andrews, Frank Roberts, Theodore Smick, Geoffrey Ryding
  • Publication number: 20100212594
    Abstract: A substrate mounting mechanism on which a substrate is placed is provided. The mechanism includes a heater plate having a substrate mounting surface, and a first insertion hole having large and small diameter portions, and a temperature control jacket formed to cover at least a surface of the heater plate other than the substrate mounting surface and having a non-deposition temperature a second insertion hole having large and small diameter portions. The mechanism further includes a first lift pin having a cover inserted into the large diameter portion of the first insertion hole and a shaft inserted into both the large and small diameter portions of the first insertion hole, and a second lift pin having a cover to be inserted into the large diameter portion of the second insertion hole and a shaft to be inserted into both the large and small diameter portions of the second insertion hole.
    Type: Application
    Filed: March 11, 2010
    Publication date: August 26, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masamichi HARA, Atsushi GOMI, Shinji MAEKAWA, Satoshi TAGA
  • Publication number: 20100216313
    Abstract: Disclosed is a plasma processing device that provides an object to be treated with plasma treatment. A wafer as an object to be treated, which is attached on the upper surface of adhesive sheet held by a holder frame, is mounted on a stage. In a vacuum chamber that covers the stage therein, plasma is generated, by which the wafer mounted on the stage undergoes plasma treatment. The plasma processing device contains a cover member made of dielectric material. During the plasma treatment on the wafer, the holder frame is covered with a cover member placed at a predetermined position above the stage, at the same time, the wafer is exposed from an opening formed in the center of the cover member.
    Type: Application
    Filed: October 9, 2008
    Publication date: August 26, 2010
    Applicant: Panasonic Corproation
    Inventor: Tetsuhiro Iwai
  • Publication number: 20100212595
    Abstract: The invention relates to a support assembly for a substrate holder on which a semiconductor substrate is to be placed for layered deposition of various semiconductor materials on the semiconductor substrate, said support assembly comprising: at least one vertically disposed, rotatably drivable support shaft, as well as a substrate holder support supporting the substrate holder, which is to be placed on the free end of said support shaft, as well as fixation means are arranged for fixing the support shaft and the substrate holder support in position relative to each other.
    Type: Application
    Filed: February 10, 2010
    Publication date: August 26, 2010
    Applicant: XYCARB CERAMICS B.V.
    Inventors: Juan Manuel Campaneria, IV, Todd Steven Nitsche, Steven Scott Wolthuis
  • Publication number: 20100186673
    Abstract: A vaporizer having a simple structure with improved thermal efficiency is provided. A vaporizer includes a nozzle unit for jetting a liquid material in a mist state, a vaporizing unit having vaporizing paths which vaporize the material mist and form a material gas, and an ejection unit for sending the material gas to the subsequent stage. The vaporizing unit includes a vaporizing unit main body having the vaporizing paths, a main body container containing the vaporizing unit main body, a heater for heating the material mist passing through the vaporizing paths, and connecting members arranged on both end sections of the main body container. The vaporizing unit main body and the main body container are formed of a material having thermal conductivity higher than that of the material of the connecting members. The end sections of the main body container and the connecting members are bonded by explosion bonding.
    Type: Application
    Filed: February 23, 2010
    Publication date: July 29, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Sumi TANAKA, Tomohito KOMATSU, Munehisa FUTAMURA
  • Publication number: 20100190348
    Abstract: A first processing gas containing a first element and a second processing gas containing a second element are alternately supplied to a surface of a substrate placed in a processing chamber, to thereby form a first thin film, and a second processing gas and a third processing containing the first element and different from the first processing gas are alternately supplied, to thereby form a second thin film on the first thin film, having the same element component as that of the first thin film.
    Type: Application
    Filed: January 7, 2010
    Publication date: July 29, 2010
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Naonori Akae, Yoshiro Hirose, Tomohide Kato
  • Publication number: 20100180950
    Abstract: A method and corresponding system for providing a uniform nanowire array including uniform nanowires composed of at least three elements is presented. An embodiment of the method includes growing an array of two-element nanowires, and thereafter uniformly doping or alloying each two-element nanowire, with respect to each other two-element nanowire, with at least one doping or alloying element through a wet chemical synthesis with a precursor solution, to produce the uniform array of nanowires composed of at least three elements. The two-element nanowire can include Zn and O, and the at least one doping or alloying element can be Mg, Cd, Mn, Cu, Be, Fe, and Co. Applications of the three-element nanowire array include solar cells and light emitting diodes with improved efficiencies over existing technologies.
    Type: Application
    Filed: November 13, 2009
    Publication date: July 22, 2010
    Applicant: University of Connecticut
    Inventors: Pu-Xian Gao, Paresh Shimpi
  • Publication number: 20100170441
    Abstract: In a method and an apparatus for forming metal oxide on a substrate, a source gas including metal precursor flows along a surface of the substrate to form a metal precursor layer on the substrate. An oxidizing gas including ozone flows along a surface of the metal precursor layer to oxidize the metal precursor layer so that the metal oxide is formed on the substrate. A radio frequency power is applied to the oxidizing gas flowing along the surface of the metal precursor layer to accelerate a reaction between the metal precursor layer and the oxidizing gas. Acceleration of the oxidation reaction may improve electrical characteristics and uniformity of the metal oxide.
    Type: Application
    Filed: March 23, 2010
    Publication date: July 8, 2010
    Inventors: Seok-Jun Won, Yong-Min Yoo, Min-Woo Song, Dae-Youn Kim, Young-Hoon Kim, Weon-Hong Kim, Jung-Min Park, Sun-Mi Song
  • Publication number: 20100167552
    Abstract: A method of manufacturing an IC device includes providing a workpiece having least one dielectric layer disposed on a surface of the workpiece. The method also includes processing the dielectric layer to form a plurality of apertures in the dielectric layer, where the processing includes at least one micromask-prone process. The method further includes subsequent to the processing step, cryogenically treating the workpiece. In the method, the treating step removes particles deposited on or in the plurality of apertures during the processing step and maintains the plurality of apertures, where the particles are generated from micromask features resulting from the micromask-prone process.
    Type: Application
    Filed: December 30, 2008
    Publication date: July 1, 2010
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Murlidhar Bashyam, Rajneesh Jaiswal, Jason R. Heine
  • Publication number: 20100144066
    Abstract: A system for recycling includes a processing chamber, a reclamation reservoir and a mixing reservoir. The processing chamber is configured to receive a deposition gas deposited onto a semiconductor layer. The processing chamber has an exhaust to discharge an unused portion of the deposition gas as an effluent gas. The reclamation reservoir is in fluid communication with the processing chamber. The reclamation reservoir is configured to receive and store the effluent gas from the processing chamber. The mixing reservoir is in fluid communication with the reclamation reservoir and the processing chamber. The mixing reservoir is configured to mix the effluent gas with a virgin gas to form a recycled deposition gas. The mixing reservoir supplies the recycled deposition gas to the processing chamber to deposit an additional portion of the semiconductor layer.
    Type: Application
    Filed: December 10, 2009
    Publication date: June 10, 2010
    Applicant: THINSILICON CORPORATION
    Inventors: JASON MICHAEL STEPHENS, BRADLEY OWEN STIMSON, GULEID NUR ABDI HUSSEN
  • Publication number: 20100144158
    Abstract: A liquid treatment device having a substrate holding section (2) for horizontally holding a wafer (W) and capable of rotating with the wafer (W), a rotation cup (4) having an annular shape so as to surround the wafer (W) held by the substrate holding section (2) and capable of rotating with the wafer (W), a rotation mechanism (3) for integrally rotating the rotation cup (4) and the substrate holding section (2), a nozzle (5) for supplying a treatment liquid for the wafer (W) and a cleaning liquid for the rotation cup (4), a liquid supply section (85) for supplying the treatment liquid and cleaning liquid to the nozzle (5), and a nozzle movement mechanism for moving the nozzle (5) between a first position at which the liquid is discharged to the wafer (W) and a second position at which the liquid is discharged to an external portion of the rotation cup (4).
    Type: Application
    Filed: July 20, 2007
    Publication date: June 10, 2010
    Inventors: Norihiro Ito, Satoshi Kaneko, Hiromitsu Nanba
  • Publication number: 20100140767
    Abstract: A method of forming integrated circuits includes laminating a patterned film including an opening onto a wafer, wherein a bottom die in the wafer is exposed through the opening. A top die is placed into the opening. The top die fits into the opening with substantially no gap between the patterned film and the top die. The top die is then bonded onto the bottom die, followed by curing the patterned film.
    Type: Application
    Filed: December 5, 2008
    Publication date: June 10, 2010
    Inventors: Weng-Jin Wu, Hung-Jung Tu, Ku-Feng Yang, Jung-Chih Hu, Wen-Chih Chiou
  • Publication number: 20100144118
    Abstract: A system and method for stacking semiconductor dies is disclosed. A preferred embodiment comprises forming through-silicon vias through the wafer, protecting a rim edge of the wafer, and then removing the unprotected portions so that the rim edge has a greater thickness than the thinned wafer. This thickness helps the fragile wafer survive further transport and process steps. The rim edge is then preferably removed during singulation of the individual dies from the wafer.
    Type: Application
    Filed: December 8, 2008
    Publication date: June 10, 2010
    Inventors: Ku-Feng Yang, Weng-Jin Wu, Wen-Chih Chiou, Chen-Hua Yu
  • Publication number: 20100130022
    Abstract: A substrate processing apparatus is provided. The substrate processing apparatus includes a substrate supporting member including a spin head on which a substrate is placed, a nozzle discharging processing liquid to the substrate placed on the spin head, and a processing liquid supplying source supplying the processing liquid to the nozzle. The nozzle includes a nozzle main body that has a plurality of discrete discharging openings and an integration discharging opening. The discrete discharging openings have a slit-shaped cross section having a first length and are arrayed in series in a predetermined direction. The integration discharging opening is formed by connecting the discrete discharging openings to each other in a single slot shape having a length greater than the first length, and finally discharges the processing liquid.
    Type: Application
    Filed: November 18, 2009
    Publication date: May 27, 2010
    Applicant: SEMES CO., Ltd.
    Inventors: Sung-Woon PARK, Sang Uk PARK, Jae Seung GO
  • Publication number: 20100120224
    Abstract: An object is to provide a method for manufacturing an SOI substrate including a single crystal silicon film whose plane orientation is (100) and a single crystal silicon film whose plane orientation is (110) with high yield. A first single crystal silicon substrate whose plane orientation is (100) is doped with first ions to form a first embrittlement layer. A second single crystal silicon substrate whose plane orientation is (110) is doped with second ions to selectively form a second embrittlement layer. Only part of the first single crystal silicon substrate is separated along the first embrittlement layer by first heat treatment, thereby forming a first single crystal silicon film. A region of the second single crystal silicon substrate, in which the second embrittlement layer is not formed, is removed. Part of the second single crystal silicon substrate is separated along the second embrittlement layer by second heat treatment, thereby forming a second single crystal silicon film.
    Type: Application
    Filed: November 10, 2009
    Publication date: May 13, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Akihisa SHIMOMURA, Masaki KOYAMA, Yasuhiro JINBO, Naoki OKUNO
  • Publication number: 20100117200
    Abstract: A substrate for a semiconductor package having a reinforcing member that prevents or minimizes distortions is presented. The substrate for the semiconductor package includes a substrate body, an insulation layer, and a reinforcing member. The substrate body has a first region having a plurality of chip mount regions, a second region disposed along a periphery of the first region, a circuit pattern disposed in each chip mount region and a dummy pattern disposed along the second region. The insulation layer covers the first and second regions and has an opening exposing some portion of each circuit pattern. The reinforcing member is disposed in the second region and prevents deflection of the substrate body.
    Type: Application
    Filed: December 31, 2008
    Publication date: May 13, 2010
    Inventors: Young Hy JUNG, Jae Sung OH, Ki Il MOON, Ki Chae KIM, Chan Sun LEE, Jin Ho GWON, Jae Youn CHOI
  • Publication number: 20100109023
    Abstract: A method includes placing a first bonding layer on at least one of a first functional region bonded on a release layer with a light releasable adhesive layer on a first substrate, and a transfer region on a second substrate; bonding the first functional region to the second substrate by the first bonding layer; irradiating the release layer with light with a light blocking member being provided to separate the first substrate from the first functional region at the release layer; placing a second bonding layer on at least one of a second functional region on the first substrate, and a transfer region on the release layer or a transfer region on a third substrate; bonding the second functional region to the second substrate or the third substrate by the second bonding layer; and separating the first substrate from the second functional region at the release layer.
    Type: Application
    Filed: November 3, 2009
    Publication date: May 6, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Takao Yonehara
  • Publication number: 20100105154
    Abstract: A substrate processing method can securely form a metal film by electroless plating on an exposed surface of a base metal, such as interconnects, with increased throughput and without the formation of voids in the base metal. The substrate processing method includes: cleaning a surface of a substrate having a base metal formed in the surface with a cleaning solution comprising an aqueous solution of a carboxyl group-containing organic acid or its salt and a surfactant as an additive; bringing the surface of the substrate after the cleaning into contact with a processing solution comprising a mixture of the cleaning solution and a solution containing a catalyst metal ion, thereby applying the catalyst to the surface of the substrate; and forming a metal film by electroless plating on the catalyst-applied surface of the substrate.
    Type: Application
    Filed: January 12, 2010
    Publication date: April 29, 2010
    Inventors: XINMING WANG, Daisuke Takagi, Akihiko Tashiro, Yukio Fukunaga, Akira Fukunaga, Akira Owatari, Yukiko Nishioka
  • Publication number: 20100089321
    Abstract: Molecular fluorine may be generated and distributed on-site at a fabrication facility. A molecular fluorine generator may come in a variety of sizes to fit better the needs of the particular fabrication facility. The generator may service one process tool, a plurality of process tool along a process bay, the entire fabrication facility, or nearly any other configuration within the facility. The process can obviate the need and inherent risks with transporting or handling gas cylinders. The process can be used in conjunction with a cleaning or fabrication operation used in the electronics fabrication industry.
    Type: Application
    Filed: December 14, 2009
    Publication date: April 15, 2010
    Inventors: Stephen H. Siegele, Frederick J. Siegele
  • Publication number: 20100087045
    Abstract: An SOI substrate is manufactured by forming an embrittled layer in a bond substrate by increasing the dose of hydrogen ions in the formation of the embrittled layer to a value more than the dose of hydrogen ions of the lower limit for separation of the bond substrate, separating the bond substrate attached to the base substrate, forming an SOI substrate in which a single crystal semiconductor film is formed over the base substrate, and irradiating a surface of the single crystal semiconductor film with laser light.
    Type: Application
    Filed: September 29, 2009
    Publication date: April 8, 2010
    Inventors: Akihisa SHIMOMURA, Hajime TOKUNAGA
  • Publication number: 20100081094
    Abstract: In a mask pattern forming method, a resist film is formed over a thin film, the resist film is processed into resist patterns having a predetermined pitch by photolithography, slimming of the resist patterns is performed, and an oxide film is formed on the thin film and the resist patterns after an end of the slimming step in a film deposition apparatus by supplying a source gas and an oxygen radical or an oxygen-containing gas. In the mask pattern forming method, the slimming and the oxide film forming are continuously performed in the film deposition apparatus.
    Type: Application
    Filed: September 28, 2009
    Publication date: April 1, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: KAZUHIDE HASEBE, SHIGERU NAKAJIMA, JUN OGAWA, HIROKI MURAKAMI
  • Publication number: 20100075506
    Abstract: An apparatus for manufacturing a semiconductor element includes processing chambers arranged to accommodate a flexible substrate which is step-transferred by one effective region each time; a first electrode and a second electrode which are provided in the processing chamber; and a mask portion having an opening so as to expose the effective region when each effective region of the flexible substrate is transferred between the first electrode and the second electrode.
    Type: Application
    Filed: October 4, 2007
    Publication date: March 25, 2010
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Hisao Ochi
  • Publication number: 20100064969
    Abstract: Fluorine gas generators are connected with semiconductor manufacturing apparatuses through a gas supplying system including a storage tank that can store a predetermined quantity of fluorine gas generated in the on-site fluorine gas generators. When one or more of the on-site fluorine gas generators are stopped, fluorine gas is supplied to the semiconductor manufacturing apparatuses from the storage tank storing a predetermined quantity of fluorine gas, so as to keep the operations of the semiconductor manufacturing apparatuses. Thereby obtained is a semiconductor manufacturing plant in which fluorine gas generated in the fluorine gas generators can be safely and stably supplied to the semiconductor manufacturing apparatuses, and with superior cost performance.
    Type: Application
    Filed: February 7, 2007
    Publication date: March 18, 2010
    Applicants: TOYO TANSO CO., LTD., TOKYO ELECTRON LIMITED
    Inventors: Jiro Hiraiwa, Osamu Yoshimoto, Hiroshi Hayakawa, Tetsuro Tojo, Tsuneyuki Okabe, Takanobu Asano, Shinichi Wada, Ken Nakao, Hitoshi Kato
  • Publication number: 20100068891
    Abstract: A barrier film made of a ZrB2 film is formed by use of a coating apparatus provided with plasma generation means including a coaxial resonant cavity and a microwave supply circuit for exciting the coaxial resonant cavity, the coaxial resonant cavity including spaced apart conductors provided around the periphery of a nonmetallic pipe for reactive gas introduction, the coaxial resonant cavity having an inner height equal to an integer multiple of one-half of the exciting wavelength, the plasma generation means being constructed such that a gas injected from one end of the nonmetallic pipe is excited into a plasma state by a microwave when the gas is in a region of the nonmetallic pipe which is not covered with the conductors and such that the gas in the plasma state is discharged from the other end of the nonmetallic pipe.
    Type: Application
    Filed: November 8, 2007
    Publication date: March 18, 2010
    Inventors: Masanobu Hatanaka, Michio Ishikawa, Kanako Tsumagari
  • Patent number: 7678688
    Abstract: A method for forming a metal interconnection in an image sensor includes forming a first interlayer dielectric (ILD) layer having a contact plug over a substrate, forming a diffusion barrier layer over the first ILD layer, performing a forming gas annealing, forming a second ILD layer over the diffusion barrier layer, etching the second ILD layer and the diffusion barrier layer to form a trench, forming a conductive layer to fill the trench, and planarizing the conductive layer to form a metal interconnection electrically connected to the contact plug.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: March 16, 2010
    Inventor: Kyeong-Keun Choi
  • Publication number: 20100050942
    Abstract: A disclosed film deposition apparatus has a separation gas supplying nozzle between reaction gas nozzles arranged away from each other in a rotation direction of a turntable on which a substrate is placed, and a ceiling member providing a lower ceiling surface on both sides of the separation gas supplying nozzle. In this film deposition apparatus, the separation gas supplying nozzle and the reaction gas nozzles are removably arranged along a circumferential direction of a chamber, and the ceiling member is removably attached on a ceiling plate of the chamber.
    Type: Application
    Filed: August 12, 2009
    Publication date: March 4, 2010
    Inventors: Hitoshi Kato, Manabu Honma
  • Publication number: 20100032793
    Abstract: The present invention provides methods for forming at least partially relaxed strained material layers on a target substrate. The methods include forming islands of the strained material layer on an intermediate substrate, at least partially relaxing the strained material islands by a first heat treatment, and transferring the at least partially relaxed strained material islands to the target substrate. The at least partial relaxation is facilitated by the presence of low-viscosity or compliant layers adjacent to the strained material layer. The invention also provides semiconductor structures having an at least partially relaxed strained material layer, and semiconductor devices fabricated using an at least partially relaxed strained material layer.
    Type: Application
    Filed: December 22, 2008
    Publication date: February 11, 2010
    Inventors: Pascal Guenard, Bruce Faure, Fabrice Letertre, Michael R. Krames, Nathan F. Gardner, Melvin B. McLaurin
  • Publication number: 20090314996
    Abstract: In a dopant-injecting method for injecting a volatile dopant into a semiconductor melt, a doping device having an accommodating portion for accommodating a solid dopant and a cylindrical portion into which a gas ejected from the accommodating portion is introduced, a lower end surface of the cylindrical portion being opened to guide the gas to the melt, is used. The sublimation rate of the dopant in the accommodating portion is set in a range from 10 g/min to 50 g/min. Since a flow volume of the volatilized dopant gas is controlled by setting the sublimation rate of the dopant gas in the accommodating portion in the range from 10 g/min to 50 g/min, the melt is not blown off when the gas is blown onto the melt.
    Type: Application
    Filed: July 20, 2007
    Publication date: December 24, 2009
    Inventors: Shinichi Kawazoe, Yasuhito Narushima, Toshimichi Kubota
  • Publication number: 20090311807
    Abstract: The present invention is a thermal processing apparatus comprising: a processing vessel capable of being evacuated, the processing vessel also being capable of accommodating, in addition to a plurality of objects, an object for temperature measurement equipped with an elastic wave device; a holding unit configured to be loaded into and unloaded from the processing vessel, while the holding unit holding the plurality of objects to be processed and the object for temperature measurement; a gas introduction unit configured to introduce a gas into the processing vessel; a heating unit configured to heat the plurality of objects to be processed and the object for temperature measurement that are accommodated in the processing vessel; a first conductive member configured to function as a transmitter antenna connected to a transmitter through a radiofrequency line, for transmitting an electric wave for measurement toward the elastic wave device accommodated in the processing vessel; a second conductive member config
    Type: Application
    Filed: June 10, 2009
    Publication date: December 17, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Kenichi Yamaga, Wenling Wang
  • Publication number: 20090311872
    Abstract: A gas ring has a ring shape and includes: a gas inlet hole through which a gas is introduced from outside the gas inlet hole into the gas ring; a plurality of gas jets that ejects the gas transferred from the gas inlet hole; and a plurality of branched paths extending along the ring shape from the gas inlet hole to each of the plurality of gas jets. Here, distances between each of the plurality of gas jets to central parts, which are branch points of each of the plurality of branched paths, are identical to each other.
    Type: Application
    Filed: June 12, 2009
    Publication date: December 17, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hirokazu UEDA, Yoshinobu TANAKA, Yasuhiro OTSUKA, Masanobu NAKAHASHI
  • Publication number: 20090305462
    Abstract: A multi-ported CAM cell in which the negative effects of increased travel distance have been substantially reduced is provided. The multi-ported CAM cell is achieved in the present invention by utilizing three-dimensional integration in which multiple active circuit layers are vertically stack and vertically aligned interconnects are employed to connect a device from one of the stacked layers to another device in another stack layer. By vertically stacking multiple active circuit layers with vertically aligned interconnects, each compare port of the multi-port CAM can be implemented on a separate layer above or below the primary data storage cell. This allows the multi-port CAM structure to be implemented within the same area footprint as a standard Random Access Memory (RAM) cell, minimizing data access and match compare delays. Each compare match line and data bit line has the length associated with a simple two-dimensional Static Random Access Memory (SRAM) cell array.
    Type: Application
    Filed: August 17, 2009
    Publication date: December 10, 2009
    Applicant: International Business Machines Corporation
    Inventors: Robert J. Bucki, Jagreet S. Atwal, Joseph S. Barnes, Kerry Bernstein, Eric Robinson
  • Publication number: 20090298251
    Abstract: An aerosol spray apparatus and a method of forming a film using the aerosol spray apparatus are disclosed. The aerosol spray apparatus in accordance with an embodiment of the present invention includes: a carrier gas injection unit, which forms carrier gas by vaporizing liquefied gas and increases the pressure of the carrier gas; an aerosol forming unit, which forms an aerosol by mixing the carrier gas with powder; and a film forming unit, which sprays the aerosol in a normal pressure environment such that the film is formed on the surface of the board. The apparatus can perform a coating process with no restriction of the type and size of powder, simplify the process because the film can be formed in a normal temperature and pressure environment, and control a wide range of film thickness in a short time.
    Type: Application
    Filed: May 28, 2009
    Publication date: December 3, 2009
    Inventors: Hee-Sung CHOI, Kwang-Su Kim, Hoo-Mi Choi, Tae-Sung Kim, Mi-Yang Kim, Hyun-Ho Shin
  • Publication number: 20090275209
    Abstract: Disclosed is a plasma processing apparatus and a plasma processing method, by which ions of plasma can be injected uniformly over the whole surface of a substrate to be processed, in a short time. Specifically, when the substrate is processed in a reaction container, the gas pressure inside the reaction container is increased. Alternatively, the distance between a plasma processing portion and the substrate is enlarged, or the substrate is temporally moved outwardly of the reaction container. As a further alternative, a shutter is disposed between the plasma producing zone and the substrate. With this procedure, incidence of ions of the plasma upon the substrate can be substantially intercepted for a predetermined time period from the start of plasma production.
    Type: Application
    Filed: June 16, 2008
    Publication date: November 5, 2009
    Inventors: Shinzo Uchiyama, Nobumasa Suzuki, Hideo Kitagawa, Yusuke Fukuchi
  • Publication number: 20090269938
    Abstract: A chemical vapor deposition apparatus which comprises a susceptor for mounting a substrate thereon, a heater for heating the substrate, a feed gas introduction portion and a reaction gas exhaust portion, wherein a light transmitting ceramics plate held or reinforced by means of a supporting member is equipped between the heater and a mounting position of the substrate. A chemical vapor deposition apparatus that is capable of forming film stably for a long time without giving a negative influence on a quality of semiconductor film even in a case of chemical vapor deposition reaction employing a furiously corrosive gas with an elevated temperature for producing a gallium nitride compound semiconductor or so was realized.
    Type: Application
    Filed: July 2, 2009
    Publication date: October 29, 2009
    Inventors: Tatsuya OHORI, Kazushige Shiina, Yasushi Iyechika, Noboru Suda, Yukichi Takamatsu, Yoshiyasu Ishihama, Takeo Yoneyama, Yoshinao Komiya
  • Publication number: 20090269914
    Abstract: Process for forming a dielectric. The process may include forming the dielectric on a metallization and capacitor arrangement. The process allows the direct application of a dielectric layer to a copper-containing metallization. Accordingly, two process gases may be excited with different plasma powers per unit substrate area, or one process gas may be excited with a plasma and another process gas may not be excited.
    Type: Application
    Filed: July 6, 2009
    Publication date: October 29, 2009
    Applicant: Infineon Technologies AG
    Inventors: Alexander Gschwandtner, Juergen Holz, Michael Schrenk