Comprising Only Group Iii-v Compound (epo) Patents (Class 257/E33.023)
  • Publication number: 20120040479
    Abstract: The present invention provides a light-emitting element, a method of manufacturing the light-emitting element, a light-emitting device, and a method of manufacturing the light-emitting device. A method of manufacturing a light-emitting element includes: forming a first conductive layer of a first conductive type, a light-emitting layer, and a second conductive layer of a second conductive type on at least one first substrate, forming an ohmic layer on the second conductive layer and bonding the at least one first substrate to a second substrate. The second substrate being larger than the first substrate. The method further includes etching portions of the ohmic layer, the second conductive layer, and the light-emitting layer to expose a portion of the first conductive layer.
    Type: Application
    Filed: October 24, 2011
    Publication date: February 16, 2012
    Inventors: Yu-Sik KIM, Sang-Joon Park
  • Publication number: 20120033698
    Abstract: A nitride semiconductor laser element has: a nitride semiconductor layer having cavity planes at the ends of a waveguide region, an insulating film formed on an upper face of the nitride semiconductor layer so that the ends on the cavity plane side are isolated from cavity planes, and a first film formed from the cavity plane to the upper face of the nitride semiconductor layer, and covered part of the insulating film surface, the first film has a first region that is in contact with the nitride semiconductor and a second region that is in contact with the insulating film, and is formed from AlxGa1-xN (0<x?1) and a different material from that of the insulating film.
    Type: Application
    Filed: July 29, 2011
    Publication date: February 9, 2012
    Applicant: NICHIA CORPORATION
    Inventor: Tomonori MORIZUMI
  • Publication number: 20120032137
    Abstract: Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state lighting device includes a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The solid state lighting device also includes an indentation extending from the second semiconductor material toward the active region and the first semiconductor material and an insulating material in the indentation of the solid state lighting structure.
    Type: Application
    Filed: August 9, 2010
    Publication date: February 9, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Scott D. Schellhammer
  • Publication number: 20120032183
    Abstract: A device having a carrier, a light-emitting structure, and first and second electrodes is disclosed. The light-emitting structure includes an active layer sandwiched between a p-type GaN layer and an n-type GaN layer, the active layer emitting light of a predetermined wavelength in the active layer when electrons and holes from the n-type GaN layer and the p-type GaN layer, respectively, combine therein. The first and second electrodes are bonded to the surfaces of the p-type and n-type GaN layers that are not adjacent to the active layer. The n-type GaN layer has a thickness less than 1.25 ?m. The carrier is bonded to the light emitting structure during the thinning of the n-type GaN layer. The thinned light-emitting structure can be transferred to a second carrier to provide a device that is analogous to conventional LEDs having contacts on the top surface of the LED.
    Type: Application
    Filed: August 20, 2010
    Publication date: February 9, 2012
    Inventors: Steven D. Lester, Frank T. Shum
  • Publication number: 20120032184
    Abstract: A vertical light-emitting diode (VLED) includes a metal substrate, a p-electrode coupled to the metal substrate, a p-contact coupled to the p-electrode, a p-GaN portion coupled to the p-electrode, an active region coupled to the p-GaN portion, an n-GaN portion coupled to the active region, and a phosphor layer coupled to the n-GaN portion.
    Type: Application
    Filed: September 7, 2011
    Publication date: February 9, 2012
    Inventors: CHUONG A. TRAN, TRUNG T. DOAN
  • Patent number: 8110851
    Abstract: A nitride-based semiconductor light-emitting device 100 includes a GaN substrate 10, of which the principal surface is an m-plane 12, a semiconductor multilayer structure 20 that has been formed on the m-plane 12 of the GaN-based substrate 10, and an electrode 30 arranged on the semiconductor multilayer structure 20. The electrode 30 includes an Mg layer 32, which contacts with the surface of a p-type semiconductor region in the semiconductor multilayer structure 20.
    Type: Grant
    Filed: July 26, 2011
    Date of Patent: February 7, 2012
    Assignee: Panasonic Corporation
    Inventors: Toshiya Yokogawa, Mitsuaki Oya, Atsushi Yamada, Ryou Kato
  • Patent number: 8110848
    Abstract: The substrate is used for opto-electric or electrical devices and comprises a layer of nitride grown by means of vapor phase epitaxy growth wherein both main surfaces of the nitride substrate are substantially consisting of non N-polar face and N-polar face respectively and the dislocation density of the substrate is 5×105/cm2 or less. Therefore, the template type substrate has a good dislocation density and a good value of FWHM of the X-ray rocking curve from (0002) plane less than 80, so that the resulting template type substrate is very useful for the epitaxy substrate from gaseous phase such as MOCVD, MBE and HVPE, resulting in possibility of making good opto-electric devices such as Laser Diode and large-output LED and good electric devices such as MOSFET.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: February 7, 2012
    Assignees: Ammono Sp. z o.o., Nichia Corporation
    Inventors: Robert Dwilinski, Roman Doradzinski, Jerzy Garczynski, Leszek Sierzputowski, Yasuo Kanbara
  • Publication number: 20120021546
    Abstract: The present invention provides a method of fabricating a semiconductor substrate and a method of fabricating a light emitting device. The method includes forming a first semiconductor layer on a substrate, forming a metallic material layer on the first semiconductor layer, forming a second semiconductor layer on the first semiconductor layer and the metallic material layer, wherein a void is formed in a first portion of the first semiconductor layer under the metallic material layer during formation of the second semiconductor layer, and separating the substrate from the second semiconductor layer by etching at least a second portion of the first semiconductor layer using a chemical solution.
    Type: Application
    Filed: July 21, 2011
    Publication date: January 26, 2012
    Applicant: SEOUL OPTO DEVICE CO., LTD.
    Inventors: Chang Youn Kim, Shiro Sakai, Hwa Mok Kim, Joon Hee Lee, Soo Young Moon, Kyoung Wan Kim
  • Publication number: 20120021549
    Abstract: A nitride semiconductor layer formation method includes the steps of: (S1) placing a substrate in a reaction chamber, the substrate including a ?r-plane nitride semiconductor crystal at least in an upper surface; (S2) increasing a temperature of the substrate by heating the substrate placed in the reaction chamber; and (S3) growing a nitride semiconductor layer on the substrate. In the temperature increasing step (S2), a nitrogen source gas and a Group III element source gas are supplied into the reaction chamber.
    Type: Application
    Filed: March 24, 2010
    Publication date: January 26, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Masaki Fujikane, Akira Inoue, Ryou Kato, Toshiya Yokogawa
  • Publication number: 20120012855
    Abstract: Solid-state lighting devices (SSLDs) including a carrier substrate with conductors and methods of manufacturing SSLDs. The conductors can provide (a) improved thermal conductivity between a solid-state light emitter (SSLE) and a package substrate and (b) improved electrical conductivity for the SSLE. In one embodiment, the conductors have higher thermal and electrical conductivities than the carrier substrate supporting the SSLE.
    Type: Application
    Filed: July 15, 2010
    Publication date: January 19, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Scott D. Schellhammer, Scott E. Sills, Casey Kurth
  • Publication number: 20120015466
    Abstract: Provided is a method for fabricating a light emitting device. The method includes forming a gallium oxide layer; forming a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer on the gallium oxide layer; forming a non-conductive substrate on the second conductive type semiconductor layer; separating the gallium oxide layer forming a conductive substrate on the first conductive type semiconductor layer; and separating the non-conductive substrate.
    Type: Application
    Filed: September 22, 2011
    Publication date: January 19, 2012
    Inventor: Yong Tae MOON
  • Publication number: 20120012889
    Abstract: A semiconductor light emitting element (1) is comprised of a substrate (110) composed of sapphire; a laminated semiconductor layer (100) which is composed of an n-type semiconductor layer (140), a light emitting layer (150) and a p-type semiconductor layer (160), and is provided on the substrate (110); a first electrode (170) formed in the p-type semiconductor layer (160); and a second electrode (180) formed in the n-type semiconductor layer (140).
    Type: Application
    Filed: April 16, 2010
    Publication date: January 19, 2012
    Applicant: SHOWA DENKO K.K.
    Inventors: Takehiko Okabe, Kyosuke Masuya, Takashi Hodota
  • Patent number: 8097482
    Abstract: A method for manufacturing a Group III nitride semiconductor of the present invention, comprising a sputtering step for disposing a substrate and a target in a chamber and forming a Mg-doped Group III nitride semiconductor on the substrate by a reactive sputtering method, wherein the sputtering step includes respective substeps of: a film formation step for forming a semiconductor thin film while doping with Mg; and a plasma treatment step for applying an inert gas plasma treatment to the semiconductor thin film that has been formed in the film formation step, and the Group III nitride semiconductor is formed by laminating the semiconductor thin film through alternate repetitions of the film formation step and the plasma treatment step.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: January 17, 2012
    Assignee: Showa Denko K.K
    Inventors: Kenzo Hanawa, Yasumasa Sasaki, Hisayuki Miki
  • Patent number: 8097499
    Abstract: A semiconductor device and method thereof. The example method may include forming a semiconductor device, including forming a first layer on a substrate, the first layer including aluminum nitride (AlN), forming a second layer by oxidizing a surface of the first layer and forming a third layer on the second layer, the first, second and third layers each being highly oriented with respect to one of a plurality crystallographic planes. The example semiconductor device may include a substrate including a first layer, the first layer including aluminum nitride (AlN), a second layer formed by oxidizing a surface of the first layer and a third layer formed on the second layer, the first, second and third layers each being highly oriented with respect to one of a plurality crystallographic planes.
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: January 17, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Wenxu Xianyu, Young-soo Park, Jun-ho Lee, Hyuk Lim, Hans S. Cho, Huaxiang Yin
  • Publication number: 20120007101
    Abstract: A semiconductor light-emitting device, and a method of manufacturing the same. The semiconductor light-emitting device includes a first electrode layer, an insulating layer, a second electrode layer, a second semiconductor layer, an active layer, and a first semiconductor layer that are sequentially stacked on a substrate, a first contact that passes through the substrate to be electrically connected to the first electrode layer, and a second contact that passes through the substrate, the first electrode layer, and the insulating layer to communicate with the second electrode layer. The first electrode layer is electrically connected to the first semiconductor layer by filling a contact hole that passes through the second electrode layer, the second semiconductor layer, and the active layer, and the insulating layer surrounds an inner circumferential surface of the contact hole to insulate the first electrode layer from the second electrode layer.
    Type: Application
    Filed: July 8, 2011
    Publication date: January 12, 2012
    Inventors: Jong-in YANG, Tae-hyung KIM, Si-hyuk LEE, Sang-yeob SONG, Cheol-soo SONE, Hak-hwan KIM, Jin-hyun LEE
  • Publication number: 20120007100
    Abstract: Disclosed is a light emitting device including a substrate, a reflective layer provided on the substrate, and a light emitting structure, which includes a first conductive semiconductor layer, a second conductive semiconductor layer and an active layer placed between the first and second conductive semiconductor layers, wherein the first conductive semiconductor layer is an n-type semiconductor layer including GaN and doped with an n-type dopant, wherein the first conductive semiconductor layer includes a first n-type semiconductor layer and a second n-type semiconductor layer between the first n-type semiconductor layer and the active layer, wherein one surface of the first n-type semiconductor layer contacts the second n-type semiconductor layer, and wherein the surface of the first n-type semiconductor layer contacting the second n-type semiconductor layer is formed in an N-phase. The disclosed light emitting device may have improved luminous efficacy while showing reduction in crystal defects.
    Type: Application
    Filed: July 7, 2011
    Publication date: January 12, 2012
    Inventors: MyungHoon JUNG, HyoKun Son
  • Publication number: 20120007102
    Abstract: A light emitting device comprising a gallium and nitrogen containing substrate. The device also has an electrically isolating material grown between the substrate and an active region such that the light emitting device is operable at a voltage greater than 10V.
    Type: Application
    Filed: July 8, 2011
    Publication date: January 12, 2012
    Applicant: Soraa, Inc.
    Inventors: Daniel Feezell, Rajat Sharma, Arpan Chakraborty, Troy Anthony Trottier, Thomas Katona, Mark D'Evelyn
  • Publication number: 20120009711
    Abstract: A method of making a semiconductor light emitting device including: (A) an underlying layer configured to be formed on a major surface of a substrate having a {100} plane as the major surface; (B) a light emitting part; and (C) a current block layer, wherein the underlying layer is composed of a III-V compound semiconductor and is formed on the major surface of the substrate by epitaxial growth, the underlying layer extends in parallel to a <110> direction of the substrate, a sectional shape of the underlying layer obtained when the underlying layer is cut along a virtual plane perpendicular to the <110> direction of the substrate is a trapezoid, and oblique surfaces of the underlying layer corresponding to two oblique sides of the trapezoid are {111}B planes, and the top surface of the underlying layer corresponding to an upper side of the trapezoid is a {100} plane.
    Type: Application
    Filed: September 21, 2011
    Publication date: January 12, 2012
    Applicant: SONY CORPORATION
    Inventors: Sachio Karino, Eiji Takase, Makoto Oogane, Tsuyoshi Nagatake, Michiru Kamada, Hironobu Narui, Nobukata Okano
  • Patent number: 8093606
    Abstract: There is provided a nitride semiconductor light emitting device having a light reflection layer capable of preventing reflectivity from lowering and luminance from lowering due to deterioration of quality of an active layer. A nitride semiconductor laser includes at least a light emitting layer forming portion (3) provided on a first light reflection layer (2) provided on a substrate (1). The first light reflection layer (2) is formed with laminating a low refractivity layer (21) and a high refractivity layer (22) which have a different refractivity from each other, and the low refractivity layer (21) of the first light reflection layer is formed with a single layer structure of an AlxGa1?xN layer (0?x?1), and the high refractivity layer (22) of the first light reflection layer is formed with a multi layer structure formed by laminating alternately an AlyGa1?yN layer (0?y?0.5 and y<x) or an IntGa1?tN layer (0<t?0.5) and an InuGa1?uN layer (0<u?1 and t<u).
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: January 10, 2012
    Assignee: Rohm Co., Ltd.
    Inventors: Masayuki Sonobe, Norikazu Ito, Mitsuhiko Sakai
  • Patent number: 8093685
    Abstract: A nitride compound semiconductor element according to the present invention is a nitride compound semiconductor element including a substrate 1 having an upper face and a lower face and a semiconductor multilayer structure 40 supported by the upper face of the substrate 1, such that the substrate 1 and the semiconductor multilayer structure 40 have at least two cleavage planes. At least one cleavage inducing member 3 which is in contact with either one of the two cleavage planes is provided, and a size of the cleavage inducing member 3 along a direction parallel to the cleavage plane is smaller than a size of the upper face of the substrate 1 along the direction parallel to the cleavage plane.
    Type: Grant
    Filed: October 13, 2005
    Date of Patent: January 10, 2012
    Assignee: Panasonic Corporation
    Inventors: Naomi Anzue, Toshiya Yokogawa, Yoshiaki Hasegawa
  • Publication number: 20120002134
    Abstract: An illuminating device according to the present invention includes at least a first nitride-based semiconductor light-emitting element and a second nitride-based semiconductor light-emitting element, in which: the first nitride-based semiconductor light-emitting element and the second nitride-based semiconductor light-emitting element each include a semiconductor chip; the semiconductor chip includes a nitride-based semiconductor multilayer structure 45 formed from an AlxInyGazN (x+y+z=1, x?0, y?0, z?0) semiconductor, and the nitride-based semiconductor multilayer structure 20 includes an active layer region 24 having an m-plane as an interface; the first nitride-based semiconductor light-emitting element and the second nitride-based semiconductor light-emitting element each emit polarized light from the active layer region 24; and, when the polarized light emitted from the first nitride-based semiconductor light-emitting element and the polarized light emitted from the second nitride-based semiconductor ligh
    Type: Application
    Filed: July 9, 2009
    Publication date: January 5, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Toshiya Yokogawa, Akira Inoue, Masaki Fujikane, Mitsuaki Oya, Atsushi Yamada, Tadashi Yano
  • Publication number: 20110316040
    Abstract: A substrate for an LED light emitting element having a small difference of linear thermal expansion coefficient with the III-V semiconductor crystal constituting an LED, having an excellent thermal conductivity, and suitable for high output LEDs. A porous body comprises one or more materials selected from silicon carbide, aluminum nitride, silicon nitride, diamond, graphite, yttrium oxide, and magnesium oxide and has a porosity that is 10 to 50 volume % and a three-point bending strength that is 50 MPa or more. The porous body is infiltrated, by means of liquid metal forging, with aluminum alloy or pure aluminum at an infiltration pressure of 30 MPa or more, cut and/or ground to a thickness of 0.05 to 0.5 mm and to a surface roughness (Ra) of 0.01 to 0.5 ?m, then is formed with a metal layer comprising one or more elements selected from Ni, Co, Pd, Cu, Ag, Au, Pt and Sn on its surface to a thickness of 0.5 to 15 ?m, so as to thereby produce the composite substrate for the LED light emitting element.
    Type: Application
    Filed: February 10, 2010
    Publication date: December 29, 2011
    Applicant: DENKI KAGAKU KOGYO KABUSHIKI KAISHA
    Inventors: Hideki Hirotsuru, Hideo Tsukamoto, Yosuke Ishihara
  • Patent number: 8084281
    Abstract: The present invention provides a method for producing a semiconductor substrate, the method including reacting nitrogen (N) with gallium (Ga), aluminum (Al), or indium (In), which are group III elements, in a flux mixture containing a plurality of metal elements selected from among alkali metals and alkaline earth metals, to thereby grow a group III nitride based compound semiconductor crystal. The group III nitride based compound semiconductor crystal is grown while the flux mixture and the group III element are mixed under stirring. At least a portion of a base substrate on which the group III nitride based compound semiconductor crystal is grown is formed of a flux-soluble material, and the flux-soluble material is dissolved in the flux mixture, at a temperature near the growth temperature of the group III nitride based compound semiconductor crystal, during the course of growth of the semiconductor crystal.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: December 27, 2011
    Assignees: Toyoda Gosei Co., Ltd., NGK Insulators, Ltd., Osaka University
    Inventors: Naoki Shibata, Koji Hirata, Shiro Yamazaki, Katsuhiro Imai, Makoto Iwai, Takatomo Sasaki, Yusuke Mori, Fumio Kawamura
  • Publication number: 20110309374
    Abstract: Methods of performing fast thermal annealing in forming GaN light-emitting diodes (LEDs) are disclosed, as are GaN LEDs formed using fast thermal annealing having a time duration of 10 seconds or faster. An exemplary method includes forming a GaN multilayer structure having a n-GaN layer and a p-GaN layer that sandwich an active layer. The method includes performing fast thermal annealing of the p-GaN layer using either a laser or a flash lamp. The method further includes forming a transparent conducting layer atop the GaN multilayer structure, and adding a p-contact to the transparent conducting layer and a n-contact to the n-GaN layer. The resultant GaN LEDs have enhanced output power, lower turn-on voltage and reduced series resistance.
    Type: Application
    Filed: August 24, 2011
    Publication date: December 22, 2011
    Inventors: Yun Wang, Andrew M. Hawryluk
  • Publication number: 20110309324
    Abstract: Solid state lighting devices with semi-polar or non-polar surfaces and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state lighting device includes a substrate material having a substrate surface and an epitaxial silicon structure in direct contact with the substrate surface. The epitaxial silicon structure has a sidewall extending away from the substrate surface. The solid state lighting device also includes a semiconductor material on at least a portion of the sidewall of the epitaxial silicon structure. The semiconductor material has a semiconductor surface that is spaced apart from the substrate surface and is located on a semi-polar or non-polar crystal plane of the semiconductor material.
    Type: Application
    Filed: June 21, 2010
    Publication date: December 22, 2011
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Jaydeb Goswami
  • Publication number: 20110303894
    Abstract: A method of forming a semiconductor light emitting element. The method can include forming a seed layer on a semiconductor layer assembly including at least one nitride semiconductor layer. An insulating mask can be formed on the seed layer. The insulating mask can include a plurality of element areas separated by cross spaces. Each element area of the plurality of element areas can be connected to at least one of the other element areas of the plurality of element areas. The seed layer can be plated such that a plating substrate is formed in each of the plurality of element areas.
    Type: Application
    Filed: June 8, 2011
    Publication date: December 15, 2011
    Inventors: Kentaro Watanabe, Giichi Marutsuki, Yuya Yamakami
  • Patent number: 8076165
    Abstract: The present invention includes a first step of forming a nitride semiconductor layer by metal organic chemical vapor deposition by using a first carrier gas containing a nitrogen carrier gas and a hydrogen carrier gas of a flow quantity larger than that of the nitrogen carrier gas to thereby supply a raw material containing Mg and a Group V raw material containing N, and a second step of lowering a temperature by using a second carrier gas to which a material containing N is added, and hence solves the problems.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: December 13, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yuhzoh Tsuda, Shigetoshi Ito, Mototaka Taneya, Yoshihiro Ueta, Teruyoshi Takakura
  • Patent number: 8076685
    Abstract: A nitride semiconductor device includes an active layer formed between an n-type cladding layer and a p-type cladding layer, and a current confining layer having a conductive area through which a current flows to the active layer. The current confining layer includes a first semiconductor layer, a second semiconductor layer and a third semiconductor layer. The second semiconductor layer is formed on and in contact with the first semiconductor layer and has a smaller lattice constant than that of the first semiconductor layer. The third semiconductor layer is formed on and in contact with the second semiconductor layer and has a lattice constant that is smaller than that of the first semiconductor layer and larger than that of the second semiconductor layer.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: December 13, 2011
    Assignee: Panasonic Corporation
    Inventors: Satoshi Tamura, Ryo Kajitani
  • Publication number: 20110297956
    Abstract: The present invention is a method of manufacturing a gallium nitride-based compound semiconductor, including growing an m-plane InGaN layer whose emission peak wavelength is not less than 500 nm by metalorganic chemical vapor deposition. Firstly, step (A) of heating a substrate in a reactor is performed. Then, step (B) of supplying into the reactor a gas which contains an In source gas, a Ga source gas, and a N source gas and growing an m-plane InGaN layer of an InxGa1-xN crystal on the substrate at a growth temperature from 700° C. to 775° C. is performed. In step (B), the growth rate of the m-plane InGaN layer is set in a range from 4.5 nm/min to 10 nm/min.
    Type: Application
    Filed: October 21, 2009
    Publication date: December 8, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Ryou Kato, Masaki Fujikane, Akira Inoue, Toshiya Yokogawa
  • Publication number: 20110299560
    Abstract: In the method for fabricating a III-nitride semiconductor laser device, a substrate product is formed, and the substrate product has a laser structure including a substrate that is made of a hexagonal III-nitride semiconductor and has a semipolar primary surface, and the semiconductor region is formed on the semipolar primary surface, and thereafter a first surface of the substrate product is scribed to form a scribed mark extending in a direction of the a-axis of the hexagonal III-nitride semiconductor. After forming the scribed mark, breakup of the substrate product is carried out by press against a second region of the substrate product while supporting a first region of the substrate product but not supporting the second region. This step results in forming another substrate product and a laser bar. The substrate product is divided into two, the first region and the second region, by a predetermined reference line, and the first and second regions are adjacent to each other.
    Type: Application
    Filed: July 15, 2010
    Publication date: December 8, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shimpei TAKAGI, Yusuke YOSHIZUMI, Koji KATAYAMA, Masaki UENO, Takatoshi IKEGAMI
  • Publication number: 20110298005
    Abstract: A method for fabricating a group III-V n-type nitride structure comprises fabricating a growth Si substrate and then depositing a group III-V n-type layer above the Si substrate using silane gas (SiH4) as a precursor at a flow rate set to a first predetermined value (210). Subsequently, the SiH4 flow rate is reduced to a second predetermined value during the fabrication of the n-type layer (220). The method also comprises forming a multi-quantum-well active region above the n-type layer. In addition, the flow rate is reduced over a predetermined period of time, and the second predetermined value is reached at a predetermined, sufficiently small distance from the interface between the n-type layer and the active region (230).
    Type: Application
    Filed: October 12, 2007
    Publication date: December 8, 2011
    Applicant: LATTICE POWER (JIANGXI) CORPORATION
    Inventors: Fengyi Jiang, Li Wang, Chunlan Mo, Wenqing Fang
  • Publication number: 20110297955
    Abstract: A highly-efficient semiconductor light emitting diode with improved light extraction efficiency comprising at least a substrate having a plurality of crystal planes, a first conductivity-type barrier layer, an active layer serving as a light emitting layer and a second conductivity-type barrier layer stacked on the substrate. The semiconductor light emitting diode comprises a ridge structure configured from one flat surface and at least two inclining surfaces in the in-plane direction. The width (W) of the flat surface of the ridge structure is 2? (?: light emission wavelength) or less.
    Type: Application
    Filed: February 8, 2010
    Publication date: December 8, 2011
    Applicant: National Institute of Advanced Industrial Science and Technology
    Inventors: Xuelun Wang, Mutsuo Ogura
  • Publication number: 20110294245
    Abstract: The invention relates to a method of adapting the lattice parameter of a seed layer of a strained material, comprising the following successive steps: a) a structure is provided that has a seed layer of strained material, of lattice parameter A1, of nominal lattice parameter An and of thermal expansion coefficient CTE3, a low-viscosity layer and an intermediate substrate of thermal expansion coefficient CTE1; b) a heat treatment is applied so as to relax the seed layer of strained material; and c) the seed layer is transferred onto a support substrate of thermal expansion coefficient CTE5, the intermediate substrate and the support substrate being chosen so that A1<An and CTE1?CTE3 and CTE5>CTE1 or A1>An and CTE1?CTE3 and CTE5<CTE1.
    Type: Application
    Filed: February 15, 2010
    Publication date: December 1, 2011
    Applicant: S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES
    Inventors: Pascal Guenard, Frederic Dupont
  • Publication number: 20110287578
    Abstract: A method of fabricating on a semiconductor substrate bifacial tandem solar cells with semiconductor subcells having a lower bandgap than the substrate bandgap on one side of the substrate and with subcells having a higher bandgap than the substrate on the other including, first, growing a lower bandgap subcell on one substrate side that uses only the same periodic table group V material in the dislocation-reducing grading layers and bottom subcells as is present in the substrate and after the initial growth is complete and then flipping the substrate and growing the higher bandgap subcells on the opposite substrate side which can be of different group V material.
    Type: Application
    Filed: May 24, 2010
    Publication date: November 24, 2011
    Inventors: Steven J. Wojtczuk, Philip T. Chiu, Xuebing Zhang, Edward Gagnon, Michael Timmons
  • Publication number: 20110284919
    Abstract: A method for manufacturing a Group III nitride semiconductor layer according to the present invention includes a sputtering step of disposing a substrate and a target containing a Group III element in a chamber, introducing a gas for formation of a plasma in the chamber and forming a Group III nitride semiconductor layer added with Si as a dopant on the substrate by a reactive sputtering method, wherein a Si hydride is added in the gas for formation of a plasma.
    Type: Application
    Filed: August 8, 2011
    Publication date: November 24, 2011
    Applicant: SHOWA DENKO K.K.
    Inventors: Yasunori YOKOYAMA, Hisayuki MIKI
  • Patent number: 8062967
    Abstract: Methods for producing nanostructures, particularly Group III-V semiconductor nanostructures, are provided. The methods include use of novel Group III and/or Group V precursors, novel surfactants, oxide acceptors, high temperature, and/or stable co-products. Related compositions are also described. Methods and compositions for producing Group III inorganic compounds that can be used as precursors for nanostructure synthesis are provided. Methods for increasing the yield of nanostructures from a synthesis reaction by removal of a vaporous by-product are also described.
    Type: Grant
    Filed: June 1, 2009
    Date of Patent: November 22, 2011
    Assignee: Nanosys, Inc.
    Inventors: Erik C. Scher, Mihai A. Buretea, William P. Freeman, Joel Gamoras, Baixin Qian, Jeffery A. Whiteford
  • Publication number: 20110278587
    Abstract: Methods of performing fast thermal annealing in forming GaN light-emitting diodes (LEDs) are disclosed, as are GaN LEDs formed using fast thermal annealing. An exemplary method includes forming a GaN multilayer structure having a n-GaN layer and a p-GaN layer that sandwich an active layer. The method includes performing fast thermal annealing of the p-GaN layer using either a laser or a flash lamp. The method further includes forming a transparent conducting layer atop the GaN multilayer structure, and adding a p-contact to the transparent conducting layer and a n-contact to the n-GaN layer. The resultant GaN LEDs have enhanced output power, lower turn-on voltage and reduced series resistance.
    Type: Application
    Filed: July 20, 2011
    Publication date: November 17, 2011
    Inventors: Yun Wang, Andrew M. Hawryluk
  • Patent number: 8058660
    Abstract: Disclosed herein is a semiconductor light emitting device including: (A) an underlying layer configured to be formed on a major surface of a substrate having a {100} plane as the major surface; (B) a light emitting part; and (C) a current block layer, wherein the underlying layer is composed of a III-V compound semiconductor and is formed on the major surface of the substrate by epitaxial growth, the underlying layer extends in parallel to a <110> direction of the substrate, a sectional shape of the underlying layer obtained when the underlying layer is cut along a virtual plane perpendicular to the <110> direction of the substrate is a trapezoid, and oblique surfaces of the underlying layer corresponding to two oblique sides of the trapezoid are {111}B planes, and the top surface of the underlying layer corresponding to an upper side of the trapezoid is a {100} plane.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: November 15, 2011
    Assignee: Sony Corporation
    Inventors: Sachio Karino, Eiji Takase, Makoto Oogane, Tsuyoshi Nagatake, Michiru Kamada, Hironobu Narui, Nobukata Okano
  • Publication number: 20110272706
    Abstract: A light emitting diode and a method for fabricating the same are provided. The light emitting diode includes: a transparent substrate; a semiconductor material layer formed on the top surface of a substrate with an active layer generating light; and a fluorescent layer formed on the back surface of the substrate with controlled varied thicknesses. The ratio of light whose wavelength is shifted while propagating through the fluorescent layer and the original light generated in the active layer can be controlled by adjusting the thickness of the fluorescent layer, to emit desirable homogeneous white light from the light emitting diode.
    Type: Application
    Filed: July 21, 2011
    Publication date: November 10, 2011
    Applicant: Samsung LED Co., Ltd.
    Inventors: Joon-seop Kwak, Jae-hee Cho
  • Publication number: 20110272720
    Abstract: In some embodiments of the invention, a device includes a substrate and a semiconductor structure. The substrate includes a wavelength converting element comprising a wavelength converting material disposed in a transparent material, a seed layer comprising a material on which III-nitride material will nucleate, and a bonding layer disposed between the wavelength converting element and the seed layer. The semiconductor structure includes a III-nitride light emitting layer disposed between an n-type region and a p-type region, and is grown on the seed layer.
    Type: Application
    Filed: May 6, 2010
    Publication date: November 10, 2011
    Applicants: PHILIPS LUMIDLEDS LIGHTING COMPANY, LLC, KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Nathan F. GARDNER, Aurelien J.F. DAVID, Oleg B. SHCHEKIN
  • Publication number: 20110272734
    Abstract: The present invention is a minimal-defect light-emitting device substrate that enables emitted light to issue from a device's substrate side, and is a light-emitting device 100 substrate furnished with a transparent substrate 10 that is transparent to light of wavelengths between 400 nm and 600 nm, inclusive, and a nitride-based compound semiconductor thin film 1c formed onto one of the major surfaces of the transparent substrate 10 by a join. Letting the thermal expansion coefficient of the transparent substrate along a direction perpendicular to the major surface of the transparent substrate be ?1, and the thermal expansion coefficient of the nitride-based compound semiconductor thin film be ?2, then (?1??2)/?2 is between ?0.5 and 1.0, inclusive, and at up to 1200° C. the transparent substrate does not react with the nitride-based compound semiconductor thin film 1c.
    Type: Application
    Filed: November 11, 2009
    Publication date: November 10, 2011
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Akihiro Hachigo, Takao Nakamura, Masashi Yoshimura
  • Patent number: 8053806
    Abstract: A group III nitride semiconductor device having a gallium nitride based semiconductor film with an excellent surface morphology is provided. A group III nitride optical semiconductor device 11a includes a group III nitride semiconductor supporting base 13, a GaN based semiconductor region 15, an active layer active layer 17, and a GaN semiconductor region 19. The primary surface 13a of the group III nitride semiconductor supporting base 13 is not any polar plane, and forms a finite angle with a reference plane Sc that is orthogonal to a reference axis Cx extending in the direction of a c-axis of the group III nitride semiconductor. The GaN based semiconductor region 15 is grown on the semipolar primary surface 13a. A GaN based semiconductor layer 21 of the GaN based semiconductor region 15 is, for example, an n-type GaN based semiconductor, and the n-type GaN based semiconductor is doped with silicon.
    Type: Grant
    Filed: November 5, 2010
    Date of Patent: November 8, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Kyono, Yusuke Yoshizumi, Yohei Enya, Katsushi Akita, Masaki Ueno, Takamichi Sumitomo, Takao Nakamura
  • Publication number: 20110266575
    Abstract: A nitride-based semiconductor device includes: a nitride-based semiconductor multilayer structure including a p-type semiconductor region, a surface of the p-type semiconductor region being an m-plane; and an electrode that is arranged on the p-type semiconductor region, wherein the p-type semiconductor region is made of an AlxGayInzN semiconductor (where x+y+z=1, x?0, y?0, and z?0), and the electrode contains Mg, Zn and Ag.
    Type: Application
    Filed: September 21, 2010
    Publication date: November 3, 2011
    Inventors: Naomi Anzue, Toshiya Yokogawa
  • Publication number: 20110260211
    Abstract: A method of manufacturing a light emitting diode is disclosed. In one aspect, the light emitting diode has a carrier, an active layer structure of III-nitride type materials, and a photonic crystal structure of III-nitride type materials. The active layer structure includes a first active layer with an n-type doped layer and a p-type doped layer and suitably a quantum well structure. The photonic crystal structure includes periodically distributed trenches or periodically distributed pillars spaced by one or more trenches. The photonic crystal structure includes an overgrowth layer within which a diameter of a trench gradually increases, and a directional photonic crystal layer in which the diameter of a trench is substantially constant. The diode may be formed in a method wherein the directional photonic crystal layer is provided on a three-dimensional pattern that exposes selected areas of the first surface of the substrate.
    Type: Application
    Filed: April 22, 2011
    Publication date: October 27, 2011
    Applicant: IMEC
    Inventor: Kai Cheng
  • Publication number: 20110260210
    Abstract: Monolithically integrated GaN LEDs with silicon-based ESD protection diodes. Hybrid MOCVD or HVPE epitaxial systems may be utilized for in-situ epitaxially growth of doped silicon containing films to form both the silicon-based ESD protection diode material stacks as well as a silicon containing transition layer prior to growth of a GaN-based LED material stack. The silicon-based ESD protection diodes may be interconnected with layers of a GaN LED material stack to form Zener diodes connected with the GaN LEDs.
    Type: Application
    Filed: March 10, 2011
    Publication date: October 27, 2011
    Applicant: Applied Materials, Inc.
    Inventor: Jie SU
  • Patent number: 8044417
    Abstract: An increase in the Indium (In) content in light-emitting layers of light-emitting diode (LED) structures prepared on nonpolar III-nitride substrates result in higher polarization ratios for light emission than LED structures containing lesser In content. Polarization ratios should be higher than 0.7 at wavelengths longer than 470 nm.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: October 25, 2011
    Assignee: The Regents of the University of California
    Inventors: Hisashi Masui, Hisashi Yamada, Kenji Iso, James S. Speck, Shuji Nakamura, Steven P. DenBaars
  • Patent number: 8044430
    Abstract: A nitride semiconductor light-emitting device according to the present invention includes a nitride based semiconductor substrate 10 and a nitride based semiconductor multilayer structure that has been formed on the semiconductor substrate 10. The multilayer structure includes an active layer 16 that produces emission and multiple semiconductor layers 12, 14 and 15 that have been stacked one upon the other between the active layer 16 and the substrate 10 and that include an n-type dopant. Each and every one of the semiconductor layers 12, 14 and 15 includes Al atoms.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: October 25, 2011
    Assignee: Panasonic Corporation
    Inventors: Akihiko Ishibashi, Toshiya Yokogawa
  • Publication number: 20110254048
    Abstract: An object of the present invention is to provide a Group III nitride semiconductor epitaxial substrate, i.e., an AlxGa1-xN (0?x?1) epitaxial substrate succeeding in reducing the generation of cracking or dislocation, and enhancing the crystal quality. More specifically, an object of the present invention is to provide an AlxGa1-xN (0<x?1) epitaxial substrate useful for a light-emitting device in the ultraviolet or deep ultraviolet region. The inventive Group III nitride semiconductor epitaxial substrate comprises a base and an AlxGa1-xN (0?x?1) layer stacked on the base, wherein a layer allowing a crystal having ?C polarity and a crystal having +C polarity to coexist is present on the base side of the AlxGa1-xN (0?x?1) layer.
    Type: Application
    Filed: August 6, 2008
    Publication date: October 20, 2011
    Applicant: SHOWA DENKO K.K.
    Inventors: Hiroshi Amano, Akira Bando
  • Publication number: 20110253974
    Abstract: To provide a high-quality nitride semiconductor ensuring high emission efficiency of a light-emitting element fabricated. In the present invention, when obtaining a nitride semiconductor by sequentially stacking a one conductivity type nitride semiconductor part, a quantum well active layer structure part, and a another conductivity type nitride semiconductor part opposite the one conductivity type, the crystal is grown on a base having a nonpolar principal nitride surface, the one conductivity type nitride semiconductor part is formed by sequentially stacking a first nitride semiconductor layer and a second nitride semiconductor layer, and the second nitride semiconductor layer has a thickness of 400 nm to 20 mm and has a nonpolar outermost surface. By virtue of selecting the above-described base for crystal growth, an electron and a hole, which are contributing to light emission, can be prevented from spatial separation based on the QCSE effect and efficient radiation is realized.
    Type: Application
    Filed: May 20, 2011
    Publication date: October 20, 2011
    Applicant: MITSUBISHI CHEMICAL CORPORATION
    Inventors: Hideyoshi HORIE, Kaori Kurihara
  • Publication number: 20110253976
    Abstract: A nitride-based semiconductor light-emitting device 100 includes: a GaN substrate 10 with an m-plane surface 12; a semiconductor multilayer structure 20 provided on the m-plane surface 12 of the GaN substrate 10; and an electrode 30 provided on the semiconductor multilayer structure 20. The electrode 30 includes an Mg layer 32 and an Ag layer 34 provided on the Mg layer 32. The Mg layer 32 is in contact with a surface of a p-type semiconductor region of the semiconductor multilayer structure 20.
    Type: Application
    Filed: June 23, 2011
    Publication date: October 20, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Mitsuaki OYA, Toshiya YOKOGAWA, Atsushi YAMADA, Akihiro ISOZAKI